Renesas R5F523E5KDFM#50
- Part No.:
- R5F523E5KDFM#50
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
R5F523E5KDFM#50.pdf
- Description:
- 32BIT MCU RX23E-B 128K LFQFP64 T
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F523E5KDFM#50 from Renesas is a 32-bit RXv2 microcontroller optimized for high-precision analog measurement in industrial sensing applications. It integrates a 24-bit delta-sigma ADC with ±10-V input capability, rail-to-rail programmable gain instrumentation amplifier (gain = 1–128), 128 KB on-chip flash, 16 KB SRAM, and CAN 2.0B interface - all operating at up to 32 MHz. Target use includes load cell signal conditioning, weigh scale controllers, and precision process transmitters.
For engineers reviewing the R5F523E5KDFM#50 datasheet, R5F523E5KDFM#50 pinout, R5F523E5KDFM#50 application, or R5F523E5KDFM#50 equivalent, key selection criteria include its 10-V analog input range, 125 kSPS delta-sigma sampling rate, integrated excitation current sources (50–1000 µA), low-drift voltage reference (2.5 V, 8 ppm/°C), and support for IEC60730 functional safety diagnostics.
Technical Context
The R5F523E5KDFM#50 implements the RXv2 CPU core with IEEE 754-compliant 32-bit FPU, memory protection unit (MPU), and event link controller (ELC) enabling interrupt-free peripheral coordination. Its analog subsystem centers on the DSADB module, synchronized to PCLKC (≤16 MHz), with configurable sinc filters and simultaneous 50/60 Hz rejection at 10/54 SPS.
Digital integration includes one CAN channel (ISO 11898-1, up to 1 Mbps), six SCI interfaces, one RSPI (16 Mbps), and one RIIC (400 kbps). Power management supports three low-power modes, software standby with LPT operation, and voltage detection across three independent LVD circuits.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC Harvard architecture, 32 MHz max, 64 DMIPS, IEEE 754 FPU, MPU |
| Flash / RAM / Data Flash | 128 KB code flash (no-wait @32 MHz), 16 KB SRAM (no-wait), 8 KB data flash (1M erase cycles) |
| 24-bit Delta-Sigma ADC | 8-channel differential input, ±10-V HVAIN pins, 125 kSPS max, 24-bit effective resolution @3.8 SPS |
| Programmable Gain Amplifier | Rail-to-rail PGA with gains 1–128, 11 nVRMS noise @gain=128, offset drift 4 nV/°C @gain=64–128 |
| Voltage Reference & Excitation | 2.5 V internal VREF (8 ppm/°C drift), two excitation current sources (50–1000 µA, ±0.2% matching) |
| Communication Interfaces | 1× CAN 2.0B (1 Mbps), 6× SCI, 1× RSPI (16 Mbps), 1× RIIC (400 kbps), 1× SCIh (LIN support) |
| Operating Range | 1.8–5.5 V supply, –40°C to +85°C ambient (D-version), 100-pin LFQFP package (PLQP0064KB-C) |
Pinout & Package
Package: PLQP0064KB-C - 64-pin LFQFP, 10 × 10 mm body, 0.5 mm pitch, exposed pad, RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Core digital supply (1.8–5.5 V); separate AVCC0 (4.5–5.5 V) required for 12-bit ADC and analog front end |
| HVAIN0–HVAIN3 | Analog input | ±10-V tolerant high-voltage differential inputs for DSADB; enable direct connection to strain gauges without external amplification |
| IEXC0 / IEXC1 | Excitation current output | Programmable current sources (50–1000 µA) for bridge sensor biasing; matched within ±0.2% for ratiometric accuracy |
| DSAD_VREFP / DSAD_VREFN | ADC reference | Differential reference inputs supporting external reference or internal 2.5 V VREF; fault detection enabled |
| CAN_TX / CAN_RX | CAN physical layer interface | Dedicated differential pair for ISO 11898-1 compliant CAN bus; supports up to 1 Mbps with built-in protocol engine |
| MTU0A / MTU0B | PWM output | Complementary PWM outputs with dead-time control; used for motor control or power regulation via ELC-triggered updates |
Key Features
| Feature | Design Value |
|---|---|
| IEC60730 Safety Support | Hardware-assisted self-test for ADC, clock accuracy (CAC), IWDT, RAM (via DOC), and analog disconnect detection |
| Delta-Sigma ADC Flexibility | Selectable sinc filter order (4th/5th), dual-filter cascading, simultaneous 50/60 Hz rejection, and BGO-capable calibration |
| Low-Power Operation | Software standby mode with LPT running off sub-clock (32.768 kHz); wake-up via ELC events without CPU intervention |
| High-Voltage Analog Input | Four ±10-V HVAIN pins with internal fault detectors for overvoltage, reference disconnect, and excitation source open-circuit |
| Event-Driven Architecture | ELC enables direct hardware linking between peripherals (e.g., MTU trigger → DSADB conversion start), eliminating ISR latency |
Applications
| Industrial Weigh Scale Controller | Bridge Sensor Signal Conditioner |
|---|---|
|
Use Scenario: Digital weighing system for platform scales requiring <10 µV resolution and temperature-stable zero point. IC Role / Device Role / Timing Role: Primary signal acquisition MCU: conditions mV-level bridge outputs via PGA and DSADB, performs real-time linearization, and communicates weight data via CAN. Use Value: ±10-V HVAIN pins accept raw bridge signals directly; 11 nVRMS PGA noise and 4 nV/°C offset drift ensure stable zero-point calibration across –40°C to +85°C. |
Use Scenario: High-accuracy pressure transmitter using Wheatstone bridge sensors in HVAC or process control. IC Role / Device Role / Timing Role: Integrated analog front-end and control MCU: supplies matched excitation currents, digitizes differential outputs, and executes compensation algorithms. Use Value: Dual 50–1000 µA excitation sources with ±0.2% matching enable ratiometric measurements; sinc filtering rejects line-frequency interference during 54 SPS output data rate. |
| Smart Process Transmitter | Functional Safety PLC I/O Module |
|
Use Scenario: 4–20 mA loop-powered field device converting analog sensor inputs to HART-enabled digital output. IC Role / Device Role / Timing Role: System-on-chip for analog acquisition, digital communication (SCI for HART modem), and loop control (16-bit DAC + PWM). Use Value: Integrated 16-bit R16DA DAC (±5 LSB INL) drives current loop; on-chip VREF (2.5 V, 8 ppm/°C) ensures stable DAC reference; CRC and DOC support diagnostic integrity. |
Use Scenario: Safety-rated analog input module for SIL2-capable PLCs monitoring temperature, flow, or level sensors. IC Role / Device Role / Timing Role: Certified measurement node: performs periodic self-tests (ADC, clock, RAM), detects sensor disconnect, and reports faults via CAN or SCI. Use Value: Hardware-accelerated IEC60730 diagnostics reduce firmware validation burden; MPU isolates safety-critical tasks; dual LVD circuits monitor supply integrity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-precision analog measurement MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F523E5JDFN | Same RX23E-B core, 80-pin LFQFP, includes LCD controller (40×4 SEG/COM), no HVAIN pins, 5-V analog input range | Suitable for panel-mounted instruments with local display; lacks ±10-V input capability and excitation current sources | Choose when integrated LCD driving is required and sensor inputs are ≤5 V full-scale. |
| R5F523E5BDFM | Same 64-pin LFQFP package, identical analog specs except 5-V input range (not ±10 V), same 125 kSPS DSADB sampling | Targeted at lower-voltage bridge or thermocouple applications where HVAIN tolerance is unnecessary | Choose to reduce BOM cost when ±10-V input range and HVAIN pins are not needed. |
Compared with R5F523E5JDFN and R5F523E5BDFM, the R5F523E5KDFM#50 uniquely delivers ±10-V analog input tolerance and dedicated HVAIN pins in the compact 64-pin LFQFP, making it the only option among these three for direct interfacing to unconditioned industrial strain gauges without external level-shifting circuitry.
Availability
R5F523E5KDFM#50 is available at Aetrix Electronics and suitable for industrial weigh scale controllers, bridge sensor signal conditioners, smart process transmitters, and functional safety PLC I/O modules requiring stable component supply across extended temperature ranges.
Supply support for R5F523E5KDFM#50 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for industrial, automotive, and infrastructure markets.
The RX23E-B Group is designed specifically for high-accuracy sensor signal acquisition and processing in industrial automation, featuring integrated delta-sigma ADCs, programmable gain amplifiers, and functional safety support - all in a single-chip solution.
FAQ
What is the maximum sampling rate of the 24-bit delta-sigma ADC in R5F523E5KDFM#50?
The R5F523E5KDFM#50 supports a maximum delta-sigma ADC sampling rate of 125 kSPS. This rate is achievable with reduced effective resolution and specific sinc filter configurations; at 3.8 SPS, the device achieves 24-bit effective resolution with gain = 1. The modulator clock is fixed at 4 MHz (typical), and oversampling ratios range from 32 to 1,048,576 depending on data rate selection.
Does R5F523E5KDFM#50 support ±10-V analog inputs, and which pins are used?
Yes, the R5F523E5KDFM#50 supports ±10-V analog inputs via four dedicated HVAIN pins: HVAIN0, HVAIN1, HVAIN2, and HVAIN3. These pins are differential-input capable and include built-in fault detection for overvoltage, reference disconnect, and excitation source open-circuit conditions - enabling direct connection to unconditioned strain gauge bridges without external level-shifting components.
What is the operating temperature range and package type of R5F523E5KDFM#50?
The R5F523E5KDFM#50 is rated for –40°C to +85°C (D-version) and housed in a 64-pin LFQFP package designated PLQP0064KB-C - measuring 10 × 10 mm with 0.5 mm pitch and an exposed thermal pad. This package is RoHS compliant and optimized for reflow soldering in industrial PCB assembly environments.
How does the R5F523E5KDFM#50 support IEC60730 compliance for functional safety?
The R5F523E5KDFM#50 provides hardware-assisted IEC60730 compliance features including self-diagnostic routines for the A/D converter, clock frequency accuracy measurement circuit (CAC), independent watchdog timer (IWDT), RAM test assistance using the data operation circuit (DOC), and analog input disconnect detection. These features reduce software validation effort and support Class B safety certification in industrial control systems.
What communication interfaces are integrated into R5F523E5KDFM#50?
The R5F523E5KDFM#50 integrates one CAN 2.0B channel (up to 1 Mbps), six SCI interfaces (including LIN-capable SCIh), one RSPI (16 Mbps), one RIIC (400 kbps, SMBus-compatible), and supports ELC-triggered peripheral coordination. It does not include an LCD controller or Ethernet MAC - distinguishing it from other RX23E-B variants like the J- or L-suffix parts.
R5F523E5KDFM#50 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-LQFP
- Series:
- RX23E-B
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 32MHz
- Connectivity:
- CANbus, I2C, SCI, SPI, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 30
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 5.5V
- Data Converters:
- A/D 8x12b SAR, 8x24b Sigma-Delta; D/A 1x16b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F523E5KDFM#50 FAQ
1.How can I place an order for R5F523E5KDFM#50 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F523E5KDFM#50 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F523E5KDFM#50 reliable?
The price and inventory of R5F523E5KDFM#50 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F523E5KDFM#50 is usually 5 days.
3.What payment methods are accepted for R5F523E5KDFM#50?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F523E5KDFM#50 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F523E5KDFM#50?
R5F523E5KDFM#50 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F523E5KDFM#50 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F523E5KDFM#50?
For technical support, including R5F523E5KDFM#50 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F523E5KDFM#50 requirements.
6.How does Aetrix verify that R5F523E5KDFM#50 is sourced from the original manufacturer or authorized distributors?
All R5F523E5KDFM#50 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F523E5KDFM#50 meets industry standards.
7.What is the process for return or replacement of R5F523E5KDFM#50?
All R5F523E5KDFM#50 units undergo pre-shipment inspection (PSI). If there is an issue with R5F523E5KDFM#50, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F523E5KDFM#50 part is unused and in its original packaging.
Return procedure for R5F523E5KDFM#50:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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