Renesas R5F523E5LDFP#10
- Part No.:
- R5F523E5LDFP#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F523E5LDFP#10.pdf
- Description:
- 32BIT MCU RX23E-B 128K LFQFP100
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F523E5LDFP#10 from Renesas Electronics is a 32-bit RXv2 microcontroller optimized for high-precision analog measurement in industrial sensing and metering systems. It integrates a 24-bit delta-sigma ADC with ±10-V input capability, rail-to-rail programmable gain instrumentation amplifier (gain = 1–128), 128 KB on-chip flash, 16 KB SRAM, and a CAN 2.0B interface compliant to ISO 11898-1 at up to 1 Mbps.
For engineers reviewing the R5F523E5LDFP#10 datasheet, R5F523E5LDFP#10 pinout, R5F523E5LDFP#10 application, or R5F523E5LDFP#10 equivalent, this MCU delivers deterministic real-time control, IEC 60730-compliant self-test features, low-drift voltage reference (2.5 V, 8 ppm/°C), and simultaneous 50/60 Hz rejection - critical for energy metering, load cell interfaces, and precision sensor signal conditioning.
Technical Context
The R5F523E5LDFP#10 implements the RXv2 CPU core operating at up to 32 MHz (64 DMIPS), with IEEE 754-compliant single-precision FPU, memory protection unit (MPU), and event link controller (ELC) enabling interrupt-free peripheral coordination during CPU sleep. Its analog subsystem centers on the DSADB module, synchronized to PCLKC (≤16 MHz), with fourth- and fifth-order sinc digital filters and background operation (BGO) for data flash.
It supports three low-power modes (sleep, deep sleep, software standby), with LPT running off sub-clock during standby. Clock generation includes main oscillator (1–20 MHz), PLL (4–8 MHz input), and dedicated IWDT oscillator (15 kHz), while reset architecture includes POR, LVD (3-level configurable), and oscillation stop detection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC Harvard, 32 MHz max (64 DMIPS), IEEE 754 FPU, MPU, 5-stage pipeline |
| Memory | 128 KB flash (no-wait @32 MHz), 16 KB SRAM (no-wait), 8 KB data flash (1M erase cycles) |
| Delta-Sigma ADC | 24-bit resolution, ±10-V HVAIN inputs, 125 kSPS max, sinc4/sinc5 filters, 50/60 Hz rejection at 10/54 SPS |
| PGA & Reference | Rail-to-rail PGA (gain 1–128), 2.5 V ref (8 ppm/°C drift), ±10 mA output, excitation current sources (50–1000 µA) |
| Peripherals | CAN 2.0B (1 ch, 1 Mbps), SCI (6 ch), RSPI (1 ch, 16 Mbps), RIIC (1 ch, 400 kbps), MTU2a (6×16-bit timers), RTC, LPT |
| Package & Temp | PLQP0100KB-B: 100-pin LFQFP, 14 × 14 mm, 0.5 mm pitch; operating range –40°C to +85°C (D version) |
Pinout & Package
Package: PLQP0100KB-B - 100-pin Low-Profile Quad Flat Package, 14 mm × 14 mm body, 0.5 mm lead pitch, exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Core logic supply (1.8–5.5 V); separate AVCC0 (4.5–5.5 V) required for 12-bit ADC and HVAIN analog front end |
| HVAIN0–HVAIN3 | Analog input | ±10-V tolerant differential/single-ended inputs for 24-bit delta-sigma ADC; support direct connection to strain gauges and shunt resistors |
| AVCC0 / AVSS0 | Analog power / ground | Dedicated 4.5–5.5 V analog supply; enables full 12-bit ADC performance and ±10-V input range on HVAIN pins |
| DSAD_VREFH / DSAD_VREFL | ADC reference | External reference inputs for 24-bit delta-sigma ADC; accept internal 2.5 V ref or external precision source |
| CAN_TX / CAN_RX | CAN bus interface | Differential transmit/receive pins for ISO 11898-1 CAN 2.0B communication; require external transceiver |
| MTU0A / MTU0B | PWM output | Complementary PWM outputs from MTU2a channel 0; support motor control and isolated gate drive with POE2a dead-time control |
Key Features
| Feature | Design Value |
|---|---|
| IEC 60730 Support | Integrated self-test functions for A/D converter, clock accuracy (CAC), IWDT, RAM (via DOC), and analog disconnect detection |
| High-Precision Analog Front End | 24-bit delta-sigma ADC with 11 nVRMS noise (gain=128), 4 nV/°C offset drift, 1 ppm/°C gain drift, and ±10-V input range |
| Low-Power Operation | Software standby mode with LPT active on sub-clock; deep sleep mode with RAM retention; 3-speed operating modes (high/mid/low) |
| Event-Driven Architecture | ELC enables hardware-triggered transfers between peripherals (e.g., MTU → DSAD start) without CPU intervention or interrupt latency |
| Robust Communication | CAN 2.0B + 6×SCI + RSPI + I²C with error recovery, bit-rate modulation (SCI), and LIN-compliant SCIh for automotive diagnostics |
Applications
| Energy Metering | Industrial Load Cell Interface |
|---|---|
|
Use Scenario: Three-phase electricity meter with Class 0.2 accuracy requirements under varying grid harmonics and temperature. IC Role / Device Role / Timing Role: Primary signal acquisition MCU handling simultaneous voltage/current sampling, harmonic analysis, and metrology calculations via FPU and DSADB. Use Value: Simultaneous 50/60 Hz rejection at 10/54 SPS and ±10-V HVAIN inputs eliminate external signal conditioning, reducing BOM cost and board space. |
Use Scenario: High-accuracy weighbridge system requiring stable mV/V bridge measurements across –40°C to +85°C ambient. IC Role / Device Role / Timing Role: Analog front-end controller managing excitation current sourcing, PGA gain selection, and DSADB oversampling for noise suppression. Use Value: 11 nVRMS input-referred noise (gain=128) and 4 nV/°C offset drift ensure <0.01% FS error stability over temperature without calibration. |
| Programmable Logic Controller I/O Module | Smart Sensor Transmitter |
|
Use Scenario: DIN-rail mounted analog input module supporting 4–20 mA, ±10 V, and thermocouple inputs with HART communication. IC Role / Device Role / Timing Role: Central processing unit executing real-time I/O scanning, linearization, and protocol stack (HART via SCI) with deterministic timing via ELC-triggered ADC conversions. Use Value: Integrated 16-bit DAC, 12-bit ADC, and CAN interface enable dual-path analog I/O and fieldbus connectivity in one chip, simplifying modular design. |
Use Scenario: Wireless pressure transmitter with onboard compensation, battery operation, and BLE/Wi-Fi coexistence. IC Role / Device Role / Timing Role: Low-power sensor hub performing cold-junction compensation, sensor linearization, and wake-on-event data capture using deep sleep + LPT timer. Use Value: Software standby mode with LPT running on sub-clock extends battery life >10 years; BGO data flash allows firmware updates without halting sensor operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-precision analog microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F523E5NDFP#10 | Same package and core, but 5-V analog input range (vs. ±10 V), 31.25 kSPS max DSADB sampling rate | Suitable for lower-voltage sensor interfaces (e.g., 0–5 V potentiometers) where ±10 V range and 125 kSPS are unnecessary | Select when cost sensitivity outweighs need for high-voltage input or fast sampling; retains identical pinout and firmware compatibility |
| R5F523E5LDBS#10 | Same analog specs (±10 V, 125 kSPS), but 100-pin TFBGA (5.5 × 5.5 mm) vs. LFQFP; no LCD driver | Targeted at space-constrained PCBs where fine-pitch BGA assembly is available and display interface is unused | Choose for ultra-compact designs with BGA capability; requires different layout and rework process versus QFP |
Compared with R5F523E5NDFP#10, the R5F523E5LDFP#10 provides higher analog input range and faster sampling for demanding metrology, while versus R5F523E5LDBS#10 it offers easier assembly and thermal management via QFP packaging - critical for industrial environments with vibration and thermal cycling.
Availability
R5F523E5LDFP#10 is available at Aetrix Electronics and suitable for energy metering, industrial load cell interfaces, and programmable logic controller I/O modules requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F523E5LDFP#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for industrial, automotive, and infrastructure markets.
The RX23E-B Group - including the R5F523E5LDFP#10 - was designed specifically for high-accuracy analog measurement applications such as smart meters, industrial sensors, and test equipment, integrating metrology-grade ADCs with real-time MCU control.
FAQ
What is the maximum sampling rate of the 24-bit delta-sigma ADC in the R5F523E5LDFP#10?
The R5F523E5LDFP#10 supports a maximum sampling rate of 125 kSPS for its 24-bit delta-sigma ADC (DSADB). This rate is achievable with modulator clock fMOD = 4 MHz and appropriate digital filter configuration (e.g., sinc1 or reduced-order sinc filters). At lower rates like 10 SPS or 54 SPS, the device enables simultaneous 50 Hz/60 Hz rejection for energy metering compliance.
Does the R5F523E5LDFP#10 include an integrated CAN transceiver?
No, the R5F523E5LDFP#10 integrates a CAN 2.0B controller (RSCAN module) but does not include a physical-layer transceiver. External CAN transceivers (e.g., SN65HVD23x, TJA1042) must be used on the PCB to interface with the CAN bus. The R5F523E5LDFP#10 provides CAN_TX and CAN_RX signals compatible with standard ISO 11898-2/3 transceivers.
What analog input voltage range does the R5F523E5LDFP#10 support on its HVAIN pins?
The R5F523E5LDFP#10 supports a ±10-V input voltage range on its HVAIN0–HVAIN3 pins, enabled by its high-voltage analog input circuitry. This allows direct connection to industrial sensors such as strain gauges, shunt-based current monitors, and bipolar transducer outputs without external level-shifting or attenuation networks.
Is the R5F523E5LDFP#10 pin-compatible with other members of the RX23E-B Group?
Within the same package type (e.g., PLQP0100KB-B), the R5F523E5LDFP#10 is pin-compatible with other 100-pin LFQFP variants like R5F523E5NDFP#10 and R5F523E6LDFP#10. Differences lie in flash/RAM size, analog range, and sampling rate - all supported by identical pin assignments and electrical characteristics per the Renesas RX23E-B hardware manual.
What is the operating temperature range specified for the R5F523E5LDFP#10?
The R5F523E5LDFP#10 is rated for an operating ambient temperature range of –40°C to +85°C (D version). This specification applies to all functional blocks including the 24-bit delta-sigma ADC, PGA, voltage reference, and CPU core, and is validated per JEDEC JESD22-A104 reliability testing standards.
R5F523E5LDFP#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX23E-B
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 32MHz
- Connectivity:
- CANbus, I2C, SCI, SPI, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 58
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 5.5V
- Data Converters:
- A/D 8x12b, 8x24b Sigma-Delta; D/A 1x16b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F523E5LDFP#10 FAQ
1.How can I place an order for R5F523E5LDFP#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F523E5LDFP#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F523E5LDFP#10 reliable?
The price and inventory of R5F523E5LDFP#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F523E5LDFP#10 is usually 5 days.
3.What payment methods are accepted for R5F523E5LDFP#10?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F523E5LDFP#10 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F523E5LDFP#10?
R5F523E5LDFP#10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F523E5LDFP#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F523E5LDFP#10?
For technical support, including R5F523E5LDFP#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F523E5LDFP#10 requirements.
6.How does Aetrix verify that R5F523E5LDFP#10 is sourced from the original manufacturer or authorized distributors?
All R5F523E5LDFP#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F523E5LDFP#10 meets industry standards.
7.What is the process for return or replacement of R5F523E5LDFP#10?
All R5F523E5LDFP#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F523E5LDFP#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F523E5LDFP#10 part is unused and in its original packaging.
Return procedure for R5F523E5LDFP#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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