Renesas R5F523E5NDFN#50
- Part No.:
- R5F523E5NDFN#50
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 80-LQFP
- Datasheet:
-
R5F523E5NDFN#50.pdf
- Description:
- 32BIT MCU RX23E-B 128K LFQFP80 T
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F523E5NDFN#50 from Renesas is a 32-bit RXv2 microcontroller optimized for high-precision analog measurement in industrial sensing systems. It integrates a 24-bit delta-sigma ADC with 31.25 kSPS max sampling rate, ±5-V analog input range, 16-KB SRAM, 128-KB flash, and on-chip excitation current sources (50–1000 µA) - enabling direct interface to strain gauges and RTDs in load cells and pressure transmitters.
For engineers reviewing the R5F523E5NDFN#50 datasheet, R5F523E5NDFN#50 pinout, R5F523E5NDFN#50 application, or R5F523E5NDFN#50 equivalent, key selection criteria include its 80-pin LFQFP package, 32-MHz CPU operation, integrated rail-to-rail PGA (gain = 1–128), 12-bit auxiliary ADC, CAN 2.0B interface, and IEC60730-compliant self-test functions for safety-critical sensor nodes.
Technical Context
The R5F523E5NDFN#50 implements the RXv2 CPU core with IEEE 754-compliant 32-bit FPU, 5-stage pipeline, and memory protection unit - delivering 64 DMIPS at 32 MHz while supporting deterministic real-time execution. Its analog subsystem centers on a single 24-bit delta-sigma ADC unit with fourth- and fifth-order sinc filters, programmable data rates (3.8 SPS to 31.25 kSPS), and simultaneous 50/60 Hz rejection at 10 and 54 SPS.
Digital integration includes one CAN channel (ISO 11898-1, up to 1 Mbps), six SCI interfaces, one I²C bus, one RSPI, four-channel DMAC, ELC for interrupt-free peripheral chaining, and low-power modes (deep sleep, software standby) with LPT running off sub-clock oscillator. The device operates from 1.8–5.5 V and supports –40°C to +85°C ambient temperature.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC Harvard architecture with 5-stage pipeline, 64 DMIPS @ 32 MHz |
| Flash / RAM / Data Flash | 128 KB on-chip flash (no wait states @ 32 MHz), 16 KB SRAM, 8 KB data flash (1M erase/write cycles) |
| Delta-Sigma ADC | 24-bit resolution, 31.25 kSPS max sampling rate, ±5-V input range, 8 differential channels |
| PGA & Analog Front End | Rail-to-rail programmable gain instrumentation amplifier (gain = 1–128), two 50–1000 µA excitation current sources, ±10-V HVAIN pins |
| Communication Interfaces | 1× CAN 2.0B (1 Mbps), 6× SCI, 1× I²C (400 kbps), 1× RSPI (16 Mbps), 1× RIIC |
| Timers & Control | 6× 16-bit MTU channels, 2× 16-bit CMT, 4× 8-bit TMR, RTC, LPT, IWDT with dedicated 15-kHz oscillator |
| Package & Environment | 80-pin LFQFP (PLQP0080KB-B), 12 × 12 mm, 0.5 mm pitch, operating temperature –40°C to +85°C |
Pinout & Package
Package: 80-pin Low-Profile Quad Flat Package (LFQFP), PLQP0080KB-B, 12 × 12 mm body, 0.5 mm pitch, exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Main digital power (1.8–5.5 V) and ground reference for core/peripherals |
| AVCC0 / AVSS0 | Analog power / Analog ground | Separate 4.5–5.5 V analog supply for 12-bit ADC and bias generation; enables noise isolation |
| HVAIN0–HVAIN3 | Analog input | ±5-V tolerant high-voltage analog inputs for direct connection to bridge sensors without external level-shifting |
| IEXC0 / IEXC1 | Excitation current output | Programmable current sources (50–1000 µA) with ±0.2% matching for precision RTD/strain gauge excitation |
| DSAD0–DSAD7 | Delta-sigma ADC input | Differential input pairs supporting 8 channels; accepts PGA outputs or direct sensor signals |
| CANH / CANL | CAN bus interface | Differential physical layer pins compliant with ISO 11898-1; support up to 1 Mbps data rate |
| MTU0A–MTU5B | PWM / capture output | Complementary PWM outputs with dead-time control; used for motor control or power regulation |
| SCI0TX / SCI0RX | Asynchronous serial interface | Full-duplex UART pins with hardware baud rate generation and bit-rate modulation for robust fieldbus communication |
Key Features
| Feature | Design Value |
|---|---|
| IEC60730 Safety Support | Hardware-assisted self-test for ADC, clock accuracy (CAC), IWDT, RAM (via DOC), and analog disconnect detection |
| Simultaneous 50/60 Hz Rejection | Configurable sinc filter modes enable real-time line-frequency interference cancellation at 10 and 54 SPS output rates |
| Low-Drift Voltage Reference | 2.5 V ±8 ppm/°C drift over –40°C to +85°C; powers internal ADCs and supports external reference input |
| Event Link Controller (ELC) | Enables autonomous peripheral triggering (e.g., timer → ADC start) without CPU intervention or interrupt latency |
| Background Operation (BGO) | Data flash programming/erasing proceeds concurrently with CPU execution, minimizing system stall time |
| Flexible Power Management | Three low-power modes (sleep, deep sleep, software standby) with LPT active in standby for periodic wake-up |
Applications
| Industrial Load Cell Interface | Smart Pressure Transmitter |
|---|---|
|
Use Scenario: High-accuracy weight measurement in platform scales and batching systems using full-bridge strain gauges. IC Role / Device Role / Timing Role: Primary signal conditioner and controller: conditions mV-level bridge output via PGA, digitizes with 24-bit DSADC, computes calibrated weight, and communicates via CAN or SCI. Use Value: Integrated 50–1000 µA excitation sources eliminate external current drivers; ±5-V HVAIN pins accept raw bridge outputs without attenuation; 31.25 kSPS sampling supports dynamic weighing. |
Use Scenario: Field-mounted pressure sensor with HART or Modbus RTU output for process automation. IC Role / Device Role / Timing Role: Sensor fusion hub: acquires pressure (via piezoresistive element), temperature (internal sensor), performs linearization/compensation, and drives 4–20 mA loop or digital interface. Use Value: On-chip 12-bit auxiliary ADC monitors supply/temperature; 16-bit DAC generates precise loop current; CAN interface enables diagnostics and configuration in distributed control networks. |
| Energy Metering Subsystem | Condition Monitoring Node |
|
Use Scenario: Secondary metrology unit in polyphase energy meters measuring voltage/current harmonics and power quality. IC Role / Device Role / Timing Role: Precision analog acquisition engine: synchronizes DSADC sampling to line cycle via ELC-triggered timers, computes RMS, THD, and fundamental components. Use Value: Simultaneous 50/60 Hz rejection eliminates need for external notch filters; 24-bit resolution captures sub-millivolt variations; FPU accelerates floating-point power calculations. |
Use Scenario: Wireless vibration sensor node monitoring motor bearing health in predictive maintenance systems. IC Role / Device Role / Timing Role: Edge intelligence processor: acquires accelerometer data via DSADC, runs FFT or envelope analysis, stores trend data in data flash, and wakes periodically to transmit via SCI or CAN. Use Value: Deep sleep mode draws µA-level current; BGO allows background logging during acquisition; RTC and LPT enable precise time-stamped event capture. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-precision analog microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F523E5JDFN#50 | Same 80-pin LFQFP package, 128-KB flash, but includes LCD controller (40×4 SEG/COM); no HVAIN pins | Suitable for panel-mounted instruments requiring local display; lacks ±5-V analog input capability | Select R5F523E5JDFN#50 only when integrated LCD driving is required and high-voltage analog inputs are unnecessary |
| R5F523E5NDFP#50 | Same core specs and analog features, but 100-pin LFQFP (14×14 mm) with 58 GPIOs vs. 43 on R5F523E5NDFN#50 | Preferred for designs needing more UART/SPI peripherals, additional timers, or expanded I/O for multi-sensor fusion | Choose R5F523E5NDFP#50 when board layout accommodates larger footprint and higher pin count is needed for system scalability |
Compared with R5F523E5JDFN#50, the R5F523E5NDFN#50 trades LCD support for ±5-V HVAIN capability and smaller footprint; versus R5F523E5NDFP#50, it reduces I/O count and package size while retaining identical analog performance and safety features - making it optimal for space-constrained, sensor-front-end applications.
Availability
R5F523E5NDFN#50 is available at Aetrix Electronics and suitable for industrial sensor nodes, smart transmitters, and energy metering subsystems requiring stable component supply, long-term lifecycle support, and guaranteed –40°C to +85°C operation.
Supply support for R5F523E5NDFN#50 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for industrial, automotive, and IoT applications.
The RX23E-B Group - including the R5F523E5NDFN#50 - was designed specifically for high-accuracy sensor signal conditioning in industrial measurement equipment, integrating metrology-grade analog front ends with functional safety features aligned with IEC60730.
FAQ
What is the maximum sampling rate of the 24-bit delta-sigma ADC in the R5F523E5NDFN#50?
The R5F523E5NDFN#50 supports a maximum delta-sigma ADC sampling rate of 31.25 kSPS. This rate is achieved with modulator clock fMOD = 4 MHz and appropriate sinc filter configuration. At lower data rates (e.g., 10 or 54 SPS), the device provides simultaneous 50 Hz and 60 Hz line-frequency rejection - a key capability for industrial AC-powered sensor systems. The R5F523E5NDFN#50 maintains 24-bit effective resolution across its full programmable range from 3.8 SPS to 31.25 kSPS.
Does the R5F523E5NDFN#50 include a CAN interface, and what standard does it comply with?
Yes, the R5F523E5NDFN#50 integrates one CAN module (RSCAN) compliant with ISO 11898-1, supporting both standard (11-bit) and extended (29-bit) frame formats at data rates up to 1 Mbps. It includes 16 message buffers, configurable acceptance filtering, and automatic retransmission. The R5F523E5NDFN#50 uses dedicated CANH and CANL pins routed to the 80-pin LFQFP package, enabling direct connection to industry-standard CAN transceivers for industrial fieldbus and automotive diagnostic applications.
What analog input voltage range does the R5F523E5NDFN#50 support, and how is it implemented?
The R5F523E5NDFN#50 supports a ±5-V analog input range via four dedicated HVAIN pins (HVAIN0–HVAIN3). These pins are electrically isolated from standard I/O and tolerate ±10-V transients per Renesas specifications. Internally, the signal routes through the rail-to-rail programmable gain instrumentation amplifier before digitization by the 24-bit delta-sigma ADC. This architecture allows direct connection of bridge sensors and industrial transducers without external level-shifting or amplification - a defining feature of the R5F523E5NDFN#50 within the RX23E-B family.
How does the R5F523E5NDFN#50 support IEC60730 compliance for Class B safety applications?
The R5F523E5NDFN#50 includes hardware-assisted self-test features required for IEC60730 Class B certification: built-in ADC self-diagnostic and disconnect detection, clock frequency accuracy measurement circuit (CAC), independent watchdog timer (IWDT) with dedicated oscillator, RAM test assistance via data operation circuit (DOC), and analog voltage fault detection on DSAD reference and excitation current paths. These capabilities are documented in the R5F523E5NDFN#50 datasheet and enable systematic fault coverage without requiring full software-based runtime checks.
What is the operating temperature range and package type of the R5F523E5NDFN#50?
The R5F523E5NDFN#50 is rated for industrial operation from –40°C to +85°C (D-version) and is supplied in an 80-pin Low-Profile Quad Flat Package (LFQFP) with 12 × 12 mm body size and 0.5 mm pin pitch (PLQP0080KB-B). This package includes an exposed thermal pad for enhanced heat dissipation and is compatible with standard surface-mount assembly processes. The R5F523E5NDFN#50's pinout and thermal characteristics are fully specified in Renesas' official documentation for reliable integration into compact, convection-cooled industrial modules.
R5F523E5NDFN#50 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 80-LQFP
- Series:
- RX23E-B
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 32MHz
- Connectivity:
- CANbus, I2C, SCI, SPI, UART/USART
- Peripherals:
- DMA, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 43
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 5.5V
- Data Converters:
- A/D 8x12b SAR, 8x24b Sigma-Delta; D/A 1x16b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F523E5NDFN#50 FAQ
1.How can I place an order for R5F523E5NDFN#50 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F523E5NDFN#50 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F523E5NDFN#50 reliable?
The price and inventory of R5F523E5NDFN#50 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F523E5NDFN#50 is usually 5 days.
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Once your R5F523E5NDFN#50 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F523E5NDFN#50?
For technical support, including R5F523E5NDFN#50 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F523E5NDFN#50 requirements.
6.How does Aetrix verify that R5F523E5NDFN#50 is sourced from the original manufacturer or authorized distributors?
All R5F523E5NDFN#50 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F523E5NDFN#50 meets industry standards.
7.What is the process for return or replacement of R5F523E5NDFN#50?
All R5F523E5NDFN#50 units undergo pre-shipment inspection (PSI). If there is an issue with R5F523E5NDFN#50, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F523E5NDFN#50 part is unused and in its original packaging.
Return procedure for R5F523E5NDFN#50:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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