Renesas R5F523E6NDBS#20
- Part No.:
- R5F523E6NDBS#20
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-TFBGA
- Datasheet:
-
R5F523E6NDBS#20.pdf
- Description:
- 32BIT MCU RX23E-B 256K LFBGA100
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F523E6NDBS#20 from Renesas is a 32-bit RXv2 microcontroller optimized for high-precision analog measurement in industrial sensing applications. It integrates a 24-bit delta-sigma ADC with 31.25 kSPS max sampling rate, ±5-V input range, rail-to-rail programmable gain instrumentation amplifier (gain = 1–128), on-chip excitation current sources (50–1000 µA), and a 2.5-V low-drift voltage reference (8 ppm/°C). Operating at up to 32 MHz with 256 KB flash and 32 KB SRAM, it targets load cell, pressure sensor, and weigh scale front-end systems.
For engineers reviewing the R5F523E6NDBS#20 datasheet, R5F523E6NDBS#20 pinout, R5F523E6NDBS#20 application, or R5F523E6NDBS#20 equivalent, key selection criteria include its 31.25 kSPS delta-sigma ADC performance at ±5 V full-scale, integrated PGA and excitation sources for bridge sensor conditioning, CAN 2.0B interface compliance, and TFBGA-100 package with 5.5 × 5.5 mm footprint for space-constrained designs.
Technical Context
The R5F523E6NDBS#20 implements the RXv2 CPU core with IEEE 754-compliant 32-bit FPU, 64 DMIPS @ 32 MHz, and memory protection unit (MPU) for functional safety support. Its analog subsystem centers on the DSADB module-synchronized to PCLKC (≤16 MHz)-with fourth- and fifth-order sinc digital filters, simultaneous 50/60 Hz rejection at 10/54 SPS, and offset/gain error calibration.
Digital integration includes one ISO 11898-1 CAN channel (up to 1 Mbps), six SCIg interfaces (asynchronous/clock-sync/smart card), one RIICa I²C bus (400 kbps), one RSPIc (16 Mbps), and ELC-driven event-triggered A/D conversion-enabling low-CPU-overhead sensor acquisition while maintaining deep-sleep power states.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC Harvard architecture, 32 MHz max, 64 DMIPS, IEEE 754 FPU, MPU |
| Flash / RAM / Data Flash | 256 KB on-chip flash (no wait @ 32 MHz), 32 KB SRAM (no wait), 8 KB data flash (1M erase cycles) |
| 24-bit Delta-Sigma ADC | 31.25 kSPS max sampling rate, ±5-V input range, 24-bit resolution, sinc4/sinc5 filtering |
| PGA & Analog Front End | Rail-to-rail PGA (gain = 1–128), two excitation current sources (50–1000 µA, ±0.2% matching), 2.5-V ref (8 ppm/°C) |
| Communication Interfaces | 1× CAN 2.0B (1 Mbps), 6× SCIg, 1× RIICa (I²C/SMBus), 1× RSPIc (16 Mbps) |
| Package & Temp Range | TFBGA-100 (PTBG0100KD-A), 5.5 × 5.5 mm, 0.5 mm pitch, –40°C to +85°C (D version) |
| Power Supply | Single 1.8–5.5 V VCC supply; AVCC0 = 4.5–5.5 V for analog operation |
Pinout & Package
Package: PTBG0100KD-A - 100-pin TFBGA, 5.5 × 5.5 mm, 0.5 mm pitch, exposed thermal pad, RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, VSS | Core power supply / ground | 1.8–5.5 V digital supply; decoupling required per Renesas layout guidelines |
| AVCC0, AVSS0 | Analog power supply / ground | 4.5–5.5 V dedicated analog rail; separate from digital VCC for noise isolation |
| HVAIN0–HVAIN3 | High-voltage analog inputs | ±5-V differential/single-ended inputs; support direct connection to bridge sensors |
| DSAD_VREFH / DSAD_VREFL | Delta-sigma ADC reference | Accept external 2.5-V reference or internal VREF output; enables ratiometric measurement |
| IEXC0, IEXC1 | Excitation current outputs | Programmable 50–1000 µA constant-current sources for RTD/strain gauge biasing |
| CANH / CANL | CAN bus differential pair | ISO 11898-1 compliant physical layer interface; requires external termination resistor |
| XTAL / EXTAL | Main clock oscillator terminals | Support 1–20 MHz crystal; essential for precise timing of ADC sampling and CAN bit rate |
Key Features
| Feature | Design Value |
|---|---|
| Integrated sensor signal chain | On-die PGA, excitation sources, ±5-V HVAIN pins, and 24-bit DSAD eliminate need for external signal-conditioning ICs |
| IEC 60730 safety support | Built-in self-test functions for ADC, clock accuracy (CAC), IWDT, RAM (via DOC), and analog disconnect detection |
| Event-driven low-power operation | ELC enables autonomous A/D conversion trigger and peripheral coordination without CPU wake-up |
| High-accuracy voltage reference | 2.5-V internal reference with 8 ppm/°C drift (–40 to +85°C) ensures stable ADC full-scale over temperature |
| Robust communication suite | CAN 2.0B + multiple SCI channels + I²C + RSPI enable mixed-protocol industrial network edge node design |
Applications
| Industrial Weigh Scales | Pressure Transmitters |
|---|---|
|
Use Scenario: Digital weighing system measuring load cells with mV/V output under varying ambient temperatures. IC Role / Device Role / Timing Role: Primary analog front-end MCU performing ratiometric A/D conversion, PGA gain control, temperature compensation, and CAN-based weight reporting. Use Value: 31.25 kSPS sampling with sinc filtering rejects 50/60 Hz line noise; ±0.2% excitation current matching ensures bridge balance stability across temperature. |
Use Scenario: 4–20 mA loop-powered pressure transmitter with HART modulation capability. IC Role / Device Role / Timing Role: Sensor interface MCU acquiring piezoresistive bridge signals, executing linearization algorithms via FPU, and managing HART-compatible SCI communication. Use Value: Integrated 2.5-V reference and low-drift PGA (4 nV/°C offset drift) maintain <0.1% FS accuracy over –40°C to +85°C operating range. |
| Temperature Monitoring Nodes | Multi-Sensor Industrial Gateways |
|
Use Scenario: DIN-rail mounted RTD/thermocouple monitoring module with local display and CAN bus telemetry. IC Role / Device Role / Timing Role: Dual-role controller: analog acquisition engine (RTD excitation, cold-junction compensation) and CAN protocol stack host. Use Value: Two independent excitation current sources (IEXC0/IEXC1) allow simultaneous 2-wire/3-wire RTD measurement without external switches or muxes. |
Use Scenario: Edge gateway aggregating data from multiple analog sensors (load cell, pressure, temp) and forwarding via CAN to PLC. IC Role / Device Role / Timing Role: Central sensor hub MCU with concurrent DSAD acquisition, 12-bit S12AD for auxiliary signals, and real-time CAN message scheduling. Use Value: ELC-linked timer-triggered A/D conversion enables deterministic multi-channel sampling with sub-microsecond jitter-critical for synchronized sensor fusion. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-precision analog measurement MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F523E6LDBS#20 | Same package and core; supports 125 kSPS DSAD sampling and ±10-V input range | Required for higher-resolution bridge measurements beyond ±5 V (e.g., 20 mV/V load cells at 10 V excitation) | Select when full-scale analog input exceeds ±5 V or >31.25 kSPS sampling is needed |
| R5F523E5NDBS#20 | Same DSAD specs (31.25 kSPS, ±5 V), but reduced memory: 128 KB flash / 16 KB RAM | Suitable for cost-sensitive, lower-complexity firmware (e.g., basic sensor readout without floating-point math) | Choose when application firmware fits within 128 KB flash and does not require extensive buffer or algorithm memory |
Compared with R5F523E6NDBS#20, R5F523E6LDBS#20 extends analog input range and sampling rate for higher dynamic range applications, while R5F523E5NDBS#20 reduces memory capacity and cost for simpler implementations-both retain identical pinout, peripheral set, and TFBGA-100 packaging.
Availability
R5F523E6NDBS#20 is available at Aetrix Electronics and suitable for industrial weigh scales, pressure transmitters, temperature monitoring nodes, and multi-sensor gateways requiring stable component supply and long-term production continuity.
Supply support for R5F523E6NDBS#20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for industrial, automotive, and IoT markets.
The RX23E-B Group-including R5F523E6NDBS#20-is designed specifically for high-accuracy sensor signal acquisition in industrial automation, featuring integrated delta-sigma ADCs, PGAs, excitation sources, and functional safety support.
FAQ
What is the maximum sampling rate of the 24-bit delta-sigma ADC in R5F523E6NDBS#20?
The R5F523E6NDBS#20 supports a maximum sampling rate of 31.25 kSPS for its 24-bit delta-sigma ADC (DSADB). This rate is achieved with modulator clock fMOD = 4 MHz and applies to configurations using sinc4 or sinc5 digital filters. At lower data rates (e.g., 10 or 54 SPS), the device provides simultaneous 50/60 Hz rejection for industrial noise immunity.
Does R5F523E6NDBS#20 support ±10-V analog inputs?
No, R5F523E6NDBS#20 supports a maximum analog input range of ±5 V on its HVAIN pins. The ±10-V input capability is exclusive to variants with 'K' or 'L' in the part number (e.g., R5F523E6KDBS#20 or R5F523E6LDBS#20). This distinction is defined in Renesas' part numbering scheme and confirmed in Table 1.3 of the R01DS0402EJ0100 datasheet.
What package type and footprint does R5F523E6NDBS#20 use?
R5F523E6NDBS#20 uses the PTBG0100KD-A package: a 100-pin TFBGA with 5.5 × 5.5 mm body size, 0.5 mm ball pitch, and an exposed thermal pad. This compact, high-density package is optimized for space-constrained industrial modules and supports standard reflow soldering profiles per J-STD-020.
Can R5F523E6NDBS#20 operate with a single 3.3-V supply?
Yes, R5F523E6NDBS#20 operates across 1.8–5.5 V VCC, so a nominal 3.3-V supply is fully supported. However, AVCC0 must be supplied at 4.5–5.5 V to guarantee full analog performance-including specified DSAD effective resolution, PGA gain accuracy, and excitation current source stability-as stated in the "Power supply voltages/Operating frequencies" section (Page 6).
Is CAN interface support included in R5F523E6NDBS#20?
Yes, R5F523E6NDBS#20 integrates one fully compliant ISO 11898-1 CAN 2.0B module (RSCAN) supporting data rates up to 1 Mbps. It includes 16 message boxes, programmable bit timing, and loopback/self-test modes-making it suitable for industrial fieldbus connectivity without external CAN controllers or transceivers.
R5F523E6NDBS#20 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-TFBGA
- Series:
- RX23E-B
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 32MHz
- Connectivity:
- CANbus, I2C, SCI, SPI, UART/USART
- Peripherals:
- DMA, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 58
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 32K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 5.5V
- Data Converters:
- A/D 8x12b SAR, 8x24b Sigma-Delta; D/A 1x16b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F523E6NDBS#20 FAQ
1.How can I place an order for R5F523E6NDBS#20 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F523E6NDBS#20 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F523E6NDBS#20 reliable?
The price and inventory of R5F523E6NDBS#20 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F523E6NDBS#20 is usually 5 days.
3.What payment methods are accepted for R5F523E6NDBS#20?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F523E6NDBS#20 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F523E6NDBS#20?
R5F523E6NDBS#20 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F523E6NDBS#20 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F523E6NDBS#20?
For technical support, including R5F523E6NDBS#20 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F523E6NDBS#20 requirements.
6.How does Aetrix verify that R5F523E6NDBS#20 is sourced from the original manufacturer or authorized distributors?
All R5F523E6NDBS#20 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F523E6NDBS#20 meets industry standards.
7.What is the process for return or replacement of R5F523E6NDBS#20?
All R5F523E6NDBS#20 units undergo pre-shipment inspection (PSI). If there is an issue with R5F523E6NDBS#20, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F523E6NDBS#20 part is unused and in its original packaging.
Return procedure for R5F523E6NDBS#20:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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