Renesas R5F562G7AGFH#V3
- Part No.:
- R5F562G7AGFH#V3
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 112-LQFP
- Datasheet:
-
R5F562G7AGFH#V3.pdf
- Description:
- 32BIT MCU RX62G
- Quantity:
- Payment:

- Shipping:

Inventory:3,671
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Product details
Overview
R5F562G7AGFH#V3 from Renesas Electronics is a 100-MHz 32-bit RX62G Group microcontroller with integrated FPU, 128-Kbyte flash, 8-Kbyte SRAM, and dual 12-bit ADC units (4 channels each) supporting simultaneous 7-channel sampling. It features eight 16-bit MTU3 timers with three-phase complementary PWM, four 16-bit GPTa timers with sub-312-ps PWM delay control, CAN interface, and IEC 60730-compliant safety functions - deployed in industrial motor control and power conversion systems.
For engineers reviewing the R5F562G7AGFH#V3 datasheet, R5F562G7AGFH#V3 pinout, R5F562G7AGFH#V3 application, or R5F562G7AGFH#V3 equivalent, key selection criteria include its 112-pin LQFP package, –40°C to +105°C operating range (G version), 4.0–5.5-V supply, CAN support, and hardware-accelerated PWM dead-time generation for inverter gate driving.
Technical Context
The R5F562G7AGFH#V3 implements the 32-bit RX CPU core with Harvard architecture, 5-stage pipeline, and IEEE-754 single-precision FPU delivering 165 DMIPS at 100 MHz. Its memory subsystem includes 128-Kbyte on-chip flash (no wait states at full speed), 8-Kbyte SRAM, and 8-Kbyte data flash rated for 30,000 write/erase cycles.
Peripherals are clocked via independent ICLK (8–100 MHz) and PCLK (8–50 MHz) domains. The MCU integrates IEC 60730-compliant safety features including independent watchdog timer (IWDT), CRC calculator, self-diagnostic ADC, oscillation stop detection, and PORT register monitoring - all required for Class B functional safety certification in motor drives.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RX 32-bit CISC with 5-stage pipeline, 165 DMIPS @ 100 MHz |
| Max Operating Frequency | 100 MHz system clock (ICLK), enabling real-time PWM waveform generation with 10-ns resolution |
| Memory | 128-Kbyte flash (0-wait-state execution), 8-Kbyte SRAM, 8-Kbyte data flash (30k cycles) |
| Analog Peripherals | Dual 12-bit S12ADA (4 ch × 2 units) + single 10-bit ADA (12 ch); simultaneous 7-ch sampling supported |
| PWM Capability | 8× MTU3 (three-phase complementary PWM, automatic dead-time insertion) + 4× GPTa (sub-312-ps delay control) |
| Safety Features | IEC 60730-compliant IWDT, CRC unit, ADC self-test, LVD, oscillation stop detection, PORT monitoring |
| Package & Temp | PLQP0112JA-A (112-pin LQFP, 20×20 mm, 0.65-mm pitch), –40°C to +105°C (G-grade) |
Pinout & Package
Package: PLQP0112JA-A - 112-pin LQFP, 20 mm × 20 mm, 0.65 mm pitch, lead-free (Sn finish), tray packaging (#V).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Primary 4.0–5.5-V digital supply pins; multiple VCC/VSS pairs ensure low-noise operation and robust decoupling |
| AVCC / AVSS | Analog power / Analog ground | Dedicated 4.0–5.5-V analog supply domain isolates ADC and PGA from digital noise |
| XTAL / EXTAL | Crystal oscillator input/output | Supports 8–12.5 MHz external crystal for precise clock source; enables PLL-based 100-MHz system clock |
| MTU3_0A / MTU3_0B | Three-phase PWM output pair | Complementary high-side/low-side outputs with hardware-enforced non-overlap; used for inverter leg control |
| AD00–AD07 | Analog input channels | Eight dedicated pins for 12-bit S12ADA Unit 0; support programmable gain amplifier and window comparator |
| CAN_TX / CAN_RX | CAN bus transceiver interface | Differential signaling pins compliant with ISO 11898-1; support 32-mailbox message handling |
Key Features
| Feature | Design Value |
|---|---|
| Hardware PWM Dead-Time Control | Automatic insertion of non-overlap time between complementary PWM signals eliminates shoot-through risk in 3-phase inverters without CPU overhead |
| Sub-312-ps PWM Delay Resolution | GPTa timers enable ultra-fine edge timing control (1/32 × ICLK period @ 100 MHz) for precise gate drive skew compensation |
| Dual 12-bit ADC with Simultaneous Sampling | Two independent S12ADA units sample up to 7 channels concurrently - critical for vector-controlled motor current sensing |
| IEC 60730 Safety Hardware | Integrated IWDT, CRC calculator, ADC self-test, and oscillation monitoring meet Class B requirements without external components |
| Programmable Gain Amplifier (PGA) | 11-step gain (2× to 13.33×) per ADC channel enables direct connection to low-level current-sense shunts |
Applications
| Industrial Motor Drive | Switch-Mode Power Supply (SMPS) |
|---|---|
Use Scenario: Closed-loop field-oriented control (FOC) of 3-phase AC induction or PMSM motors in HVAC compressors and industrial pumps. IC Role / Device Role / Timing Role: Main controller executing FOC algorithm, generating synchronized three-phase PWM, sampling phase currents via dual ADC, and managing CAN-based supervisory communication. Use Value: Hardware-accelerated PWM dead-time and sub-312-ps delay control ensure precise gate timing, minimizing switching losses and preventing inverter shoot-through. | Use Scenario: Digital control of resonant LLC and phase-shifted full-bridge converters in telecom rectifiers and server PSUs. IC Role / Device Role / Timing Role: Real-time voltage/current regulation loop executor with 100-MHz PWM update rate, ADC-triggered sampling, and fault response under 1 µs. Use Value: Simultaneous 7-channel ADC sampling captures primary/secondary waveforms and temperature sensors in one cycle, enabling predictive control and fast overcurrent shutdown. |
| Uninterruptible Power Supply (UPS) | Grid-Tied Solar Inverter |
Use Scenario: Bidirectional AC/DC and DC/AC conversion with battery management and seamless transfer switching. IC Role / Device Role / Timing Role: System coordinator managing inverter modulation, battery charging profiles, grid synchronization, and CAN/LIN communication with BMS and display modules. Use Value: Integrated CAN interface and IEC 60730 safety hardware reduce BOM count and accelerate functional safety certification for UL 1778 compliance. | Use Scenario: MPPT tracking and grid-synchronized DC/AC inversion in residential and commercial photovoltaic systems. IC Role / Device Role / Timing Role: High-accuracy ADC sampling of PV string voltage/current and grid voltage phase, coupled with real-time PWM generation and anti-islanding detection logic. Use Value: Dual 12-bit ADC units with programmable gain amplifiers directly interface shunt-based current sensors, eliminating external signal conditioning ICs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F562TAAGFH#V3 | Same RX62G package and pinout; 256-Kbyte flash, 16-Kbyte SRAM, 32-Kbyte data flash - higher memory capacity | Preferred for complex motor control firmware with large lookup tables or dual-application code storage | Select when firmware size exceeds 128 Kbytes or extended data logging requires >8 Kbytes data flash |
| R5F562G7ADFH#V3 | Identical memory, peripherals, and package; D-grade (-40°C to +85°C) instead of G-grade (-40°C to +105°C) | Suitable for indoor industrial environments where ambient temperature remains below +85°C | Choose for cost-sensitive designs where extended temperature operation is not required |
Compared with R5F562G7AGFH#V3, R5F562TAAGFH#V3 offers greater memory headroom for feature-rich firmware, while R5F562G7ADFH#V3 provides identical functionality at lower thermal grade - enabling trade-offs between reliability margin, cost, and code complexity without PCB redesign.
Availability
R5F562G7AGFH#V3 is available at Aetrix Electronics and suitable for industrial motor drives, uninterruptible power supplies, and grid-tied solar inverters requiring stable component supply, long-term lifecycle assurance, and automotive-grade thermal reliability.
Supply support for R5F562G7AGFH#V3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power devices for industrial, automotive, and IoT applications.
The RX62G Group targets high-performance industrial control, featuring hardware safety extensions, precision analog integration, and deterministic real-time PWM - optimized for motor control, power conversion, and factory automation.
FAQ
What is the maximum operating frequency and CPU performance of the R5F562G7AGFH#V3?
The R5F562G7AGFH#V3 operates at a maximum system clock frequency of 100 MHz, delivering 165 DMIPS of processing performance using the 32-bit RX CPU core. Its Harvard architecture with 5-stage pipeline, single-cycle 32×32-bit multiplication, and IEEE-754-compliant FPU enables deterministic execution of motor control algorithms and real-time signal processing tasks within the R5F562G7AGFH#V3's hardware resources.
Does the R5F562G7AGFH#V3 support CAN communication, and what configuration is required?
Yes, the R5F562G7AGFH#V3 integrates a CAN module compliant with ISO 11898-1, supporting 32 mailboxes and bit rates up to 1 Mbps. It requires external CAN transceiver circuitry and proper termination. The CAN peripheral is enabled in the device configuration tool, and the R5F562G7AGFH#V3's CAN_TX/CAN_RX pins must be routed to the transceiver - no additional software stack licensing is needed for basic CAN FD or classical CAN operation in the R5F562G7AGFH#V3.
What ADC capabilities does the R5F562G7AGFH#V3 provide for motor current sensing?
The R5F562G7AGFH#V3 includes two independent 12-bit S12ADA units (4 channels each) and one 10-bit ADA unit (12 channels), with simultaneous 7-channel sampling capability. Each 12-bit unit supports programmable gain amplifiers (11-step, up to 13.33×), sample-and-hold circuits, and window comparators - enabling direct high-resolution current sensing across three motor phases plus auxiliary signals without external op-amps in the R5F562G7AGFH#V3 design.
How does the R5F562G7AGFH#V3 meet IEC 60730 Class B safety requirements?
The R5F562G7AGFH#V3 integrates hardware-level IEC 60730 Class B compliance features: independent watchdog timer (IWDT) with dedicated LOCO clock, CRC calculator for memory and data integrity, ADC self-diagnostic function, oscillation stop detection, and PORT register monitoring. These are implemented in silicon and require no external components - allowing certified safety routines to run within the R5F562G7AGFH#V3 without compromising real-time performance.
What is the package type and thermal rating of the R5F562G7AGFH#V3?
The R5F562G7AGFH#V3 uses the PLQP0112JA-A package: a 112-pin LQFP measuring 20 mm × 20 mm with 0.65-mm pitch and lead-free (Sn) surface finish. It is rated for operation from –40°C to +105°C (G-grade), making it suitable for high-temperature industrial environments such as enclosed motor drives and outdoor power electronics where the R5F562G7AGFH#V3 maintains full specification compliance.
R5F562G7AGFH#V3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 112-LQFP
- Series:
- RX600
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RX
- Core Size:
- 32-Bit
- Speed:
- 100MHz
- Connectivity:
- CANbus, I2C, LINbus, SCI, SPI, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 61
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 8K x 8
- Voltage - Supply (Vcc/Vdd):
- 4V ~ 5.5V
- Data Converters:
- A/D 12x10b, 8x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F562G7AGFH#V3 FAQ
1.How can I place an order for R5F562G7AGFH#V3 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F562G7AGFH#V3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F562G7AGFH#V3 reliable?
The price and inventory of R5F562G7AGFH#V3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F562G7AGFH#V3 is usually 5 days.
3.What payment methods are accepted for R5F562G7AGFH#V3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F562G7AGFH#V3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F562G7AGFH#V3?
R5F562G7AGFH#V3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F562G7AGFH#V3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F562G7AGFH#V3?
For technical support, including R5F562G7AGFH#V3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F562G7AGFH#V3 requirements.
6.How does Aetrix verify that R5F562G7AGFH#V3 is sourced from the original manufacturer or authorized distributors?
All R5F562G7AGFH#V3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F562G7AGFH#V3 meets industry standards.
7.What is the process for return or replacement of R5F562G7AGFH#V3?
All R5F562G7AGFH#V3 units undergo pre-shipment inspection (PSI). If there is an issue with R5F562G7AGFH#V3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F562G7AGFH#V3 part is unused and in its original packaging.
Return procedure for R5F562G7AGFH#V3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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