Renesas R5F5630ADDFB#V0
- Part No.:
- R5F5630ADDFB#V0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
R5F5630ADDFB#V0.pdf
- Description:
- IC MCU 32BIT 768KB FLASH 144LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:3,370
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Product details
Overview
R5F5630ADDFB#V0 from Renesas is a 100-MHz 32-bit RX CPU-based microcontroller with single-precision IEEE-754 FPU, 768 Kbytes on-chip flash, 96 Kbytes SRAM, and integrated USB 2.0 full-speed, CAN, 12-bit A/D (21 ch), 10-bit D/A (2 ch), RTC, and 144-pin LQFP package. It targets industrial motor control and embedded HMI applications requiring deterministic real-time response and functional safety support.
For engineers reviewing the R5F5630ADDFB#V0 datasheet, R5F5630ADDFB#V0 pinout, R5F5630ADDFB#V0 application, or R5F5630ADDFB#V0 equivalent, key selection criteria include its 100 MHz operation with 165 DMIPS, 4-channel DMA + DTC, 32-bit multiplier with 1-cycle execution, IEC60730-compliant self-test features, and 144-pin 20×20 mm 0.5-mm-pitch LQFP footprint.
Technical Context
The R5F5630ADDFB#V0 implements the RXv1 CPU core with CISC Harvard architecture, 5-stage pipeline, and variable-length instructions enabling ultra-compact code density. It integrates dual clock domains: ICLK up to 100 MHz for CPU/core logic and PCLK up to 50 MHz for peripherals, with independent division/multiplication settings per domain.
Its peripheral set includes three CAN channels compliant with ISO11898-1 (32 mailboxes each), 13 SCI channels supporting asynchronous, SPI, I²C, and LIN modes, and dual A/D converters - one 12-bit unit (21 channels, 1 µs conversion at 50 MHz PCLK) and one 10-bit unit (8 channels) - both supporting software, timer, and external trigger start.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv1 32-bit CISC Harvard with 5-stage pipeline, 165 DMIPS @ 100 MHz |
| Max Operating Frequency | 100 MHz system clock (ICLK); supports 165 DMIPS and IEEE-754 single-precision FPU |
| Memory | 768 Kbytes flash (no wait states @ 100 MHz), 96 Kbytes SRAM (no wait states), 32 Kbytes data flash (100k write cycles) |
| Analog Peripherals | 12-bit A/D converter (21 channels, 1 µs/ch @ 50 MHz PCLK), 10-bit A/D (8 channels), 10-bit D/A (2 channels), on-die temperature sensor (±1°C) |
| Communication Interfaces | USB 2.0 full-speed (12 Mbps), CAN (3 channels, ISO11898-1), SCI (13 channels), I²C (4 channels, 1 Mbps), RSPI (3 channels), IEBus (1 channel) |
| Timers & Control | MTU2 (6 ch), TPU (12 ch), TMR (4 ch), CMT (4 ch), RTC with battery backup, IWDT with dedicated 125-kHz LOCO clock |
| Package & Environment | PLQP0144KA-A: 144-pin LQFP, 20×20 mm, 0.5-mm pitch; operating temp −40 to +85°C (D version) |
Pinout & Package
Package: PLQP0144KA-A - 144-pin Low-profile Quad Flat Package, 20 mm × 20 mm body, 0.5 mm lead pitch, exposed thermal pad (non-electrical), RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Dedicated power/ground pairs per quadrant; decoupling required per datasheet layout guidelines |
| XTAL / EXTAL | Main crystal oscillator interface | Supports 4–16 MHz crystal; enables PLL-based 100 MHz system clock generation |
| XCOUT / XCIN | Sub-clock oscillator interface | Connects 32.768 kHz crystal for RTC and low-power mode timing |
| RES# | Active-low reset input | Asynchronous hardware reset; initiates POR sequence and register initialization |
| MD | Mode selection input | Configures single-chip vs. extended mode at power-on; must be stable before reset release |
| EMLE / TRST# / TMS / TDI / TCK / TDO | JTAG/FINE debug interface | Enables E1/E20 emulator connection; EMLE high activates on-chip debugging circuitry |
| VBATT | Battery backup supply | Powers RTC and backup registers during main VCC loss; min. 2.3 V operation |
| A0–A23 / D0–D31 | External bus interface | 8 CS areas (16 MB each); supports 8/16/32-bit multiplexed or separate address/data bus configurations |
Key Features
| Feature | Design Value |
|---|---|
| Floating-point unit (FPU) | IEEE-754 single-precision compliance enables deterministic math for motor control algorithms without software emulation overhead |
| IEC60730 safety support | Integrated oscillation-stop detection, CRC calculator (3 polynomials), IWDT, and A/D self-diagnostic reduce external safety component count |
| Low-power operation | Four modes (sleep, all-module stop, software standby, deep software standby) with RTC active in deep standby using VBATT |
| Peripheral flexibility | SCI channels configurable as UART, SPI, I²C, smart-card, or LIN; RSPI supports 8–32-bit frames and double-buffered TX/RX |
| Real-time timer subsystem | MTU2 + TPU + PPG enable synchronized PWM generation, encoder phase counting, and precise event-triggered A/D sampling |
Applications
| Industrial Motor Control | Building Automation Gateway |
|---|---|
Use Scenario: Closed-loop control of 3-phase BLDC/PMSM motors with field-oriented control (FOC) and current sensing. IC Role / Device Role / Timing Role: Main controller executing FOC algorithm, managing PWM outputs via MTU2 complementary mode, and sampling current/voltage via 12-bit A/D with hardware trigger synchronization. Use Value: 100 MHz CPU + FPU delivers sub-µs loop timing; 21-channel A/D supports simultaneous current/voltage/temperature acquisition; CAN interface enables multi-axis coordination. | Use Scenario: Protocol translation hub connecting BACnet MS/TP field devices to Ethernet/IP backbone in HVAC systems. IC Role / Device Role / Timing Role: Dual-role processor: SCI5/6/12 handle RS-485 BACnet physical layer, while USB and Ethernet MAC (via external PHY) manage upstream communication. Use Value: 13 SCI channels allow concurrent legacy protocol handling; USB 2.0 full-speed supports firmware updates and diagnostics; RTC enables time-stamped event logging. |
| Medical Infusion Pump | Smart Energy Metering |
Use Scenario: Safety-critical drug delivery system requiring IEC60601-1 compliance and real-time flow rate control. IC Role / Device Role / Timing Role: Primary MCU performing dose calculation, stepper/servo motor control, pressure sensing, and fault monitoring with redundant watchdogs (WDTA + IWDTA). Use Value: IEC60730-certified features (CRC, A/D self-test, clock monitoring) satisfy Class C safety requirements; 10-bit D/A drives analog pump actuator; temperature sensor validates thermal integrity. | Use Scenario: DIN-rail mounted electricity meter with tariff switching, harmonic analysis, and PLC/GPRS backhaul. IC Role / Device Role / Timing Role: Metering engine acquiring voltage/current waveforms via 12-bit A/D, computing RMS/harmonics in FPU, and managing secure communication via CAN/RSPI. Use Value: 1 µs A/D conversion enables 16 kHz sampling for Class 0.2 accuracy; 32 Kbytes data flash stores calibration coefficients and tamper logs; CAN interface connects to concentrator nodes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F5630BCDFB#V0 | 1 Mbyte flash, same 96 Kbytes RAM, identical 144-pin LQFP package and peripheral set | Higher firmware storage headroom for bootloader + application + OTA update partitioning | Select when future firmware growth exceeds 768 Kbytes or dual-bank update schemes are required |
| R5F5630ADDFC#V0 | Same 768 Kbytes flash/96 Kbytes RAM, but 176-pin LQFP (PLQP0176KB-A), 24×24 mm, 0.5 mm pitch | Additional GPIO (148 vs. 117 pins), expanded external bus (32-bit vs. 16-bit), and extra SCI/RSPI/CAN channels | Select when more I/O, external memory expansion, or higher peripheral channel count is needed |
Compared with R5F5630BCDFB#V0 and R5F5630ADDFC#V0, the R5F5630ADDFB#V0 offers optimal balance of flash capacity, pin count, and cost for mid-tier industrial controllers where 768 Kbytes suffices and 144-pin LQFP simplifies PCB routing versus 176-pin variants.
Availability
R5F5630ADDFB#V0 is available at Aetrix Electronics and suitable for industrial motor control, building automation gateways, medical infusion pumps, and smart energy metering requiring stable component supply across multi-year production cycles.
Supply support for R5F5630ADDFB#V0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering trusted embedded solutions for automotive, industrial, infrastructure, and IoT markets.
The RX630 Group is designed for real-time industrial control applications demanding high computational throughput, functional safety compliance (IEC60730), and rich connectivity - targeting motor drives, PLCs, HMIs, and medical equipment.
FAQ
What is the maximum operating frequency and CPU performance of the R5F5630ADDFB#V0?
The R5F5630ADDFB#V0 operates at a maximum frequency of 100 MHz and delivers 165 DMIPS of processing performance using the RXv1 32-bit CPU core. Its single-precision IEEE-754 floating-point unit enables efficient execution of control algorithms without software emulation overhead, making it suitable for demanding real-time applications like motor control and digital power conversion where deterministic timing is critical. The R5F5630ADDFB#V0 achieves this performance with no wait states on its 768 Kbytes flash and 96 Kbytes SRAM.
Does the R5F5630ADDFB#V0 support functional safety standards such as IEC60730?
Yes, the R5F5630ADDFB#V0 includes multiple hardware features certified for IEC60730 Class B and Class C compliance, including oscillation-stop detection, built-in CRC calculator with three selectable polynomials, independent watchdog timer (IWDTA) with dedicated 125-kHz LOCO clock, and self-diagnostic functions for the 10-bit A/D converter. These capabilities reduce external component count and simplify safety certification for household appliances, medical devices, and industrial controls. The R5F5630ADDFB#V0 leverages these features to meet stringent runtime integrity requirements without requiring additional safety monitors.
What communication interfaces are integrated into the R5F5630ADDFB#V0?
The R5F5630ADDFB#V0 integrates USB 2.0 full-speed (12 Mbps), three CAN 2.0B channels (ISO11898-1 compliant, 32 mailboxes each), 13 serial communications interface (SCI) channels supporting UART, SPI, I²C, smart-card, and LIN protocols, four I²C bus interfaces (one FM+ capable at 1 Mbps), three RSPI channels, and one IEBus controller. This extensive connectivity enables heterogeneous network bridging - for example, using SCI for legacy RS-485 fieldbus, CAN for actuator coordination, and USB for configuration and diagnostics. All interfaces are accessible within the 144-pin LQFP footprint of the R5F5630ADDFB#V0.
What are the memory resources available on the R5F5630ADDFB#V0?
The R5F5630ADDFB#V0 provides 768 Kbytes of on-chip flash memory (executed at 100 MHz with zero wait states), 96 Kbytes of SRAM (also zero wait states), and 32 Kbytes of reprogrammable data flash rated for 100,000 erase/write cycles. The flash supports background programming/erasing operations, allowing firmware updates without halting application execution. The memory map is linear (4 Gbyte address space), and the MPU enforces memory protection for secure multitasking. These resources are fixed for the R5F5630ADDFB#V0 and match the "A" ROM capacity designation in Renesas' part numbering scheme.
What package type and pin count does the R5F5630ADDFB#V0 use?
The R5F5630ADDFB#V0 uses the PLQP0144KA-A package: a 144-pin Low-profile Quad Flat Package measuring 20 mm × 20 mm with 0.5 mm lead pitch and an exposed thermal pad. This package supports 117 general-purpose I/O pins (5-V tolerant, open-drain capable), 148 total I/O signals including dedicated debug and power pins, and 16 external interrupt inputs (IRQ0–IRQ15). The "FB" suffix in R5F5630ADDFB#V0 explicitly denotes the 144-pin LQFP variant, distinguishing it from 100-pin (FP), 176-pin (FC), or BGA (BG) versions of the RX630 Group.
R5F5630ADDFB#V0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 144-LQFP
- Series:
- RX600
- Packaging:
- Tray
- Product Status:
- Discontinued at Digi-Key
- Programmable:
- Not Verified
- Core Processor:
- RX
- Core Size:
- 32-Bit Single-Core
- Speed:
- 100MHz
- Connectivity:
- CANbus, EBI/EMI, I2C, LINbus, SCI, SPI, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 117
- Program Memory Size:
- 768KB (768K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 96K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 8x10b, 21x12b; D/A 2x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F5630ADDFB#V0 FAQ
1.How can I place an order for R5F5630ADDFB#V0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F5630ADDFB#V0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F5630ADDFB#V0 reliable?
The price and inventory of R5F5630ADDFB#V0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F5630ADDFB#V0 is usually 5 days.
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5.How can I obtain technical support or documentation for R5F5630ADDFB#V0?
For technical support, including R5F5630ADDFB#V0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F5630ADDFB#V0 requirements.
6.How does Aetrix verify that R5F5630ADDFB#V0 is sourced from the original manufacturer or authorized distributors?
All R5F5630ADDFB#V0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F5630ADDFB#V0 meets industry standards.
7.What is the process for return or replacement of R5F5630ADDFB#V0?
All R5F5630ADDFB#V0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F5630ADDFB#V0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F5630ADDFB#V0 part is unused and in its original packaging.
Return procedure for R5F5630ADDFB#V0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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