Renesas R5F5631ADDLK#U0
- Part No.:
- R5F5631ADDLK#U0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 145-TFLGA
- Datasheet:
-
R5F5631ADDLK#U0.pdf
- Description:
- IC MCU 32BIT 768KB FLSH 145TFLGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F5631ADDLK#U0 from Renesas is a 100 MHz 32-bit RX631 Group microcontroller with 768 KB on-chip flash memory, 128 KB SRAM, and 32 KB data flash. It features a single-precision IEEE-754 FPU, 165 DMIPS performance, 12-bit/10-bit A/D converters (21/8 channels), dual 10-bit D/A outputs, Ethernet MAC (excluded in RX631), USB 2.0 host/function interface, CAN v2.0B (2 channels), and operates from 2.7–3.6 V at –40 to +85°C in a 145-pin TFLGA package.
For engineers reviewing the R5F5631ADDLK#U0 datasheet, R5F5631ADDLK#U0 pinout, R5F5631ADDLK#U0 application, or R5F5631ADDLK#U0 equivalent, key selection criteria include its RX631-specific feature set (no Ethernet controller), 145-pin TFLGA footprint, 768 KB flash capacity, support for IEC60730 safety compliance functions, and compatibility with Renesas E1/E20 debug interfaces.
Technical Context
The R5F5631ADDLK#U0 implements the 32-bit RX CPU core with 5-stage CISC Harvard pipeline, variable-length instructions, and MPU support. It executes at 100 MHz with 165 DMIPS and includes single-precision floating-point unit compliant with IEEE-754, 32×32→64-bit multiplier, and 32/32→32-bit divider.
It integrates dual A/D converters (12-bit ×21 ch, 10-bit ×8 ch), two 10-bit D/A channels, RTC with battery backup, independent watchdog timer (IWDT) driven by dedicated 125-kHz LOCO, and cryptographic acceleration via AES-128/192/256 DEU in ECB/CBC modes - all while omitting Ethernet MAC and SDRAM controller per RX631 Group definition.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | RX 32-bit CISC Harvard CPU with 5-stage pipeline and 165 DMIPS @ 100 MHz |
| Max Operating Frequency | 100 MHz system clock (ICLK), enabling real-time deterministic execution |
| Flash Memory | 768 KB main flash, zero-wait-state access at 100 MHz for deterministic code execution |
| SRAM | 128 KB on-chip SRAM, no-wait access for both instructions and data |
| A/D Converters | 21-channel 12-bit S12AD + 8-channel 10-bit AD, each with sample-and-hold and trigger-based conversion start |
| D/A Converters | 2-channel 10-bit DA output, voltage range 0 V to VREFH for analog actuation or calibration |
| Operating Voltage | 2.7–3.6 V supply (VCC/AVCC0/VREFH/VCC_USB), supporting industrial-grade power rail stability |
| Temperature Range | –40°C to +85°C (D version), qualified for extended industrial environments |
Pinout & Package
Package: 145-pin TFLGA (PTLG0145KA-A), 7 mm × 7 mm, 0.5-mm pitch, 0.75-mm height, lead-free and RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, AVCC0, VREFH | Power supply inputs | Separate digital/analog reference rails enable noise-isolated analog measurement and stable MCU operation |
| VBATT | Battery backup supply | Supports RTC retention at 2.3–3.6 V during main power loss |
| XTAL/EXTAL | Main crystal oscillator interface | Accepts 4–16 MHz external crystal for precise system timing and PLL input |
| RES# | Active-low reset input | Hardware reset assertion compatible with open-drain or push-pull drivers |
| MD0, MD1 | Mode select pins | Configure boot mode (ROM/flash/external bus) at power-on reset |
| IRQ0–IRQ15 | External interrupt inputs | 16 dedicated edge-sensitive pins for fast asynchronous event handling |
| USB_DP/USB_DM | USB 2.0 full-speed differential pair | Integrated transceiver supports host/function/OTG without external PHY |
| TXD0/RXD0 | SCI0 serial interface | Asynchronous UART communication with programmable baud rate generator |
Key Features
| Feature | Design Value |
|---|---|
| Floating-point unit (FPU) | IEEE-754 single-precision hardware accelerator enables efficient math-intensive control algorithms |
| IEC60730 safety support | On-chip oscillation-stop detection, CRC calculator, IWDT, and A/D self-diagnostic meet Class B requirements |
| Memory protection unit (MPU) | Configurable region-based access control prevents unintended memory corruption in multitask environments |
| Background operation (BGO) | Data flash programming/erasing proceeds concurrently with CPU execution for zero-interrupt latency updates |
| Flexible clock system | Multiple on-chip oscillators (LOCO/HOCO), PLL, and independent clock domains (ICLK/PCLK/FCLK/BCLK) optimize power/performance trade-offs |
| 5-V tolerant I/O | 18 pins tolerate 5 V logic levels, simplifying interface with legacy peripherals and level-shifting circuits |
Applications
| Industrial HMI Controller | Smart Energy Metering |
|---|---|
Use Scenario: Embedded display controller with touch interface, real-time data logging, and secure firmware updates. IC Role / Device Role / Timing Role: Main application processor executing GUI framework, managing SPI/I2C peripherals, and coordinating USB-based field updates. Use Value: 128 KB SRAM buffers frame data; 768 KB flash stores dual-application images; AES-256 DEU secures OTA update payloads. |
Use Scenario: DIN-rail mounted electricity meter with harmonic analysis, tamper detection, and RS-485 communication. IC Role / Device Role / Timing Role: System-on-chip performing metrology calculations, RTC-based billing intervals, and isolated serial communications. Use Value: 21-channel 12-bit A/D captures multi-phase voltage/current simultaneously; CRC and IWDT satisfy IEC62056-21 and IEC61000-4-8 immunity requirements. |
| Factory Automation Node | Medical Diagnostic Interface |
Use Scenario: Edge PLC module with CANopen connectivity, analog sensor conditioning, and local PID loop execution. IC Role / Device Role / Timing Role: Real-time controller interfacing with 8-channel analog sensors, driving PWM outputs, and managing dual CAN buses. Use Value: Two CAN modules (32 mailboxes total) support redundant fieldbus links; TPU/MTU2 timers deliver sub-microsecond PWM resolution for motor control. |
Use Scenario: Portable ultrasound front-end with analog beamforming, temperature-compensated gain control, and USB data streaming. IC Role / Device Role / Timing Role: Signal acquisition and preprocessing unit synchronizing ADC sampling, DAC waveform generation, and thermal monitoring. Use Value: On-die temperature sensor (±1°C accuracy) feeds real-time compensation into 10-bit DAC outputs; 100 MHz CPU handles FIR filtering in under 10 μs per sample. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F5631ADCFL#U0 | Same RX631 core, 768 KB flash, but in 100-pin LQFP (PLQP0100KB-A) package | Lacks 5-V tolerant I/O (6 vs. 18 pins); reduced peripheral count (e.g., only 1 CAN channel) | Select when board space allows larger LQFP and cost sensitivity outweighs I/O flexibility |
| R5F563NADDLK#U0 | RX63N variant with identical 768 KB flash, 128 KB SRAM, and 145-pin TFLGA, but adds Ethernet MAC and SDRAM controller | Enables networked devices requiring TCP/IP stack offload and external memory expansion | Choose only if Ethernet connectivity and >128 KB data buffering are required; otherwise R5F5631ADDLK#U0 reduces BOM cost and complexity |
Compared with R5F5631ADCFL#U0, R5F5631ADDLK#U0 offers higher I/O voltage tolerance and richer peripheral integration in the same pin count; versus R5F563NADDLK#U0, it removes Ethernet and SDRAM support to lower power, cost, and software stack overhead for standalone embedded control.
Availability
R5F5631ADDLK#U0 is available at Aetrix Electronics and suitable for industrial HMI, smart energy metering, factory automation nodes, and medical diagnostic interfaces requiring stable component supply, long-term lifecycle assurance, and automotive-qualified manufacturing traceability.
Supply support for R5F5631ADDLK#U0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and IoT markets.
The RX631 Group is designed for cost-optimized, high-integrity embedded control applications where Ethernet is unnecessary - delivering full RX63N peripheral functionality minus Ethernet/SDRAM to reduce system complexity and certification burden.
FAQ
What is the maximum operating frequency and core performance of the R5F5631ADDLK#U0?
The R5F5631ADDLK#U0 operates at a maximum frequency of 100 MHz and delivers 165 DMIPS of processing performance using the 32-bit RX CPU core. Its single-precision IEEE-754 floating-point unit enables efficient execution of control algorithms, and the 5-stage pipeline with variable-length instructions ensures compact, high-efficiency code density. This performance level is fully sustained across its 768 KB flash and 128 KB SRAM resources.
Does the R5F5631ADDLK#U0 include an Ethernet controller?
No, the R5F5631ADDLK#U0 does not include an Ethernet controller. It belongs to the RX631 Group, which explicitly excludes the Ethernet MAC and associated EDMAC peripheral present in the RX63N Group. This omission reduces silicon area, power consumption, and software stack complexity - making R5F5631ADDLK#U0 ideal for standalone embedded controllers where wired network connectivity is not required.
What are the memory resources available on the R5F5631ADDLK#U0?
The R5F5631ADDLK#U0 integrates 768 KB of on-chip main flash memory (zero-wait-state at 100 MHz), 128 KB of SRAM (also zero-wait-state), and 32 KB of reprogrammable data flash rated for 100,000 erase/write cycles. The data flash supports background operation (BGO), allowing firmware or calibration data updates without halting CPU execution - a critical capability for field-upgradable R5F5631ADDLK#U0-based systems.
Which debug interfaces are supported by the R5F5631ADDLK#U0?
The R5F5631ADDLK#U0 supports both JTAG and FINE (two-wire) debugging interfaces, compatible with Renesas E1 and E20 emulators. These interfaces enable full-featured on-chip debugging, including breakpoints, watchpoints, real-time trace, and flash programming. The FINE interface reduces PCB routing complexity by requiring only two signal lines, while JTAG provides broader toolchain compatibility across third-party IDEs and test equipment used with the R5F5631ADDLK#U0.
How does the R5F5631ADDLK#U0 support functional safety standards like IEC60730?
The R5F5631ADDLK#U0 includes multiple hardware features for IEC60730 Class B compliance: oscillation-stop detection for main/subclocks, dedicated independent watchdog timer (IWDT) with 125-kHz LOCO clock source, CRC calculator with three polynomial options, self-diagnostic capability for the 10-bit A/D converter, and memory protection unit (MPU) for runtime memory access enforcement. These features are documented in Renesas' functional safety manual for the RX631 Group and directly apply to the R5F5631ADDLK#U0 device.
R5F5631ADDLK#U0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 145-TFLGA
- Series:
- RX600
- Packaging:
- Tray
- Product Status:
- Not For New Designs
- Programmable:
- Not Verified
- Core Processor:
- RX
- Core Size:
- 32-Bit Single-Core
- Speed:
- 100MHz
- Connectivity:
- CANbus, EBI/EMI, I2C, LINbus, SCI, SPI, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 111
- Program Memory Size:
- 768KB (768K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 128K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 8x10b, 21x12b; D/A 2x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F5631ADDLK#U0 FAQ
1.How can I place an order for R5F5631ADDLK#U0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F5631ADDLK#U0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F5631ADDLK#U0 reliable?
The price and inventory of R5F5631ADDLK#U0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F5631ADDLK#U0 is usually 5 days.
3.What payment methods are accepted for R5F5631ADDLK#U0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F5631ADDLK#U0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F5631ADDLK#U0?
R5F5631ADDLK#U0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F5631ADDLK#U0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F5631ADDLK#U0?
For technical support, including R5F5631ADDLK#U0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F5631ADDLK#U0 requirements.
6.How does Aetrix verify that R5F5631ADDLK#U0 is sourced from the original manufacturer or authorized distributors?
All R5F5631ADDLK#U0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F5631ADDLK#U0 meets industry standards.
7.What is the process for return or replacement of R5F5631ADDLK#U0?
All R5F5631ADDLK#U0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F5631ADDLK#U0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F5631ADDLK#U0 part is unused and in its original packaging.
Return procedure for R5F5631ADDLK#U0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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