Renesas R5F5631DCDLK#U0
- Part No.:
- R5F5631DCDLK#U0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 145-TFLGA
- Datasheet:
-
R5F5631DCDLK#U0.pdf
- Description:
- IC MCU 32BIT 1.5MB FLSH 145TFLGA
- Quantity:
- Payment:

- Shipping:

Inventory:2,285
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Product details
Overview
R5F5631DCDLK#U0 from Renesas is a 100 MHz 32-bit RX631 Group microcontroller featuring a single-precision IEEE-754 FPU, 1.5 Mbytes of on-chip flash memory, 128 Kbytes of SRAM, and 32 Kbytes of data flash. It integrates 12-bit and 10-bit A/D converters (21 and 8 channels), dual 10-bit D/A outputs, Ethernet MAC (not present), USB 2.0 host/function, CAN, multiple SCI/RSPI/I²C interfaces, and operates from 2.7–3.6 V across –40 to +85°C. It targets industrial HMI, motor control gateways, and networked sensor nodes requiring deterministic real-time execution and IEC 60730 safety support.
For engineers reviewing the R5F5631DCDLK#U0 datasheet, R5F5631DCDLK#U0 pinout, R5F5631DCDLK#U0 application, or R5F5631DCDLK#U0 equivalent, this page delivers verified specifications, package mapping to PTLG0145KA-A (145-pin TFLGA), confirmed peripheral channel counts per Table 1.2, functional distinctions from RX63N (no Ethernet, no SDRAM controller), and two validated alternative parts for cost- or feature-adjusted designs.
Technical Context
The R5F5631DCDLK#U0 implements the RXv1 CPU core with Harvard architecture, 5-stage pipeline, and variable-length instructions enabling ultra-compact code density. It supports memory protection (MPU), JTAG/FINE debugging, and four low-power modes - sleep, all-module clock stop, software standby, and deep software standby - with RTC backup capability via dedicated VBATT supply.
Its peripheral set excludes Ethernet MAC, EDMAC, SDRAM controller, and sub-clock oscillator (standard/low-load), per RX631 Group definition in Table 1.2. It retains full USB 2.0 host/function/OTG (1 port each), three CAN channels (2 mailboxes each), 13 SCI channels (with LIN/Smart Card modes), four I²C interfaces (1 FM+), and parallel data capture (PDC) support only on packages ≥100 pins - confirmed absent in 145-pin TFLGA configuration.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv1 32-bit CISC Harvard, 100 MHz max, 165 DMIPS, IEEE-754 single-precision FPU |
| Memory | 1.5 Mbytes flash (no wait states @100 MHz), 128 Kbytes SRAM, 32 Kbytes reprogrammable data flash (100k cycles) |
| Analog Peripherals | 21-channel 12-bit A/D (1 µs conversion @50 MHz PCLK), 8-channel 10-bit A/D, 2×10-bit D/A, on-die temperature sensor (±1°C) |
| Communication | USB 2.0 host/function/OTG (full-speed), 3×CAN (ISO 11898-1), 13×SCI, 4×I²C (1 FM+), 3×RSPI, no Ethernet or IEBus |
| Timers & Control | MTU2 (6 ch), TPU (12 ch), 4×TMR, 4×CMT, RTC with alarm/calendar, IWDT, WDT, DEU AES-128/192/256 |
| Package & Environment | PTLG0145KA-A (145-pin TFLGA, 7×7 mm, 0.5 mm pitch), –40 to +85°C, 2.7–3.6 V supply |
Pinout & Package
Package: PTLG0145KA-A - 145-pin Thin Fine-Pitch Land Grid Array, 7 mm × 7 mm body, 0.5 mm pitch, 0.75 mm height, RoHS-compliant, lead-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power / Ground | Core I/O supply (2.7–3.6 V); 22 dedicated VCC/VSS pairs ensure stable operation under mixed-signal loads |
| XTAL / EXTAL | Crystal Oscillator Input/Output | Supports 4–16 MHz external crystal; enables precise timing for USB, CAN, and RTC synchronization |
| RESET | Active-low Reset Input | Asynchronous reset assertion; compatible with external supervisor ICs and power-on reset circuitry |
| MD0 / MD1 | Mode Selection Pins | Configure boot source: ROM (flash), ROMless, or expansion mode; sampled at power-up only |
| USB_VBUSD / USB_VBUSD | USB VBUS Detection | Detect host-supplied 5 V on USB port; required for bus-powered USB device enumeration |
| TXD0 / RXD0 | SCI0 Serial Interface | Asynchronous UART interface for debug console, bootloader communication, or host MCU bridging |
Key Features
| Feature | Design Value |
|---|---|
| IEC 60730 Safety Support | Oscillation-stop detection, CRC calculator (3 polynomials), self-diagnostic A/D, IWDT, and register write protection enable Class B compliance without external components |
| Flexible Clock System | Four independent clock domains (ICLK/PCLK/FCLK/BCLK); selectable dividers/multipliers allow optimized power/performance trade-offs per subsystem |
| High-Density Peripheral Integration | 133 GPIOs (111 I/O + 1 input + pull-ups/open-drain), 5-V tolerant on 18 pins, 8-bit port switching - simplifies board routing and level-shifting in mixed-voltage systems |
| Secure Data Handling | On-chip Data Encryption Unit (DEU) accelerates AES-128/192/256 in ECB/CBC modes - enables secure firmware updates and encrypted sensor data storage |
| DMA Efficiency | DMAC (4 ch), EXDMAC (2 ch), DTC (3 ch) offload CPU during high-bandwidth transfers (USB, CAN, A/D), reducing interrupt latency and jitter |
Applications
| Industrial Motor Gateway | Building Automation Controller |
|---|---|
|
Use Scenario: Central node aggregating CAN-based servo drives, RS485 HVAC sensors, and Ethernet backhaul in factory automation. IC Role / Device Role / Timing Role: Real-time scheduler and protocol translator executing deterministic control loops while managing USB-CDC debug and CAN FD message routing. Use Value: 100 MHz RX core + MTU2/TPU timers deliver <1 µs PWM jitter; 128 Kbytes SRAM buffers multi-protocol traffic without external RAM. |
Use Scenario: Standalone HVAC controller interfacing with BACnet MS/TP field devices, local LCD HMI, and Wi-Fi module via UART/USB. IC Role / Device Role / Timing Role: Primary application processor handling UI rendering, PID loop execution, and secure OTA update verification via DEU. Use Value: Integrated 12-bit A/D reads thermistor arrays directly; USB host mode enables field technician firmware reload via thumb drive. |
| Medical Sensor Hub | Energy Metering Node |
|
Use Scenario: Portable diagnostic device acquiring ECG, SpO₂, and temperature data, then transmitting via USB or BLE bridge. IC Role / Device Role / Timing Role: Signal acquisition engine with synchronized A/D sampling, digital filtering (via DSP instructions), and CRC-protected data packaging. Use Value: On-chip 12-bit A/D with sample-and-hold and 1 µs conversion enables 1 MSPS effective sampling; temperature sensor validates thermal drift compensation. |
Use Scenario: DIN-rail mounted electricity meter with pulse counting, tariff switching, and secure data logging over RS485. IC Role / Device Role / Timing Role: Metering co-processor performing real-time energy calculation, tamper detection (LVD/WDT), and encrypted EEPROM writes. Use Value: Independent watchdog (IWDT) with dedicated LOCO clock ensures fail-safe shutdown during brownout; 32 Kbytes data flash stores 10+ years of billing logs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F563NDCDLK#U0 | RX63N variant: adds Ethernet MAC, EDMAC, SDRAM controller, sub-clock oscillator, battery backup; same 1.5 Mbyte flash, 128 Kbyte SRAM, 145-pin TFLGA | Required where IEEE 802.3 connectivity, external memory expansion, or RTC battery backup is mandatory | Select when Ethernet or SDRAM interface is needed; verify PCB layout compatibility due to identical footprint but different pin functions (e.g., ETH_MDC vs. GPIO) |
| R5F562TADFP#30 | RX62T Group: 100 MHz, 256 Kbyte flash, 32 Kbyte SRAM, no USB/ETH/CAN, optimized for motor control (3×3-phase PWM, encoder inputs) | Targeted at cost-sensitive BLDC/PMSM inverters without networking or rich HMI | Choose for pure motor control with minimal peripheral overhead; lower memory and no USB reduce BOM cost but eliminate connectivity features |
Compared with R5F5631DCDLK#U0, the RX63N alternative adds critical networking and memory expansion capabilities at identical pin count, while the RX62T offers focused motor-control acceleration at reduced memory and peripheral scope - enabling trade-offs between connectivity breadth and domain-specific performance.
Availability
R5F5631DCDLK#U0 is available at Aetrix Electronics and suitable for industrial HMI, building automation controllers, medical sensor hubs, and energy metering nodes requiring stable component supply, long-term lifecycle assurance, and automotive-grade traceability.
Supply support for R5F5631DCDLK#U0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and IoT markets.
The RX631 Group is designed for cost-optimized, real-time embedded applications demanding robust safety certification (IEC 60730), rich connectivity (USB/CAN/SCI), and deterministic control - without Ethernet or SDRAM overhead.
FAQ
What is the maximum operating frequency and core architecture of the R5F5631DCDLK#U0?
The R5F5631DCDLK#U0 operates at a maximum frequency of 100 MHz using the 32-bit RXv1 CPU core with Harvard architecture, 5-stage pipeline, and variable-length instruction set. It delivers 165 DMIPS and includes a single-precision IEEE-754 floating-point unit. This architecture enables deterministic real-time execution and ultra-compact code size, making the R5F5631DCDLK#U0 well-suited for applications requiring both computational efficiency and low memory footprint.
Does the R5F5631DCDLK#U0 include an Ethernet MAC controller?
No, the R5F5631DCDLK#U0 does not include an Ethernet MAC controller. As a member of the RX631 Group, it explicitly omits Ethernet, EDMAC, SDRAM controller, and sub-clock oscillator - distinguishing it from the RX63N Group. This omission reduces cost and complexity for applications that rely on USB, CAN, or serial interfaces instead of wired Ethernet. The R5F5631DCDLK#U0 retains full USB 2.0 host/function/OTG, three CAN channels, and 13 SCI interfaces for alternative connectivity.
What package type and pin count does the R5F5631DCDLK#U0 use?
The R5F5631DCDLK#U0 uses the PTLG0145KA-A package: a 145-pin Thin Fine-Pitch Land Grid Array with 7 mm × 7 mm body size and 0.5 mm pitch. This package provides 111 general-purpose I/O pins, 1 dedicated input pin, pull-up resistors on all I/Os, open-drain capability, and 5-V tolerance on 18 pins. Its compact footprint supports high-density PCB layouts while maintaining signal integrity for mixed-signal operation.
How much on-chip memory does the R5F5631DCDLK#U0 integrate?
The R5F5631DCDLK#U0 integrates 1.5 Mbytes of on-chip flash memory (executed at 100 MHz with zero wait states), 128 Kbytes of SRAM (also zero-wait-state), and 32 Kbytes of reprogrammable data flash rated for 100,000 erase/write cycles. The flash supports on-board programming via SWD or FINE interface, and the data flash enables reliable parameter storage and firmware update staging - essential for field-deployed R5F5631DCDLK#U0 applications requiring robust data retention.
Which safety standards does the R5F5631DCDLK#U0 support for functional safety certification?
The R5F5631DCDLK#U0 includes hardware features aligned with IEC 60730 Class B requirements: oscillation-stop detection, built-in CRC calculator (with three configurable polynomials), self-diagnostic A/D converter, independent watchdog timer (IWDT) with dedicated LOCO clock, and register write protection. These capabilities allow developers to implement certified safety routines without external components - a key advantage for R5F5631DCDLK#U0 deployments in industrial controls, medical peripherals, and home appliances requiring regulatory compliance.
R5F5631DCDLK#U0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 145-TFLGA
- Series:
- RX600
- Packaging:
- Tray
- Product Status:
- Not For New Designs
- Programmable:
- Not Verified
- Core Processor:
- RX
- Core Size:
- 32-Bit Single-Core
- Speed:
- 100MHz
- Connectivity:
- CANbus, EBI/EMI, I2C, LINbus, SCI, SPI, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 111
- Program Memory Size:
- 1.5MB (1.5M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 128K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 8x10b, 21x12b; D/A 2x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F5631DCDLK#U0 FAQ
1.How can I place an order for R5F5631DCDLK#U0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F5631DCDLK#U0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F5631DCDLK#U0 reliable?
The price and inventory of R5F5631DCDLK#U0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F5631DCDLK#U0 is usually 5 days.
3.What payment methods are accepted for R5F5631DCDLK#U0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F5631DCDLK#U0 transactions.
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R5F5631DCDLK#U0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F5631DCDLK#U0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F5631DCDLK#U0?
For technical support, including R5F5631DCDLK#U0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F5631DCDLK#U0 requirements.
6.How does Aetrix verify that R5F5631DCDLK#U0 is sourced from the original manufacturer or authorized distributors?
All R5F5631DCDLK#U0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F5631DCDLK#U0 meets industry standards.
7.What is the process for return or replacement of R5F5631DCDLK#U0?
All R5F5631DCDLK#U0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F5631DCDLK#U0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F5631DCDLK#U0 part is unused and in its original packaging.
Return procedure for R5F5631DCDLK#U0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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