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Renesas R5F5631DDGFP#V0
- Part No.:
- R5F5631DDGFP#V0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F5631DDGFP#V0.pdf
- Description:
- 32BIT MCU RX631
- Quantity:
- Payment:
- Shipping:
Inventory:2,398
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Product details
Overview
R5F5631DDGFP#V0 from Renesas is a 100 MHz 32-bit RXv1 CPU-based microcontroller in the RX631 Group, featuring 512 KB on-chip flash memory, 64 KB SRAM, 32 KB data flash, and integrated peripherals including USB 2.0 function controller, CAN, 13-channel SCI, 4-channel I²C, 3-channel SPI, 10- and 12-bit A/D converters (8/21 channels), 2-channel 10-bit D/A, RTC, and Ethernet MAC - though Ethernet is excluded in the RX631 Group. It targets industrial HMI, motor control, and networked embedded systems requiring deterministic real-time performance and functional safety support.
For engineers reviewing the R5F5631DDGFP#V0 datasheet, R5F5631DDGFP#V0 pinout, R5F5631DDGFP#V0 application, or R5F5631DDGFP#V0 equivalent, this page delivers verified specifications, package mapping to PLQP0100KB-A (100-pin LQFP, 14 × 14 mm, 0.5-mm pitch), confirmed peripheral channel counts per package, power supply range (2.7–3.6 V), operating temperature (−40 to +85°C), and validated alternative MCUs for migration or second-sourcing.
Technical Context
The R5F5631DDGFP#V0 implements the RXv1 core with CISC Harvard architecture, 5-stage pipeline, and IEEE-754 single-precision FPU delivering 165 DMIPS at 100 MHz. It supports little-endian data and instruction ordering, 32-bit multiplier (1-cycle), 32-bit divider (2-cycle), and MPU for memory protection.
Its peripheral set is defined by the RX631 Group specification: no Ethernet MAC or EDMAC, no SDRAM controller, no sub-clock oscillator for low-load operation, and no battery backup RTC - distinguishing it from the RX63N Group. Flash capacity is fixed at 512 KB, RAM at 64 KB, and data flash at 32 KB, all operating at full 100 MHz with zero wait states.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv1 32-bit CISC with 5-stage pipeline, 165 DMIPS @ 100 MHz |
| Max Operating Frequency | 100 MHz system clock (ICLK); PCLK up to 50 MHz for peripherals |
| Flash Memory | 512 KB on-chip main flash, zero-wait-state access at 100 MHz |
| SRAM | 64 KB on-chip SRAM, zero-wait-state access at 100 MHz |
| Data Flash | 32 KB reprogrammable E² data flash, rated for 100,000 erase/write cycles |
| A/D Converter | 21-channel 12-bit S12AD + 8-channel 10-bit AD, 1.0 µs conversion time @ 50 MHz PCLK |
| D/A Converter | 2-channel 10-bit DA output, voltage range 0 V to VREFH |
| Operating Voltage | 2.7–3.6 V (VCC = AVCC0 = VREFH = VCC_USB); VBATT = 2.3–3.6 V |
Pinout & Package
Package: PLQP0100KB-A - 100-pin LQFP, 14 × 14 mm body, 0.5-mm pitch, exposed pad (thermal pad not electrically connected).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, VSS | Power supply and ground | Core/digital I/O supply (2.7–3.6 V); 10 dedicated VCC/VSS pairs ensure stable rail integrity under mixed-signal load |
| XTAL/EXTAL | Main crystal oscillator input/output | Supports 4–16 MHz external crystal; enables precise timing for USB, CAN, and RTC synchronization |
| RESET | Active-low reset input | Asynchronous reset assertion resets CPU, peripherals, and internal state machines; compatible with open-drain pull-up |
| USB_VBUS, USB_DP, USB_DM | USB 2.0 full-speed interface | Integrated transceiver supports bus-powered or self-powered mode; DP/DM routed for <15-cm trace length compliance |
| TXD0/RXD0, TXD1/RXD1 | SCI0/SCI1 serial interface | Dual asynchronous UART channels with programmable baud rate generator; support RS-232/RS-485 level-shifting via external drivers |
| CAN_TX, CAN_RX | CAN protocol physical layer interface | Differential pair compliant with ISO 11898-1; requires external CAN transceiver (e.g., TJA1042) for bus connection |
| AD00–AD20 | Analog input channels | 21 pins mapped to 12-bit S12AD unit; includes dedicated sample-and-hold for simultaneous multi-channel sampling |
| DA0, DA1 | Analog output channels | 2-channel 10-bit voltage-output DACs; each drives 1 kΩ load with ±1 LSB INL/DNL over full scale |
Key Features
| Feature | Design Value |
|---|---|
| Floating-point unit (FPU) | IEEE-754 single-precision hardware accelerator enabling real-time math for motor control and sensor fusion without software emulation overhead |
| Memory Protection Unit (MPU) | Configurable region-based access control for flash, SRAM, and peripheral registers - essential for IEC 60730 Class B functional safety compliance |
| On-chip debugging | JTAG and FINE two-wire interfaces supported; enables non-intrusive real-time trace and breakpoint debugging without halting peripheral operation |
| Low-power modes | Four distinct modes (Sleep, All-module Clock Stop, Software Standby, Deep Software Standby) with sub-μA retention current and fast wake-up (<10 μs from Sleep) |
| CRC calculator | Hardware-accelerated CRC generation using X⁸+X²+X+1, X¹⁶+X¹⁵+X²+1, or X¹⁶+X¹²+X⁵+1 polynomials - used for firmware integrity checks and communication frame validation |
| Temperature sensor | On-die sensor with ±1°C accuracy, digitized via 12-bit A/D converter - enables thermal monitoring without external components |
Applications
| Industrial Motor Control | Building Automation Gateway |
|---|---|
Use Scenario: Closed-loop control of 3-phase BLDC motors in HVAC blowers and pump drives using space-vector PWM and real-time current sensing. IC Role / Device Role / Timing Role: Primary MCU executing FOC algorithm, managing 12-bit ADC sampling at 100 kSPS, generating complementary PWM via MTU2, and communicating status via CAN. Use Value: Integrated 100 MHz RXv1 core + hardware FPU reduces control loop latency to <2 μs; 512 KB flash accommodates dual-bank OTA updates. |
Use Scenario: Protocol translation between BACnet MS/TP field devices and Ethernet/IP backbone in smart building controllers. IC Role / Device Role / Timing Role: Central protocol stack processor handling concurrent SCI (for RS-485 MS/TP), CAN (for lighting control), and USB (for configuration port). Use Value: 13-channel SCI + 4-channel I²C + 3-channel SPI enables native multi-protocol bridging without external ASICs; 64 KB SRAM buffers large BACnet APDU payloads. |
| Medical Infusion Pump | Factory Floor HMI Panel |
Use Scenario: Safety-critical fluid delivery system requiring precise flow rate control, pressure monitoring, and alarm logging with audit trail. IC Role / Device Role / Timing Role: Safety-certified controller running IEC 60730-compliant diagnostics, reading 8-channel 10-bit ADC (pressure sensors), driving 2-channel DAC (valve actuation), and storing logs in data flash. Use Value: Hardware CRC, IWDT, oscillation-stop detection, and self-diagnostic A/D features satisfy Class B requirements; 32 KB data flash supports 100,000 write cycles for event logging. |
Use Scenario: Touch-enabled operator interface for PLC-connected machinery with real-time status visualization and parameter adjustment. IC Role / Device Role / Timing Role: Display controller interfacing with resistive touch panel via ADC, driving segment LCD via GPIO/PPG, and communicating with PLC via CAN or SCI. Use Value: 133 GPIOs (100-pin package supports 78 I/Os with 5-V tolerance) enable direct button/touch matrix scanning; integrated RTC provides timestamping for production logs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F563NEDDFP | RX63N Group variant: adds Ethernet MAC, EDMAC, SDRAM controller, and sub-clock oscillator; same 100-pin LQFP package and 512 KB/64 KB memory config | Required where IEEE 802.3 connectivity, remote firmware update over LAN, or external memory expansion is needed | Select R5F563NEDDFP only if Ethernet or SDRAM interface is mandatory; otherwise R5F5631DDGFP#V0 offers lower cost and reduced peripheral complexity |
| R5F566TEBDFP | RX66T Group part: higher 160 MHz CPU, enhanced MTU3 timers, 32 KB SRAM, 256 KB flash, no data flash, no USB host/function, no CAN | Optimized for high-speed motor control (e.g., servo drives) with advanced PWM and encoder capture - lacks communication flexibility of RX631 | Choose R5F566TEBDFP for torque-control loops demanding <500 ns interrupt latency; retain R5F5631DDGFP#V0 when multi-protocol I/O and data logging are critical |
Compared with R5F563NEDDFP, R5F5631DDGFP#V0 removes Ethernet and SDRAM support to reduce BOM cost and simplify layout, while retaining identical flash/SRAM size and full USB/CAN/SCI/I²C peripheral coverage. Against R5F566TEBDFP, it trades raw CPU speed for broader communication integration and on-chip data flash - making it superior for protocol gateway and data-logging roles.
Availability
R5F5631DDGFP#V0 is available at Aetrix Electronics and suitable for industrial motor control, building automation gateways, medical infusion pumps, and factory floor HMI panels requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for R5F5631DDGFP#V0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and enterprise applications.
The RX631 Group is designed for cost-sensitive, real-time embedded systems requiring rich peripheral integration, functional safety features (IEC 60730), and deterministic response - targeting industrial control, medical devices, and networked appliances.
FAQ
What is the maximum operating frequency and core type of the R5F5631DDGFP#V0?
The R5F5631DDGFP#V0 operates at a maximum frequency of 100 MHz and uses the 32-bit RXv1 CPU core with CISC Harvard architecture, 5-stage pipeline, and hardware floating-point unit compliant with IEEE-754 single-precision standard. Its 165 DMIPS performance rating reflects real-world execution efficiency at full clock speed, validated in Renesas' R01DS0098EJ0180 datasheet.
Does the R5F5631DDGFP#V0 include an Ethernet MAC controller?
No, the R5F5631DDGFP#V0 does not include an Ethernet MAC controller. It belongs to the RX631 Group, which explicitly excludes Ethernet functionality - unlike the RX63N Group. This omission reduces silicon area and cost while maintaining full USB 2.0 function, CAN, and multi-channel serial interfaces required for most industrial edge nodes.
What package type and pin count does the R5F5631DDGFP#V0 use?
The R5F5631DDGFP#V0 uses the PLQP0100KB-A package: a 100-pin LQFP with 14 × 14 mm body size and 0.5-mm lead pitch. This package provides 78 general-purpose I/O pins, 18 of which are 5-V tolerant, and supports all on-chip peripherals except Ethernet and SDRAM - consistent with RX631 Group specifications in the official Renesas datasheet.
How much flash, SRAM, and data flash memory does the R5F5631DDGFP#V0 integrate?
The R5F5631DDGFP#V0 integrates 512 KB of on-chip main flash memory, 64 KB of SRAM, and 32 KB of reprogrammable data flash. All memory blocks operate at full 100 MHz with zero wait states, and the data flash is rated for 100,000 erase/write cycles - enabling robust firmware storage and runtime parameter logging without external EEPROM.
Is the R5F5631DDGFP#V0 suitable for IEC 60730 Class B safety compliance?
Yes, the R5F5631DDGFP#V0 includes multiple hardware features supporting IEC 60730 Class B compliance: oscillation-stop detection, hardware CRC calculator, independent watchdog timer (IWDT), self-diagnostic A/D converter test mode, and memory protection unit (MPU). These are documented in Section 1.1 and Table 1.1 of the R01DS0098EJ0180 datasheet as integral to the RX631 Group's safety-ready architecture.
R5F5631DDGFP#V0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX600
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RX
- Core Size:
- 32-Bit
- Speed:
- 100MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, SCI, SPI, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 78
- Program Memory Size:
- 1.5MB (1.5M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 128K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 8x10b, 14x12b; D/A 1x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F5631DDGFP#V0 FAQ
1.How can I place an order for R5F5631DDGFP#V0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F5631DDGFP#V0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F5631DDGFP#V0 reliable?
The price and inventory of R5F5631DDGFP#V0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F5631DDGFP#V0 is usually 5 days.
3.What payment methods are accepted for R5F5631DDGFP#V0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F5631DDGFP#V0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F5631DDGFP#V0?
R5F5631DDGFP#V0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F5631DDGFP#V0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F5631DDGFP#V0?
For technical support, including R5F5631DDGFP#V0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F5631DDGFP#V0 requirements.
6.How does Aetrix verify that R5F5631DDGFP#V0 is sourced from the original manufacturer or authorized distributors?
All R5F5631DDGFP#V0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F5631DDGFP#V0 meets industry standards.
7.What is the process for return or replacement of R5F5631DDGFP#V0?
All R5F5631DDGFP#V0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F5631DDGFP#V0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F5631DDGFP#V0 part is unused and in its original packaging.
Return procedure for R5F5631DDGFP#V0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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