Renesas R5F5631YDGFP#H0
- Part No.:
- R5F5631YDGFP#H0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F5631YDGFP#H0.pdf
- Description:
- 32BIT MCU RX631 1M LQFP100 -40/+
- Quantity:
- Payment:

- Shipping:

Inventory:1,312
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F5631YDGFP#H0 from Renesas is a 100 MHz, 32-bit RX CPU core microcontroller in the RX631 Group, featuring 1 MB on-chip flash memory, 192 KB SRAM, 32 KB data flash, and integrated 12-bit/10-bit A/D converters, 10-bit D/A converters, RTC, and USB 2.0 function controller - designed for industrial control and connected HMI applications requiring deterministic real-time performance without Ethernet.
For engineers reviewing the R5F5631YDGFP#H0 datasheet, R5F5631YDGFP#H0 pinout, R5F5631YDGFP#H0 application, or R5F5631YDGFP#H0 equivalent, this MCU delivers verified 165 DMIPS throughput, IEEE-754 single-precision FPU, JTAG/FINE debug support, IEC60730 safety features, and 134 GPIO pins with 5-V tolerance - critical for embedded designs needing high code density, low-power operation (500 μA/MHz), and robust peripheral integration.
Technical Context
The R5F5631YDGFP#H0 implements the CISC Harvard architecture with 5-stage pipeline, variable-length instructions, and memory protection unit (MPU) - enabling ultra-compact code and secure memory partitioning. It supports little-endian or big-endian data arrangement and executes 32×32-bit multiply in one cycle and 32÷32-bit divide in two cycles.
Its clock system integrates main crystal oscillator, subclock, 125-kHz LOCO, 50-MHz HOCO, and PLL with independent frequency division/multiplication for ICLK (up to 100 MHz), PCLK (up to 50 MHz), FCLK (up to 50 MHz), and BCLK (up to 50 MHz), ensuring precise timing control across CPU, peripherals, FlashIF, and external bus domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RX 32-bit CISC Harvard with 5-stage pipeline, 165 DMIPS @ 100 MHz |
| Max Operating Frequency | 100 MHz system clock (ICLK), enabling deterministic real-time execution |
| Flash Memory | 1 MB on-chip main flash, 100 MHz zero-wait-state access for deterministic code fetch |
| SRAM | 192 KB on-chip SRAM, no wait states, supports instruction + operand storage and deep software standby backup |
| A/D Converter | 21-channel 12-bit S12AD + 8-channel 10-bit AD, 1.0 μs conversion time @ 50 MHz PCLK |
| D/A Converter | 2-channel 10-bit DA output, voltage range 0 V to VREFH for analog actuation control |
| Operating Voltage | 2.7–3.6 V supply (VCC/AVCC0/VREFH/VCC_USB), 2.3–3.6 V battery backup (VBATT) |
| Temperature Range | −40°C to +85°C (D version), validated for industrial ambient conditions |
Pinout & Package
Package: PLQP0100KB-A, 100-pin LQFP, 14 × 14 mm, 0.5-mm pitch, RoHS-compliant, surface-mountable with standard reflow profile.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / VREFH | Core & analog power supply | Single 2.7–3.6 V rail powers CPU, peripherals, ADC reference, and USB PHY - simplifies power design |
| VBATT | Battery backup supply | Enables RTC and SRAM retention during main power loss (2.3–3.6 V range) |
| XTAL / EXTAL | Main crystal oscillator input/output | Supports 4–16 MHz external crystal for precise system timing and PLL reference |
| RES# | Active-low reset input | Asynchronous hardware reset with internal pull-up; compatible with open-drain reset supervisors |
| IRQ0–IRQ15 | External interrupt inputs | 16 dedicated edge-triggered pins for fast event response (e.g., sensor triggers, safety signals) |
| P00–P97 | General-purpose I/O ports | 78 configurable GPIOs with 5-V tolerance, pull-up, open-drain, and switchable drive strength |
Key Features
| Feature | Design Value |
|---|---|
| Floating-point unit (FPU) | IEEE-754 single-precision 32-bit FPU enables efficient math-intensive tasks (motor control, sensor fusion) |
| IEC60730 compliance support | Integrated oscillation-stop detection, CRC calculator, IWDT, and A/D self-diagnostic for Class B safety certification |
| USB 2.0 function controller | Full-speed (12 Mbps) device-only interface with 2 KB on-chip RAM buffer - eliminates external USB PHY |
| Real-time clock (RTC) | Calendar/clock with alarm, periodic, and carry interrupts plus time-capture on external event - no external RTC IC needed |
| Low-power modes | Four modes (Sleep, All-module clock stop, Software standby, Deep software standby) with <500 μA/MHz active current |
| On-chip debugging | JTAG and FINE (2-wire) interfaces supported - reduces debug footprint and enables in-system programming |
Applications
| Industrial PLC I/O Module | Smart Energy Meter |
|---|---|
Use Scenario: Standalone I/O expansion node with analog inputs, digital outputs, and serial fieldbus communication. IC Role / Device Role / Timing Role: Main controller executing ladder logic, sampling 12-bit analog sensors at 1 kHz, driving isolated outputs via PWM timers. Use Value: Integrated 21-channel 12-bit A/D, 16-bit MTU2/TPU timers, and 78 GPIOs eliminate external ADC and timer ICs - reducing BOM count and PCB area. |
Use Scenario: Residential electricity meter with metrology, tamper detection, LCD display, and IR/RS485 communication. IC Role / Device Role / Timing Role: System-on-chip managing energy calculation (via FPU), RTC-based billing intervals, and secure firmware updates over USB. Use Value: On-chip 10-bit D/A for analog output calibration, temperature sensor ±1°C accuracy for thermal drift compensation, and IEC60730 features accelerate safety certification. |
| HMI Controller for Factory Automation | Networked HVAC Controller |
Use Scenario: Touch-enabled panel with local logic, CAN bus connectivity, and real-time display refresh. IC Role / Device Role / Timing Role: Application processor running GUI stack, scanning capacitive touch via SCIs, and communicating via CAN v2.0B. Use Value: 192 KB SRAM hosts frame buffer and OS kernel; 13-channel SCI supports UART-to-CAN bridge; 5-V tolerant GPIOs interface directly with legacy 5 V sensors. |
Use Scenario: Distributed HVAC zone controller with temperature/humidity sensing, valve actuation, and Modbus RTU communication. IC Role / Device Role / Timing Role: Real-time environmental regulator using 10-bit A/D for sensor inputs, 10-bit D/A for 0–10 V actuator control, and RS485 SCI. Use Value: Integrated 8-bit TMR and compare-match timers generate precise PWM for fan speed control; RTC enables scheduled operation without external timekeeping. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F5631EDDFP | Same RX631 Group, 1 MB flash, 128 KB SRAM, identical 100-pin LQFP package and pinout | Lacks 64 KB of SRAM - insufficient for large GUI buffers or dual-task RTOS workloads | Select when application memory footprint fits within 128 KB SRAM and cost optimization is prioritized |
| R5F563NEDDFP | RX63N Group variant with identical 100-pin LQFP package but adds Ethernet MAC and EDMAC | Includes MII/RMII interface and 2 KB TX/RX FIFOs - requires external PHY and additional layout space | Choose only if 10/100 Mbps Ethernet connectivity is mandatory; otherwise R5F5631YDGFP#H0 offers lower system cost and complexity |
Compared with R5F5631EDDFP, R5F5631YDGFP#H0 provides 64 KB more SRAM for larger real-time buffers or firmware features; compared with R5F563NEDDFP, it removes Ethernet overhead while retaining full USB, CAN, and analog capability - optimizing for non-networked industrial edge nodes.
Availability
R5F5631YDGFP#H0 is available at Aetrix Electronics and suitable for industrial PLC I/O modules, smart energy meters, factory HMIs, and networked HVAC controllers requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant manufacturing.
Supply support for R5F5631YDGFP#H0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RX631 Group is engineered for cost-sensitive industrial control applications demanding high reliability, rich analog integration, and functional safety support - without the complexity or cost of Ethernet-capable variants.
FAQ
What is the maximum operating frequency and core performance of the R5F5631YDGFP#H0?
The R5F5631YDGFP#H0 operates at a maximum frequency of 100 MHz and delivers 165 DMIPS of processing performance using its 32-bit RX CPU core. Its single-precision IEEE-754 floating-point unit enables efficient computation for motor control algorithms and sensor signal processing. The R5F5631YDGFP#H0 achieves this performance with zero-wait-state access to both 1 MB flash and 192 KB SRAM, ensuring deterministic real-time execution.
Does the R5F5631YDGFP#H0 include an Ethernet controller?
No, the R5F5631YDGFP#H0 belongs to the RX631 Group, which explicitly excludes the Ethernet MAC and EDMAC modules present in the RX63N Group. This omission reduces silicon cost and power consumption while maintaining full USB 2.0 function, CAN, multiple SCI channels, and rich analog peripherals - making the R5F5631YDGFP#H0 ideal for non-networked industrial control applications where Ethernet is unnecessary.
What are the memory resources available on the R5F5631YDGFP#H0?
The R5F5631YDGFP#H0 integrates 1 MB of on-chip flash memory (zero-wait-state at 100 MHz), 192 KB of SRAM (no wait states, supports deep software standby backup), and 32 KB of reprogrammable data flash rated for 100,000 erase/write cycles. These resources enable complex firmware with real-time task scheduling, GUI frame buffers, and secure parameter storage - all without external memory components.
Which communication interfaces does the R5F5631YDGFP#H0 support?
The R5F5631YDGFP#H0 supports USB 2.0 full-speed function mode (12 Mbps), up to 3 CAN channels (ISO 11898-1 compliant), 13 SCI channels (with asynchronous, synchronous, SPI/I²C emulation, and LIN support), 4 I²C interfaces (including FM+), 3 RSPI channels, and IEBus. It does not include Ethernet or USB host/OTG - confirming its role as a peripheral-rich, cost-optimized industrial MCU.
How does the R5F5631YDGFP#H0 support functional safety standards like IEC60730?
The R5F5631YDGFP#H0 includes hardware-level IEC60730 Class B support features: oscillation-stop detection for clock monitoring, built-in CRC calculator (with three polynomials), independent watchdog timer (IWDT) with dedicated LOCO clock, and self-diagnostic capability for the 10-bit A/D converter. These features reduce external component count and simplify certification for household appliances and industrial equipment - confirmed in Renesas documentation R01DS0098EJ0180.
R5F5631YDGFP#H0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX631
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RX
- Core Size:
- 32-Bit
- Speed:
- 100MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, SCI, SPI, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 78
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 8x10b, 14x12b; D/A 1x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F5631YDGFP#H0 FAQ
1.How can I place an order for R5F5631YDGFP#H0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F5631YDGFP#H0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F5631YDGFP#H0 reliable?
The price and inventory of R5F5631YDGFP#H0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F5631YDGFP#H0 is usually 5 days.
3.What payment methods are accepted for R5F5631YDGFP#H0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F5631YDGFP#H0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F5631YDGFP#H0?
R5F5631YDGFP#H0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F5631YDGFP#H0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F5631YDGFP#H0?
For technical support, including R5F5631YDGFP#H0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F5631YDGFP#H0 requirements.
6.How does Aetrix verify that R5F5631YDGFP#H0 is sourced from the original manufacturer or authorized distributors?
All R5F5631YDGFP#H0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F5631YDGFP#H0 meets industry standards.
7.What is the process for return or replacement of R5F5631YDGFP#H0?
All R5F5631YDGFP#H0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F5631YDGFP#H0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F5631YDGFP#H0 part is unused and in its original packaging.
Return procedure for R5F5631YDGFP#H0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F5631YDGFP#H0 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

