Renesas R5F563NACDBG#U0
- Part No.:
- R5F563NACDBG#U0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 176-LFBGA
- Datasheet:
-
R5F563NACDBG#U0.pdf
- Description:
- IC MCU 32BIT 768KB FLSH 176LFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:4,148
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F563NACDBG#U0 from Renesas is a 100-MHz 32-bit RX63N Group microcontroller with integrated Ethernet MAC, single-precision IEEE-754 FPU, 768 KB on-chip flash, 128 KB SRAM, and 32 KB data flash. It features 134 general-purpose I/O pins (18 × 5-V tolerant), hardware AES encryption (DEU), and RTC with battery backup - deployed in industrial gateways requiring deterministic real-time control and networked connectivity.
For engineers reviewing the R5F563NACDBG#U0 datasheet, R5F563NACDBG#U0 pinout, R5F563NACDBG#U0 application, or R5F563NACDBG#U0 equivalent, key selection criteria include Ethernet MAC support (vs. RX631), 100 MHz operation with 165 DMIPS, 12-bit + 10-bit A/D converters (21 + 8 channels), dual 10-bit D/A outputs, and LFBGA-176 (PLBG0176GA-A) package compatibility for high-density PCB layouts.
Technical Context
The R5F563NACDBG#U0 implements the CISC Harvard-architecture RX CPU core with 5-stage pipeline, variable-length instructions, and memory protection unit (MPU). It supports little-endian data and instruction alignment, IEEE-754-compliant floating-point operations, and dual multiply-and-accumulate units - enabling efficient signal processing and control loop execution at 100 MHz.
Its peripheral set includes dedicated EDMAC for Ethernet offloading, four-channel DMAC, two-channel EXDMAC, and DTC for zero-CPU-overhead data movement. Clock subsystem integrates PLL, HOCO (50 MHz), LOCO (125 kHz), and subclock oscillator - with independent division/multiplication for ICLK (100 MHz), PCLK (50 MHz), FCLK (50 MHz), and BCLK (50 MHz).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RX 32-bit CPU, 100 MHz max, 165 DMIPS - delivers deterministic real-time performance for embedded control tasks |
| Memory | 768 KB flash (no wait states @ 100 MHz), 128 KB SRAM, 32 KB reprogrammable data flash - enables secure firmware updates and parameter storage |
| Connectivity | Ethernet MAC (10/100 Mbps, MII/RMII), USB 2.0 host/function/OTG, 3× CAN (ISO 11898-1), 4× I²C (1 Mbps), 13× SCI - supports multi-protocol industrial networking |
| Analog | 21× 12-bit + 8× 10-bit A/D converters (1 µs conversion), 2× 10-bit D/A outputs, on-die temperature sensor (±1°C) - suitable for sensor fusion and closed-loop analog control |
| Security & Timing | AES-128/192/256 (ECB/CBC), CRC calculator, RTC with battery backup, independent watchdog timer (IWDT) - meets IEC 60730 Class B functional safety requirements |
| Power & Package | 2.7–3.6 V supply, -40 to +85°C operating range, PLBG0176GA-A (13 × 13 mm, 0.8-mm pitch LFBGA) - compatible with automated SMT assembly and thermal management in compact enclosures |
Pinout & Package
Package: PLBG0176GA-A - 176-pin Low-Profile Fine-Pitch Ball Grid Array (13 × 13 mm, 0.8-mm pitch), RoHS-compliant, lead-free, moisture-sensitive level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Dedicated power/ground pairs per quadrant minimize noise coupling; 2.7–3.6 V operation supports wide-input industrial supplies |
| XTAL / EXTAL | Main crystal oscillator input/output | Supports 4–16 MHz external crystals for precise system clock generation; internal PLL achieves 100 MHz ICLK |
| ETH_MDC / ETH_MDIO | Ethernet management interface | IEEE 802.3-compliant MDIO bus for PHY configuration and status monitoring without CPU intervention |
| ETH_TXD[3:0] / ETH_RXD[3:0] | Ethernet transmit/receive data | MII interface signals; RMII mode selectable via software - reduces pin count while maintaining 100 Mbps throughput |
| USB_DP / USB_DM | USB 2.0 differential data pair | Full-speed (12 Mbps) transceiver integrated; supports host, device, and OTG roles with on-chip 2 KB buffer |
| AD[20:0] / DA[1:0] | Analog input / DAC output | 21-channel 12-bit A/D with sample-and-hold; dual 10-bit D/A outputs referenced to VREFH - enables precision analog I/O for motor control |
Key Features
| Feature | Design Value |
|---|---|
| Ethernet MAC + EDMAC | Hardware-accelerated frame handling with 2 KB TX/RX FIFOs - eliminates CPU polling overhead and enables real-time packet processing |
| Floating-Point Unit (FPU) | Single-precision IEEE-754 compliance - accelerates math-intensive algorithms (e.g., PID tuning, FFT) without software emulation latency |
| Data Encryption Unit (DEU) | AES-128/192/256 in ECB/CBC modes - provides secure boot, firmware authentication, and encrypted communication for IoT edge devices |
| Real-Time Clock (RTC) | Battery-backed calendar/clock with alarm, periodic interrupt, and time-capture on external event - maintains accurate time during deep software standby |
| Peripheral Module Stop | Independent clock gating per module (e.g., stop SCI while running CAN) - reduces dynamic power to ≤500 µA/MHz in active mode |
Applications
| Industrial Ethernet Gateway | Smart Energy Meter |
|---|---|
Use Scenario: Aggregating Modbus RTU/TCP data from field devices and forwarding to cloud SCADA via Ethernet/WAN. IC Role / Device Role / Timing Role: Central protocol translator and real-time scheduler with deterministic Ethernet MAC timing and hardware CRC. Use Value: Eliminates external PHY and protocol stack MCU, reducing BOM cost and latency by offloading TCP/IP and Modbus parsing in hardware DMA paths. |
Use Scenario: Measuring voltage, current, and power quality in three-phase utility meters with tamper detection and secure firmware updates. IC Role / Device Role / Timing Role: High-accuracy analog front-end controller with 21-channel A/D, AES-encrypted OTA updates, and RTC-based billing intervals. Use Value: Achieves Class 0.5S metrology accuracy using internal 12-bit A/D with sample-and-hold and temperature-compensated reference. |
| Programmable Logic Controller (PLC) I/O Module | Building Automation Controller |
Use Scenario: Modular digital I/O expansion node with isolated inputs/outputs, CAN bus backplane, and web-based configuration. IC Role / Device Role / Timing Role: Deterministic real-time I/O processor with 134 GPIOs, 3× CAN interfaces, and hardware PWM for servo drive enable signals. Use Value: Enables <100 µs I/O scan cycles using MTU2/TPU timers and DTC-triggered A/D conversions - meeting IEC 61131-3 cycle time requirements. |
Use Scenario: HVAC controller managing chillers, VAV boxes, and lighting via BACnet MS/TP over RS-485 and Ethernet backbone. IC Role / Device Role / Timing Role: Dual-network controller with integrated Ethernet MAC and SCI-based RS-485 transceivers, plus on-chip temperature sensing. Use Value: Reduces external components by integrating BACnet stack acceleration (CRC, timer-triggered sampling) and secure remote diagnostics via HTTPS. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F563NECDBG#U0 | 2 MB flash, same 128 KB SRAM, identical LFBGA-176 package and peripheral set | Supports larger firmware images and bootloader+application separation; no change in real-time or connectivity capability | Select when firmware size exceeds 768 KB or future-proofing for feature expansion is required |
| R5F563NACDFC#U0 | LQFP-176 (PLQP0176KB-A), same 768 KB flash/128 KB SRAM, but adds external bus interface (32-bit, 50 MHz) | Enables connection to external SDRAM or NOR flash - useful for HMI or data logging where local memory is insufficient | Choose for designs needing external memory expansion; note larger footprint (24 × 24 mm vs. 13 × 13 mm) and different thermal profile |
Compared with R5F563NACDBG#U0, R5F563NECDBG#U0 offers higher flash density without altering real-time performance or I/O count, while R5F563NACDFC#U0 trades compact LFBGA packaging for external memory bandwidth - making the former ideal for firmware-rich upgrades and the latter for memory-constrained HMI applications.
Availability
R5F563NACDBG#U0 is available at Aetrix Electronics and suitable for industrial gateways, smart metering systems, and programmable logic controllers requiring stable component supply, long-term lifecycle assurance, and automotive-grade reliability under extended temperature conditions.
Supply support for R5F563NACDBG#U0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for industrial, automotive, and infrastructure markets.
The RX63N Group targets industrial automation and networked embedded systems, integrating Ethernet MAC, USB OTG, and functional safety features to simplify design of certified, connected edge devices.
FAQ
What is the maximum operating frequency and DMIPS rating of the R5F563NACDBG#U0?
The R5F563NACDBG#U0 operates at a maximum frequency of 100 MHz and delivers 165 DMIPS of processing performance. This is achieved through its optimized RX CPU core with 5-stage pipeline and variable-length instruction set. The R5F563NACDBG#U0 maintains this performance across its full operating voltage range (2.7–3.6 V) and temperature range (-40 to +85°C), enabling deterministic real-time execution in demanding industrial environments.
Does the R5F563NACDBG#U0 include an Ethernet MAC, and what interface standards does it support?
Yes, the R5F563NACDBG#U0 includes a fully integrated IEEE 802.3-compliant Ethernet MAC supporting both 10 Mbps and 100 Mbps operation in full- and half-duplex modes. It supports MII (Media Independent Interface) and RMII (Reduced MII) physical layer interfaces, along with flow control (IEEE 802.3x) and Magic Packet™ wake-on-LAN detection. The R5F563NACDBG#U0 also integrates a dedicated EDMAC to offload frame transmission and reception from the CPU.
What analog peripherals are integrated into the R5F563NACDBG#U0?
The R5F563NACDBG#U0 integrates a 21-channel 12-bit A/D converter (S12ADa) with 1.0 µs conversion time at 50 MHz PCLK, an 8-channel 10-bit A/D converter (ADb), two 10-bit D/A converters (DAa), and an on-die temperature sensor with ±1°C accuracy. All A/D modules support software, timer-triggered, or external-event-started conversions, and the 12-bit unit includes sample-and-hold and reference voltage generation - making the R5F563NACDBG#U0 suitable for precision analog measurement and closed-loop control.
Is the R5F563NACDBG#U0 pin-compatible with other RX63N Group devices?
The R5F563NACDBG#U0 uses the PLBG0176GA-A (176-pin LFBGA) package and shares identical pinout with all other RX63N Group devices in that package variant, including R5F563NECDBG#U0, R5F563NDCDBG#U0, and R5F563NBCDBG#U0. This allows direct substitution within the same footprint when upgrading flash capacity or selecting alternate memory configurations - provided PCB layout adheres to Renesas' recommended thermal and decoupling guidelines for the LFBGA package.
What security features does the R5F563NACDBG#U0 provide for firmware and data protection?
The R5F563NACDBG#U0 includes a Data Encryption Unit (DEU) supporting AES-128/192/256 encryption and decryption in ECB and CBC modes, a CRC calculator with three configurable polynomials, and register write protection for critical control registers. These features enable secure boot validation, encrypted firmware updates, and protected communication channels - satisfying foundational requirements for IEC 60730 Class B compliance and secure IoT edge deployment. The R5F563NACDBG#U0 also supports unique chip ID for device authentication.
R5F563NACDBG#U0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 176-LFBGA
- Series:
- RX600
- Packaging:
- Tray
- Product Status:
- Not For New Designs
- Programmable:
- Not Verified
- Core Processor:
- RX
- Core Size:
- 32-Bit Single-Core
- Speed:
- 100MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, SCI, SPI, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 133
- Program Memory Size:
- 768KB (768K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 128K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 8x10b, 21x12b; D/A 2x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F563NACDBG#U0 FAQ
1.How can I place an order for R5F563NACDBG#U0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F563NACDBG#U0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F563NACDBG#U0 reliable?
The price and inventory of R5F563NACDBG#U0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F563NACDBG#U0 is usually 5 days.
3.What payment methods are accepted for R5F563NACDBG#U0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F563NACDBG#U0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F563NACDBG#U0?
R5F563NACDBG#U0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F563NACDBG#U0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F563NACDBG#U0?
For technical support, including R5F563NACDBG#U0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F563NACDBG#U0 requirements.
6.How does Aetrix verify that R5F563NACDBG#U0 is sourced from the original manufacturer or authorized distributors?
All R5F563NACDBG#U0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F563NACDBG#U0 meets industry standards.
7.What is the process for return or replacement of R5F563NACDBG#U0?
All R5F563NACDBG#U0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F563NACDBG#U0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F563NACDBG#U0 part is unused and in its original packaging.
Return procedure for R5F563NACDBG#U0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F563NACDBG#U0 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

