Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Name*
Company*
Email Address*
Phone/WhatsApp
Part Number*
Quantity*
Message
Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Name*
Company*
Email Address*
Phone/WhatsApp
Upload My List
Message

Renesas R5F563NACDLJ#U0

Part No.:
R5F563NACDLJ#U0
Manufacturer:
Renesas
Category:
Microcontrollers
Package:
100-TFLGA
Datasheet:
AetrixR5F563NACDLJ#U0.pdf
Description:
IC MCU 32BIT 768KB FLSH 100TFLGA
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:2,737

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Part Number
Quantity*
Price
Name*
Company
Email*
Comments

Product details

Overview

R5F563NACDLJ#U0 from Renesas is a 100-MHz 32-bit RX63N Group microcontroller with integrated Ethernet MAC, single-precision IEEE-754 FPU, 768 KB on-chip flash, 128 KB SRAM, and 32 KB data flash. It features 10- and 12-bit A/D converters (21+8 channels), dual 10-bit D/A outputs, RTC with battery backup, and AES encryption (DEU). Used in industrial gateways requiring deterministic real-time control and network connectivity.

For engineers reviewing the R5F563NACDLJ#U0 datasheet, R5F563NACDLJ#U0 pinout, R5F563NACDLJ#U0 application, or R5F563NACDLJ#U0 equivalent, key selection criteria include Ethernet MAC support (MII/RMII), 100 MHz CPU performance (165 DMIPS), 768 KB flash/128 KB RAM configuration, TFLGA-100 package (PTLG0100JA-A), and IEC60730 safety features including CRC, self-diagnostic A/D, and oscillation-stop detection.

Technical Context

The R5F563NACDLJ#U0 implements the 32-bit RX CPU core with 5-stage CISC Harvard pipeline, variable-length instructions, and memory protection unit (MPU). It executes at 100 MHz with 165 DMIPS and includes single-cycle 32×32 multiplier and two-cycle divider - enabling high-efficiency signal processing and real-time control loops.

Its peripheral set is optimized for networked embedded systems: integrated Ethernet controller (10/100 Mbps, MII/RMII), full-speed USB 2.0 host/function/OTG, three CAN modules (ISO 11898-1), four I²C interfaces (up to 1 Mbps), and 13 SCI channels supporting UART, SPI, I²C, and LIN protocols - all synchronized to independent clock domains (ICLK/PCLK/FCLK/BCLK).

Key Specifications

Parameter Value and Actual Design Meaning
Core RX 32-bit CPU, 100 MHz max, 165 DMIPS, IEEE-754 single-precision FPU
Memory 768 KB flash (no wait states @100 MHz), 128 KB SRAM, 32 KB reprogrammable data flash (100k cycles)
Analog 21-channel 12-bit A/D (1 µs conversion), 8-channel 10-bit A/D, 2-channel 10-bit D/A, on-die temperature sensor (±1°C)
Connectivity Ethernet MAC (10/100 Mbps, MII/RMII), USB 2.0 host/function/OTG, 3× CAN, 4× I²C (1 Mbps), 13× SCI, 3× RSPI
Timers & Control 16× TPU channels, 6× MTU2 channels, 4× TMR, 4× CMT, RTC with calendar/alarm/time-capture, IWDT with dedicated LOCO clock
Security & Safety AES-128/192/256 (ECB/CBC) via DEU, CRC calculator (3 polynomials), IEC60730-compliant self-test functions
Package & Environment TFLGA-100 (PTLG0100JA-A), 7 × 7 mm, 0.65 mm pitch, -40 to +85°C operating range (D version)

Pinout & Package

Package: 100-pin Thin Fine-Pitch Land Grid Array (TFLGA), PTLG0100JA-A, 7 × 7 mm, 0.65 mm pitch, 0.8 mm height. Compatible with standard reflow profiles for fine-pitch LGA assembly.

Pin/Terminal Circuit Role Design Meaning
VCC, VSS Power supply and ground Core I/O supply (2.7–3.6 V); separate AVCC0 for analog; VBATT for RTC backup (2.3–3.6 V)
XTAL/EXTAL Main crystal oscillator input/output Supports 4–16 MHz external crystal; enables PLL-based 100 MHz system clock
MDIO/MDC Ethernet management interface IEEE 802.3u-compliant MDIO bus for PHY register access and configuration
TXD0–TXD3, RXD0–RXD3 Ethernet physical layer interface MII mode: 4-bit TX/RX data lanes; RMII mode: 2-bit TX/RX + REF_CLK; supports full/half-duplex
USB_DP/USB_DM USB 2.0 differential data pair Full-speed (12 Mbps) signaling; internal transceiver; supports host, function, and OTG roles
CANH/CANL CAN bus differential pair Three independent ISO 11898-1 compliant CAN controllers; each with 32 mailboxes and FIFO buffering
AD00–AD20 Analog input channels 21 dedicated 12-bit A/D inputs; shared with GPIO; include sample-and-hold and internal reference generation
DA0/DA1 Digital-to-analog outputs 2× 10-bit voltage-output DACs; rail-to-rail operation referenced to VREFH (2.7–AVCC0)

Key Features

Feature Design Value
Ethernet MAC with EDMAC Dedicated DMA engine (EDMAC) offloads CPU via descriptor-based packet handling; 2 KB TX/RX FIFOs reduce interrupt overhead
IEC60730 Safety Support Hardware-accelerated CRC, A/D self-diagnostic, oscillation-stop detection, and frequency measurement enable Class B compliance without software overhead
Flexible Clock Architecture Independent clock domains (ICLK/PCLK/FCLK/BCLK) allow dynamic scaling: CPU @100 MHz, peripherals @50 MHz, Flash @50 MHz, bus @50 MHz
Multi-Protocol Serial Peripherals SCI modules support UART, SPI, I²C, smart-card, and LIN modes; RIIC supports FM+ (1 Mbps); RSPI handles up to 32-bit frames with double-buffering
Low-Power Operation Four low-power modes (Sleep, All-module stop, Software standby, Deep software standby); RTC runs from VBATT; 500 μA/MHz active current

Applications

Industrial Ethernet Gateway Building Automation Controller

Use Scenario: Aggregating Modbus TCP, BACnet/IP, and KNX-over-IP traffic between field devices and cloud SCADA systems.

IC Role / Device Role / Timing Role: Primary application processor with integrated Ethernet MAC, real-time scheduler, and protocol stack execution.

Use Value: Eliminates external PHY and switch ICs; 768 KB flash stores multiple protocol stacks; 128 KB SRAM enables concurrent TLS and RTOS task execution.

Use Scenario: Central HVAC and lighting controller managing zone sensors, actuators, and occupancy networks via wired/wireless backhaul.

IC Role / Device Role / Timing Role: Real-time deterministic controller interfacing with 12-bit A/D (temperature/humidity), 10-bit D/A (valve control), and CAN/LIN field buses.

Use Value: On-chip RTC with battery backup maintains schedule integrity during power loss; AES-128 secures firmware updates over-the-air.

Medical Infusion Pump Smart Energy Meter

Use Scenario: Closed-loop drug delivery system requiring FDA Class II safety certification, precise flow control, and wireless telemetry.

IC Role / Device Role / Timing Role: Safety-critical MCU executing motor control (TPU PWM), pressure sensing (12-bit A/D), and USB host for calibration tools.

Use Value: IEC60730-compliant hardware diagnostics (CRC, A/D self-test, clock monitoring) reduce software validation burden; 100 MHz CPU ensures sub-millisecond loop response.

Use Scenario: Revenue-grade meter with PLC/G3-PLC communication, tamper detection, and secure firmware updates via HAN interface.

IC Role / Device Role / Timing Role: Secure metering SoC performing metrology calculations, AES-encrypted data signing, and multi-protocol HAN communication (CAN, I²C, USB).

Use Value: Integrated DEU accelerates AES-256 signing; 32 KB data flash stores cryptographic keys and lifetime energy logs; RTC enables time-of-use billing accuracy.

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Alternative Part Technical Difference Application Difference Selection Advice
R5F563NACDFC LQFP-176 package (PLQP0176KB-A); 768 KB flash, 128 KB SRAM; same core/peripherals but larger footprint and higher pin count (134 GPIO vs. 78) Better suited for designs requiring more external bus expansion (32-bit CS areas), SDRAM interface, or additional SCI/I²C channels Select R5F563NACDFC when PCB layout allows 24×24 mm LQFP and requires >78 GPIO or external memory interface
R5F563NBCDLJ Same TFLGA-100 package; 1 MB flash (vs. 768 KB); identical RAM, peripherals, clock, and temperature rating Provides 256 KB additional code space for larger protocol stacks (e.g., MQTT-SN + TLS + OTA), without changing layout or thermal design Select R5F563NBCDLJ when firmware growth exceeds 768 KB but pin compatibility and board space must be preserved

Compared with R5F563NACDLJ#U0, R5F563NACDFC offers greater I/O and memory expansion at the cost of board area, while R5F563NBCDLJ delivers immediate flash headroom within identical mechanical and thermal constraints - enabling scalable firmware development without redesign.

Availability

R5F563NACDLJ#U0 is available at Aetrix Electronics and suitable for industrial gateways, building automation controllers, medical infusion pumps, and smart energy meters requiring stable component supply, long-term lifecycle support, and automotive-grade reliability under extended temperature operation.

Supply support for R5F563NACDLJ#U0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.

The RX63N Group targets networked industrial equipment, combining high-performance 32-bit processing, integrated Ethernet, functional safety features, and robust real-time capabilities - designed specifically for deterministic control in harsh environments.

FAQ

What is the maximum operating frequency and CPU performance of the R5F563NACDLJ#U0?

The R5F563NACDLJ#U0 operates at a maximum frequency of 100 MHz and delivers 165 DMIPS of processing performance using the 32-bit RX CPU core. Its single-cycle 32×32 multiplier and two-cycle divider enable efficient mathematical operations critical for real-time control and signal processing tasks executed by the R5F563NACDLJ#U0.

Does the R5F563NACDLJ#U0 include an Ethernet MAC, and what interface standards does it support?

Yes, the R5F563NACDLJ#U0 integrates a full-featured Ethernet MAC compliant with IEEE 802.3, supporting both 10 and 100 Mbps speeds in full- and half-duplex modes. It implements MII (Media Independent Interface) and RMII (Reduced MII) as defined in IEEE 802.3u, and includes hardware support for Magic Packet™ wake-on-LAN and IEEE 802.3x flow control - all native to the R5F563NACDLJ#U0.

What analog peripherals are integrated into the R5F563NACDLJ#U0?

The R5F563NACDLJ#U0 integrates a 21-channel 12-bit A/D converter with 1 µs conversion time, an 8-channel 10-bit A/D converter, two 10-bit D/A converters, and an on-die temperature sensor with ±1°C accuracy. These analog resources are directly accessible by the CPU and timers (e.g., TPU/MTU trigger A/D conversion), forming a complete mixed-signal subsystem within the R5F563NACDLJ#U0.

Is the R5F563NACDLJ#U0 qualified for functional safety standards such as IEC60730?

Yes, the R5F563NACDLJ#U0 includes hardware features explicitly designed for IEC60730 Class B compliance: oscillation-stop detection, clock frequency measurement, CRC calculation engine (with three polynomials), self-diagnostic A/D converter test, and independent watchdog timer (IWDT) with dedicated LOCO clock. These capabilities are built into the R5F563NACDLJ#U0 silicon and require no external components.

What package type and pin count does the R5F563NACDLJ#U0 use?

The R5F563NACDLJ#U0 uses a 100-pin Thin Fine-Pitch Land Grid Array (TFLGA) package, designated PTLG0100JA-A, measuring 7 × 7 mm with 0.65 mm pitch. This package provides 78 general-purpose I/O pins, 18 of which are 5-V tolerant, and supports reflow soldering per J-STD-020. The mechanical form factor is fixed for the R5F563NACDLJ#U0 and cannot be substituted with other RX63N variants without PCB revision.

R5F563NACDLJ#U0 Specifications

Product attributes
Attribute value
Manufacturer:
Renesas
Package/Case:
100-TFLGA
Series:
RX600
Packaging:
Tray
Product Status:
Not For New Designs
Programmable:
Not Verified
Core Processor:
RX
Core Size:
32-Bit Single-Core
Speed:
100MHz
Connectivity:
CANbus, EBI/EMI, Ethernet, I2C, LINbus, SCI, SPI, USB
Peripherals:
DMA, LVD, POR, PWM, WDT
Number of I/O:
78
Program Memory Size:
768KB (768K x 8)
Program Memory Type:
FLASH
EEPROM Size:
32K x 8
RAM Size:
128K x 8
Voltage - Supply (Vcc/Vdd):
2.7V ~ 3.6V
Data Converters:
A/D 8x10b, 14x12b; D/A 1x10b
Oscillator Type:
Internal
Operating Temperature:
-40°C ~ 85°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:

R5F563NACDLJ#U0 FAQ

1.How can I place an order for R5F563NACDLJ#U0 through Aetrix?

Please submit a Request for Quotation (RFQ) for R5F563NACDLJ#U0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for R5F563NACDLJ#U0 reliable?

The price and inventory of R5F563NACDLJ#U0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F563NACDLJ#U0 is usually 5 days.

3.What payment methods are accepted for R5F563NACDLJ#U0?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F563NACDLJ#U0 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for R5F563NACDLJ#U0?

R5F563NACDLJ#U0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your R5F563NACDLJ#U0 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for R5F563NACDLJ#U0?

For technical support, including R5F563NACDLJ#U0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F563NACDLJ#U0 requirements.

6.How does Aetrix verify that R5F563NACDLJ#U0 is sourced from the original manufacturer or authorized distributors?

All R5F563NACDLJ#U0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F563NACDLJ#U0 meets industry standards.

7.What is the process for return or replacement of R5F563NACDLJ#U0?

All R5F563NACDLJ#U0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F563NACDLJ#U0, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The R5F563NACDLJ#U0 part is unused and in its original packaging.

Return procedure for R5F563NACDLJ#U0:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

R5F563NACDLJ#U0 Tags

  • R5F563NACDLJ#U0
  • R5F563NACDLJ#U0 PDF
  • R5F563NACDLJ#U0 Datasheet
  • R5F563NACDLJ#U0 Specifications
  • R5F563NACDLJ#U0 Images
  • Renesas
  • Renesas R5F563NACDLJ#U0
  • Buy R5F563NACDLJ#U0
  • R5F563NACDLJ#U0 Price
  • R5F563NACDLJ#U0 Distributor
  • R5F563NACDLJ#U0 Supplier
  • R5F563NACDLJ#U0 Wholesale
Related Products
ATTINY4-TSHR
ATTINY4-TSHR

Microchip Technology

ATTINY10-TSHR
ATTINY10-TSHR

Microchip Technology

ATTINY10-TS8R
ATTINY10-TS8R

Microchip Technology

ATTINY202-SSNR
ATTINY202-SSNR

Microchip Technology

ATTINY202-SSFR
ATTINY202-SSFR

Microchip Technology

ATTINY402-SSNR
ATTINY402-SSNR

Microchip Technology

PIC16F15213T-I/MF
PIC16F15213T-I/MF

Microchip Technology

PIC16F15213-E/MF
PIC16F15213-E/MF

Microchip Technology

PIC10F200T-I/OT
PIC10F200T-I/OT

Microchip Technology

ATTINY412-SSNR
ATTINY412-SSNR

Microchip Technology

PIC10F202T-I/OT
PIC10F202T-I/OT

Microchip Technology

ATTINY404-SSNR
ATTINY404-SSNR

Microchip Technology

Tech Hub

Search

Search

PRODUCT

PRODUCT

PHONE

PHONE

USER

USER