Renesas R5F563NADGFB#V0

Overview

R5F563NADGFB#V0 from Renesas is a 100 MHz 32-bit RX63N Group microcontroller with integrated Ethernet MAC, full-speed USB 2.0 host/function/OTG, CAN, 12-bit and 10-bit A/D converters, 10-bit D/A converters, real-time clock, AES encryption engine, and 768 KB on-chip flash memory. It operates from a single 2.7–3.6 V supply and supports industrial temperature range (−40 to +85°C). This MCU targets networked industrial control, building automation gateways, and embedded HMI systems requiring deterministic real-time response and secure connectivity.

For engineers reviewing the R5F563NADGFB#V0 datasheet, R5F563NADGFB#V0 pinout, R5F563NADGFB#V0 application, or R5F563NADGFB#V0 equivalent, key selection criteria include Ethernet MAC support (vs. RX631), 176-pin LFBGA package (PLBG0176GA-A), 768 KB flash / 128 KB SRAM configuration, IEEE 802.3-compliant MII/RMII interface, and IEC60730 safety features including CRC, self-diagnostic A/D, and oscillation-stop detection.

Technical Context

The R5F563NADGFB#V0 implements the 32-bit RX CPU core with Harvard architecture, 5-stage pipeline, and variable-length instructions-delivering 165 DMIPS at 100 MHz. It integrates a dedicated Ethernet DMA controller (EDMAC), dual-channel EXDMAC for TFT LCD data transfer, and DTC for peripheral-triggered transfers without CPU intervention.

Its clock system includes PLL-based 100 MHz ICLK, configurable PCLK up to 50 MHz for peripherals, and independent IWDT-dedicated 125 kHz LOCO oscillator. The MCU supports four low-power modes, battery-backed RTC, and hardware register write protection for critical control registers.

Key Specifications

Pinout & Package

Package: PLBG0176GA-A - 176-pin Low-Profile Fine-Pitch Ball Grid Array (LFBGA), 13 × 13 mm, 0.8 mm pitch, RoHS-compliant, lead-free.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Compared with R5F563NADGFB#V0, R5F563NADDFB sacrifices Ethernet PHY integration for LQFP ease-of-use, while R5F563NECDFB trades flash density for scalability - both retain identical peripheral functionality and safety features but differ in memory capacity and physical interface readiness.

Availability

R5F563NADGFB#V0 is available at Aetrix Electronics and suitable for industrial automation gateways, building management controllers, and secure embedded HMIs requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for R5F563NADGFB#V0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for industrial, automotive, and IoT applications.

The RX63N Group is designed for real-time, networked embedded systems requiring integrated Ethernet, USB, CAN, and functional safety features - targeting industrial control, energy infrastructure, and smart building equipment.

FAQ

What is the package type and footprint of R5F563NADGFB#V0?

R5F563NADGFB#V0 uses the PLBG0176GA-A package: a 176-ball LFBGA with 13 × 13 mm body size and 0.8 mm ball pitch. It is RoHS-compliant and lead-free. This package provides full signal routing for Ethernet RMII, USB, CAN, and all 21 ADC channels, making it suitable for high-density industrial PCB layouts where thermal dissipation and EMI control are critical.

Does R5F563NADGFB#V0 support IEEE 802.3 Ethernet without an external PHY?

R5F563NADGFB#V0 integrates a full IEEE 802.3-compliant Ethernet MAC with MII and RMII interfaces, but requires an external PHY for physical layer signaling. It does not include a PHY; however, its RMII interface (ETH_TXD[1:0], ETH_RXD[1:0], ETH_REF_CLK) reduces pin count and simplifies connection to standard 2-pin PHYs like the LAN8720A or DP83848.

What safety certifications or features does R5F563NADGFB#V0 support for IEC60730 compliance?

R5F563NADGFB#V0 includes hardware-level IEC60730 Class B support features: oscillation-stop detection, hardware CRC calculator (with three polynomials), self-diagnostic A/D converter test, independent watchdog timer (IWDT) with dedicated LOCO clock, and memory protection unit (MPU). These enable certified functional safety implementations without external monitoring ICs.

Can R5F563NADGFB#V0 operate in low-power modes while maintaining RTC and wake-on-LAN functionality?

Yes. R5F563NADGFB#V0 supports deep software standby mode with RTC and Ethernet wake-on-LAN (WOL) active. In this mode, the CPU and most peripherals halt, but the subclock oscillator and EDMAC remain powered. Magic Packet™ detection triggers a hardware reset, allowing rapid resumption of network services with minimal energy consumption (<10 µA typical).

What is the maximum resolution and sampling rate of the integrated A/D converters in R5F563NADGFB#V0?

R5F563NADGFB#V0 integrates two A/D converters: a 12-bit S12AD unit with 21 channels (1 µs conversion time at 50 MHz PCLK) and a separate 10-bit AD unit with 8 channels (also 1 µs). Both support scan mode, sample-and-hold, and trigger-based conversion start - enabling synchronized multi-channel acquisition for motor current sensing or environmental monitoring.