Renesas R5F563NBDGFP#V0
- Part No.:
- R5F563NBDGFP#V0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F563NBDGFP#V0.pdf
- Description:
- 32BIT MCU RX63N
- Quantity:
- Payment:

- Shipping:

Inventory:2,642
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F563NBDGFP#V0 from Renesas is a 100 MHz 32-bit RXv1 CPU-based microcontroller with integrated Ethernet MAC, full-speed USB 2.0 host/function/OTG, triple CAN, 12-bit and 10-bit A/D converters, 10-bit D/A, RTC, AES encryption (DEU), and 1 MB on-chip flash memory in a 100-pin LQFP package. It operates from 2.7–3.6 V and supports -40 to +85°C industrial temperature range.
For engineers reviewing the R5F563NBDGFP#V0 datasheet, R5F563NBDGFP#V0 pinout, R5F563NBDGFP#V0 application, or R5F563NBDGFP#V0 equivalent, this MCU is selected for embedded industrial gateways, networked HMI controllers, and real-time automation systems requiring deterministic Ethernet, secure firmware updates via USB, and analog sensor interfacing with on-chip precision timing.
Technical Context
The R5F563NBDGFP#V0 belongs to the RX63N Group and implements the RXv1 core with Harvard architecture, 5-stage pipeline, and IEEE-754 single-precision FPU delivering 165 DMIPS at 100 MHz. It integrates dedicated hardware accelerators including EDMAC for Ethernet DMA, EXDMAC for LCD data transfer, and DEU for AES-128/192/256 encryption in ECB/CBC modes.
Its peripheral set includes three independent CAN modules (ISO 11898-1 compliant, 32 mailboxes each), 13 SCI channels supporting UART/I²C/SPI/LIN modes, four I²C interfaces (one FM+), and a 12-bit A/D converter with 21 channels and sample-and-hold - all synchronized to a configurable PCLK up to 50 MHz.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv1 32-bit CISC Harvard, 100 MHz max, 165 DMIPS, IEEE-754 FPU, MPU support |
| Flash Memory | 1 MB on-chip main flash, no wait states at 100 MHz, programmable in-system |
| RAM | 128 KB SRAM, no wait states, supports deep software standby backup |
| Ethernet Interface | IEEE 802.3-compliant MAC with MII/RMII, 10/100 Mbps, Magic Packet™ wake-on-LAN |
| A/D Converter | 12-bit S12AD unit with 21 channels, 1.0 µs conversion time @ 50 MHz PCLK, internal temp sensor |
| USB Interface | Full-speed USB 2.0 host/function/OTG controller with 2 KB buffer, self- and bus-powered modes |
| Security | Data Encryption Unit (DEU) supporting AES-128/192/256 in ECB/CBC modes |
Pinout & Package
Package: PLQP0100KB-A, 100-pin LQFP, 14 × 14 mm, 0.5-mm pitch, RoHS-compliant, lead-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Dual 2.7–3.6 V domains (core/analog/USB); 100-pin layout enables clean power partitioning |
| XTAL / EXTAL | Main crystal oscillator input/output | Supports 4–16 MHz external crystal; required for precise Ethernet/USB clock generation |
| ETH_MDC / ETH_MDIO | Management Data Clock / I/O | IEEE 802.3u-compliant MDIO interface for PHY register access and configuration |
| ETH_TXD0–3 / ETH_RXD0–3 | Ethernet transmit/receive data | MII mode: 4-bit TX/RX paths; RMII mode uses subset (TXD0/1, RXD0/1, TX_EN, CRS_DV) |
| USB_DP / USB_DM | USB 2.0 differential data pair | Full-speed (12 Mbps) signaling; internal transceiver eliminates need for external PHY |
| CAN0_TX / CAN0_RX | Channel 0 CAN transceiver signals | Direct connection to ISO 11898-1-compliant physical layer; supports standard/extended frames |
Key Features
| Feature | Design Value |
|---|---|
| Ethernet MAC + EDMAC | Dedicated descriptor-based DMA engine offloads CPU during frame transmission/reception |
| Triple CAN with 32 mailboxes | Independent message filtering and buffering per channel; supports automotive and industrial CAN FD-ready topologies |
| 12-bit A/D + Temp Sensor | On-die temperature sensor (±1°C accuracy) digitized by same 12-bit S12AD unit used for external analog inputs |
| USB OTG with dual-role support | Single port dynamically switches between host and device roles without external switch or reconfiguration |
| Real-time CRC calculator | Hardware-accelerated CRC-8/16 generation using three polynomials; supports LSB/MSB-first for protocol compliance |
| Low-power operation modes | Four distinct modes (Sleep, All-module stop, Software standby, Deep software standby) with sub-µA retention current |
Applications
| Industrial Ethernet Gateway | Networked HMI Controller |
|---|---|
Use Scenario: Aggregating Modbus TCP, EtherNet/IP, and PROFINET edge devices into a unified SCADA backbone. IC Role / Device Role / Timing Role: Primary protocol stack processor with deterministic Ethernet MAC, hardware timestamping, and real-time interrupt latency under 0.5 µs. Use Value: Eliminates external PHY and Ethernet switch ICs while enabling concurrent CAN and USB firmware updates without system interruption. |
Use Scenario: Touch-enabled operator panel with local logic, remote diagnostics, and over-the-air update capability. IC Role / Device Role / Timing Role: Central controller managing display refresh (via EXDMAC), touch input scanning, and secure USB/OTA firmware validation. Use Value: Integrated DEU enables AES-encrypted firmware image verification; built-in RTC and battery-backed registers preserve settings across power cycles. |
| Programmable Logic Controller (PLC) I/O Module | Secure IoT Edge Node |
Use Scenario: DIN-rail mounted digital I/O expansion module with fieldbus bridging and local safety monitoring. IC Role / Device Role / Timing Role: Real-time I/O scheduler using MTU2/TPU timers for precise PWM output and input capture of encoder pulses. Use Value: 12-bit A/D with sample-and-hold supports simultaneous sampling of multiple analog sensors (e.g., 4–20 mA loops) at 1 MSps aggregate rate. |
Use Scenario: Battery-powered environmental sensor node transmitting encrypted telemetry via Ethernet or USB to cloud gateway. IC Role / Device Role / Timing Role: Low-power coordinator executing sensor fusion, AES encryption, and scheduled Ethernet wake-up bursts. Use Value: Deep software standby mode draws <500 µA/MHz; integrated RTC triggers periodic wake-ups for sensor reads and secure packet transmission. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F563NEDDFP | 2 MB flash, 256 KB RAM, same 100-pin LQFP package, identical peripheral set | Higher memory headroom for complex protocol stacks (e.g., TLS + HTTP server) | Select when firmware size exceeds 1 MB or additional RAM is needed for Ethernet buffers and USB descriptors |
| R5F563NBCDFC | 1 MB flash, 128 KB RAM, 176-pin LQFP (PLQP0176KB-A), adds external bus interface and SDRAM support | Enables external memory expansion for GUI frame buffers or large data logging | Choose when system requires >128 KB working RAM or external parallel memory mapping not supported by 100-pin variant |
Compared with R5F563NBDGFP#V0, R5F563NEDDFP offers double flash and RAM in identical footprint for future-proofing, while R5F563NBCDFC trades pin count for external bus capability - making it suitable for memory-intensive HMI designs where PCB space allows larger package.
Availability
R5F563NBDGFP#V0 is available at Aetrix Electronics and suitable for industrial gateways, networked HMIs, and PLC I/O modules requiring stable component supply, long-term lifecycle assurance, and Renesas-qualified production traceability.
Supply support for R5F563NBDGFP#V0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RX63N Group targets high-integration industrial control applications, combining real-time Ethernet, USB, CAN, and security features in a single chip to reduce BOM cost and design complexity.
FAQ
What is the maximum operating frequency and core architecture of the R5F563NBDGFP#V0?
The R5F563NBDGFP#V0 operates at a maximum frequency of 100 MHz and implements the 32-bit RXv1 CPU core with Harvard architecture, 5-stage pipeline, and IEEE-754 single-precision floating-point unit. It delivers 165 DMIPS performance and supports memory protection via an integrated MPU. This architecture enables deterministic real-time execution critical for industrial Ethernet and CAN applications where R5F563NBDGFP#V0 is deployed.
Does the R5F563NBDGFP#V0 include on-chip Ethernet and USB functionality?
Yes, the R5F563NBDGFP#V0 integrates a full IEEE 802.3-compliant Ethernet MAC with MII/RMII support and a full-speed USB 2.0 host/function/OTG controller. It includes dedicated EDMAC and USB transfer buffers (2 KB each), eliminating the need for external PHY or transceivers. These features make R5F563NBDGFP#V0 suitable for standalone networked controllers without external connectivity ICs.
What are the memory resources available on the R5F563NBDGFP#V0?
The R5F563NBDGFP#V0 provides 1 MB of on-chip flash memory (no wait states at 100 MHz), 128 KB of SRAM (no wait states, supports deep software standby backup), and 32 KB of reprogrammable data flash (100,000 erase/write cycles). These resources are sufficient for dual-protocol stacks (e.g., Modbus TCP + CANopen) and secure firmware storage - key requirements addressed by the R5F563NBDGFP#V0 in industrial control designs.
How does the R5F563NBDGFP#V0 support functional safety and security standards?
The R5F563NBDGFP#V0 includes hardware features aligned with IEC 60730: oscillation-stop detection, CRC calculator, IWDT with dedicated LOCO clock, and self-diagnostic A/D functions. Its Data Encryption Unit (DEU) supports AES-128/192/256 in ECB/CBC modes for secure firmware updates and data confidentiality - directly enhancing R5F563NBDGFP#V0's suitability for certified industrial equipment.
What is the package type and thermal rating of the R5F563NBDGFP#V0?
The R5F563NBDGFP#V0 is housed in a PLQP0100KB-A 100-pin LQFP package (14 × 14 mm, 0.5-mm pitch) rated for industrial temperature range (-40 to +85°C). This package supports standard reflow soldering and provides robust thermal dissipation for continuous 100 MHz operation in enclosed control cabinets - a key specification confirmed for R5F563NBDGFP#V0 in its official Renesas documentation.
R5F563NBDGFP#V0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX600
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RX
- Core Size:
- 32-Bit
- Speed:
- 100MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, SCI, SPI, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 78
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 128K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 8x10b, 14x12b; D/A 1x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F563NBDGFP#V0 FAQ
1.How can I place an order for R5F563NBDGFP#V0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F563NBDGFP#V0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F563NBDGFP#V0 reliable?
The price and inventory of R5F563NBDGFP#V0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F563NBDGFP#V0 is usually 5 days.
3.What payment methods are accepted for R5F563NBDGFP#V0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F563NBDGFP#V0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F563NBDGFP#V0?
R5F563NBDGFP#V0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F563NBDGFP#V0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F563NBDGFP#V0?
For technical support, including R5F563NBDGFP#V0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F563NBDGFP#V0 requirements.
6.How does Aetrix verify that R5F563NBDGFP#V0 is sourced from the original manufacturer or authorized distributors?
All R5F563NBDGFP#V0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F563NBDGFP#V0 meets industry standards.
7.What is the process for return or replacement of R5F563NBDGFP#V0?
All R5F563NBDGFP#V0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F563NBDGFP#V0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F563NBDGFP#V0 part is unused and in its original packaging.
Return procedure for R5F563NBDGFP#V0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F563NBDGFP#V0 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

