Renesas R5F563NDCDLK#U0

Overview

R5F563NDCDLK#U0 from Renesas is a 100 MHz 32-bit RX63N Group microcontroller with integrated Ethernet MAC, single-precision IEEE-754 FPU, 1.5 Mbytes on-chip flash, 128 Kbytes SRAM, and 32 Kbytes data flash. It features 111 general-purpose I/O pins (18× 5-V tolerant), USB 2.0 host/function/OTG, three CAN channels, and operates from 2.7–3.6 V at –40 to +85°C in a 145-pin TFLGA package. Used in industrial gateways requiring deterministic real-time control and network connectivity.

For engineers reviewing the R5F563NDCDLK#U0 datasheet, R5F563NDCDLK#U0 pinout, R5F563NDCDLK#U0 application, or R5F563NDCDLK#U0 equivalent, this page delivers verified specifications, package mapping, functional alternatives, and design-critical timing, power, and interface details - all confirmed for the exact R5F563NDCDLK#U0 variant.

Technical Context

The R5F563NDCDLK#U0 implements the 32-bit RX CPU core with CISC Harvard architecture, 5-stage pipeline, and variable-length instructions enabling ultra-compact code. It integrates dedicated hardware accelerators including a 32-bit multiplier (1-cycle execution), divider (2-cycle), memory protection unit (MPU), and AES encryption engine (DEU) supporting 128/192/256-bit keys in ECB/CBC modes.

Its peripheral set includes an Ethernet controller compliant with IEEE 802.3 (10/100 Mbps, MII/RMII), full-speed USB 2.0 host/function/OTG with 2-Kbyte buffer, three ISO 11898-1 CAN modules (32 mailboxes each), and dual A/D converters: 21-channel 12-bit S12ADa (1.0 μs conversion @ 50 MHz PCLK) and 8-channel 10-bit ADa. RTC supports battery backup and time-capture on external events.

Key Specifications

Pinout & Package

Package: 145-pin TFLGA (PTLG0145KA-A), 7 mm × 7 mm, 0.5-mm pitch, 0.8-mm height, RoHS-compliant, lead-free.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Compared with R5F563NDCDLK#U0, R5F563NECDLK#U0 offers greater flash headroom without changing footprint or functionality, while R5F563NDCDFC#U0 trades Ethernet capability for higher I/O density and SRAM - making it suitable only where network connectivity is omitted and board space allows larger LQFP packaging.

Availability

R5F563NDCDLK#U0 is available at Aetrix Electronics and suitable for industrial gateways, smart metering hubs, PLC I/O modules, and medical infusion pump controllers requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for R5F563NDCDLK#U0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.

The RX63N Group is designed for high-performance, safety-aware industrial networking applications - integrating Ethernet, USB, CAN, and security accelerators into a single chip to reduce BOM cost and simplify certification.

FAQ

What is the maximum operating frequency and core type of the R5F563NDCDLK#U0?

The R5F563NDCDLK#U0 operates at a maximum frequency of 100 MHz using the 32-bit RX CPU core. This core delivers 165 DMIPS performance and includes a single-precision IEEE-754 floating-point unit, 32-bit multiplier (1-cycle), and divider (2-cycle). Its CISC Harvard architecture with 5-stage pipeline and variable-length instructions enables efficient code density and deterministic real-time execution - critical for the R5F563NDCDLK#U0's use in industrial control and networking applications.

Does the R5F563NDCDLK#U0 include an Ethernet controller, and what interfaces does it support?

Yes, the R5F563NDCDLK#U0 includes a fully integrated IEEE 802.3-compliant Ethernet MAC supporting both 10 Mbps and 100 Mbps operation in full- and half-duplex modes. It supports Media Independent Interface (MII) and Reduced MII (RMII), Magic Packet™ wake-on-LAN detection, and IEEE 802.3x flow control. The dedicated EDMAC hardware offloads frame handling, reducing CPU load - a key differentiator of the R5F563NDCDLK#U0 within the RX63N Group versus the Ethernet-less RX631 variants.

What are the memory resources available on the R5F563NDCDLK#U0?

The R5F563NDCDLK#U0 integrates 1.5 Mbytes of on-chip flash memory (executed at 100 MHz with zero wait states), 128 Kbytes of SRAM (also zero-wait), and 32 Kbytes of reprogrammable data flash rated for 100,000 erase/write cycles. Flash supports on-board programming via SWD/FINE and off-board parallel programming (not applicable to this 145-pin variant). These memory resources make the R5F563NDCDLK#U0 suitable for complex firmware with dual-bank OTA updates, real-time data logging, and cryptographic key storage.

How many analog-to-digital converter channels does the R5F563NDCDLK#U0 provide, and what are their resolutions?

The R5F563NDCDLK#U0 provides two independent A/D converters: a 12-bit S12ADa unit with 21 input channels (AN000–AN020) and a 10-bit ADb unit with 8 input channels (AN0–AN7). Both support scan mode, sample-and-hold, and trigger-based conversion (software, timer, or external signal). At 50 MHz PCLK, conversion time is 1.0 μs per channel. The R5F563NDCDLK#U0 also includes an on-die temperature sensor interfaced to the 12-bit ADC, delivering ±1°C accuracy - essential for thermal monitoring in industrial and medical applications.

What package type and pin count does the R5F563NDCDLK#U0 use, and is it RoHS-compliant?

The R5F563NDCDLK#U0 uses a 145-pin TFLGA (Thin Fine-Pitch Land Grid Array) package designated PTLG0145KA-A, measuring 7 mm × 7 mm with 0.5-mm pitch and 0.8-mm height. It is RoHS-compliant and lead-free. This package provides 111 general-purpose I/O pins (including 18× 5-V tolerant), dedicated debug (SWD/FINE), and high-density signal routing ideal for compact industrial modules - distinguishing the R5F563NDCDLK#U0 from larger LQFP or BGA variants in the RX63N family.