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Renesas R5F563NDDGFP#V0

Part No.:
R5F563NDDGFP#V0
Manufacturer:
Renesas
Category:
Microcontrollers
Package:
100-LQFP
Datasheet:
AetrixR5F563NDDGFP#V0.pdf
Description:
32BIT MCU RX63N
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:4,885

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Product details

Overview

R5F563NDDGFP#V0 from Renesas is a 100 MHz 32-bit RX63N Group microcontroller with integrated Ethernet MAC, single-precision IEEE-754 FPU, 1.5 MB on-chip flash, 128 KB SRAM, and 32 KB data flash. It features 134 general-purpose I/O pins (18 × 5-V tolerant), USB 2.0 host/function/OTG, three CAN channels, and hardware AES encryption. Designed for industrial networking gateways requiring deterministic real-time control and secure connectivity.

For engineers reviewing the R5F563NDDGFP#V0 datasheet, R5F563NDDGFP#V0 pinout, R5F563NDDGFP#V0 application, or R5F563NDDGFP#V0 equivalent, key selection criteria include Ethernet MAC support, 100 MHz operation with MPU, 12-bit + 10-bit ADC concurrency, dual DAC outputs, and -40°C to +85°C temperature grade in 100-pin LQFP.

Technical Context

The R5F563NDDGFP#V0 implements the 32-bit RX CPU core with 5-stage CISC Harvard pipeline, supporting 165 DMIPS at 100 MHz and IEEE-754 single-precision floating-point arithmetic. Its memory subsystem includes zero-wait-state 100 MHz flash access, 128 KB SRAM with deep software standby backup, and background-programmable 32 KB data flash rated for 100,000 erase/write cycles.

Peripherals are clocked via configurable PLL and on-chip oscillators (HOCO/LOCO), with independent PCLK (up to 50 MHz) for peripherals and ICLK (100 MHz) for CPU. The Ethernet controller supports MII/RMII, 10/100 Mbps full/half-duplex, IEEE 802.3x flow control, and Magic Packet™ wake-on-LAN - all enabled without external PHY interface logic.

Key Specifications

Parameter Value and Actual Design Meaning
CPU Core RX 32-bit CISC Harvard architecture, 100 MHz max, 165 DMIPS, IEEE-754 FPU, MPU, JTAG/FINE debug
Memory 1.5 MB flash (no wait states @100 MHz), 128 KB SRAM (no wait states), 32 KB reprogrammable data flash (100k cycles)
Connectivity Ethernet MAC (10/100 Mbps, MII/RMII), USB 2.0 host/function/OTG (full-speed), 3× CAN (ISO 11898-1), 4× I²C (1 Mbps), 3× SPI, 13× SCI
Analog 21-channel 12-bit ADC (1 µs conversion @50 MHz PCLK), 8-channel 10-bit ADC, 2× 10-bit DAC, on-die temperature sensor (±1°C)
Timers & Control 16× 16-bit TPU channels, 6× MTU2 channels, 4× 8-bit TMR, 4× CMT, RTC with battery backup, IWDT with dedicated LOCO clock
Security & IO AES-128/192/256 (ECB/CBC), CRC calculator, 134 GPIO (18× 5-V tolerant, open-drain, pull-up), unique ID (G version only)
Power & Environment 2.7–3.6 V supply, 500 µA/MHz active current, four low-power modes, -40°C to +85°C operating range (D version)

Pinout & Package

Package: PLQP0100KB-A - 100-pin LQFP, 14 mm × 14 mm, 0.5 mm pitch, exposed pad, RoHS-compliant.

Pin/Terminal Circuit Role Design Meaning
VCC / VSS Power supply / Ground Dual 2.7–3.6 V domains: VCC for digital core/I/O, AVCC0 for analog, VREFH for ADC/DAC reference
XTAL / EXTAL Main crystal oscillator input/output Supports 4–16 MHz external crystal; enables PLL-based 100 MHz system clock generation
MD[3:0] Mode selection inputs Configure boot mode (ROM/flash), bus width, and reset vector location at power-on
ETH_MDC / ETH_MDIO Ethernet management interface IEEE 802.3-compliant MDIO bus for PHY register access and configuration
USB_VBUS / USB_ID USB OTG detection VBUS sensing enables host/device role auto-detection; ID pin selects OTG role per USB 2.0 specification
AD[19:0] / A[23:0] External bus address/data multiplex Configurable 8/16/32-bit external bus interface with 8 CS areas (16 MB each) and SDRAM controller (128 MB)

Key Features

Feature Design Value
Ethernet MAC with EDMAC Dedicated DMA engine offloads CPU during frame transmission/reception; 2 KB TX/RX FIFOs reduce interrupt overhead
USB 2.0 Host/Function/OTG Single-port dual-role module with integrated transceiver and 2 KB on-chip RAM buffer - no external PHY required
Concurrent ADC subsystem Independent 12-bit (21 ch) and 10-bit (8 ch) converters with shared sample-and-hold and trigger synchronization
Hardware AES engine Zero-cycle-overhead encryption/decryption for firmware updates, secure boot, and TLS stack acceleration
Real-time clock with capture Sub-second timestamping of external events via dedicated input pins - critical for time-sensitive industrial protocols
IEC 60730 safety functions Built-in oscillation-stop detection, CRC calculator, self-diagnostic A/D, and IWDT meet Class B compliance requirements

Applications

Industrial Ethernet Gateway Secure PLC Communication Module

Use Scenario: Aggregating Modbus TCP, EtherNet/IP, and PROFINET traffic between field devices and cloud SCADA systems.

IC Role / Device Role / Timing Role: Primary network controller executing protocol stacks, managing packet routing, and synchronizing time-critical I/O via RTC capture.

Use Value: Integrated Ethernet MAC + USB + CAN eliminates external PHY and bridge ICs; 100 MHz FPU accelerates protocol math; AES secures firmware OTA updates.

Use Scenario: Retrofitting legacy PLCs with encrypted remote diagnostics and secure firmware update capability over USB or Ethernet.

IC Role / Device Role / Timing Role: Secure co-processor handling cryptographic operations, secure boot verification, and tamper-resistant logging via internal flash.

Use Value: Hardware AES-256 and CRC calculator enable Class B IEC 60730 certification; 128 KB SRAM hosts dual-bank firmware images.

Smart Energy Meter Hub Building Automation Controller

Use Scenario: Multi-tenant energy meter aggregation with tariff switching, load profiling, and DLMS/COSEM over TCP/IP.

IC Role / Device Role / Timing Role: Real-time data concentrator sampling 12-bit ADCs from metrology ICs while maintaining precise time-of-use billing stamps.

Use Value: Concurrent 12-bit + 10-bit ADCs acquire voltage/current/temperature simultaneously; RTC with alarm interrupt triggers scheduled meter reads.

Use Scenario: HVAC controller interfacing with BACnet MS/TP, KNX, and LonWorks field buses while providing local web UI via Ethernet.

IC Role / Device Role / Timing Role: Central protocol translator running multiple serial stacks (SCI/RS485) and managing PWM fan control via MTU2 timers.

Use Value: 134 GPIO support mixed-voltage I/O (5-V tolerant); 16× TPU channels drive multi-zone valve actuators with phase-counting feedback.

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Alternative Part Technical Difference Application Difference Selection Advice
R5F563NECDFP 2 MB flash, same 128 KB SRAM, identical package and peripheral set Higher firmware storage headroom for future feature expansion or dual-image OTA Select when firmware size exceeds 1.5 MB or long-term scalability is prioritized over cost
R5F563NDDDFC LQFP-176 package (PLQP0176KB-A), 1.5 MB flash, 128 KB SRAM, adds external bus width (32-bit) and SDRAM support Enables high-bandwidth interfaces (e.g., TFT LCD, NAND flash) not possible in 100-pin variant Select when external memory expansion or parallel peripheral interfacing is required

Compared with R5F563NDDGFP#V0, R5F563NECDFP offers +512 KB flash without changing footprint or thermal profile, while R5F563NDDDFC trades pin count for external bus capability - both retain identical Ethernet, USB, CAN, and security functionality.

Availability

R5F563NDDGFP#V0 is available at Aetrix Electronics and suitable for industrial networking gateways, secure PLC communication modules, smart energy meter hubs, and building automation controllers requiring stable component supply across multi-year production cycles.

Supply support for R5F563NDDGFP#V0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.

The RX63N Group targets industrial automation and networked embedded systems, combining real-time performance, functional safety features (IEC 60730), and integrated connectivity - all in a single-chip solution.

FAQ

What is the maximum operating frequency and core architecture of the R5F563NDDGFP#V0?

The R5F563NDDGFP#V0 operates at a maximum frequency of 100 MHz using the 32-bit RX CPU core with a 5-stage CISC Harvard pipeline. It delivers 165 DMIPS and includes a single-precision IEEE-754 floating-point unit, memory protection unit (MPU), and JTAG/FINE debugging interfaces - all confirmed in Renesas document R01DS0098EJ0180.

Does the R5F563NDDGFP#V0 support Ethernet connectivity, and what interface standards does it implement?

Yes, the R5F563NDDGFP#V0 integrates a full-featured Ethernet MAC supporting 10/100 Mbps in full- and half-duplex modes. It complies with IEEE 802.3 and 802.3x standards and provides MII and RMII physical layer interfaces - a defining feature distinguishing the RX63N Group from the RX631 Group.

What are the memory resources available on the R5F563NDDGFP#V0?

The R5F563NDDGFP#V0 includes 1.5 MB of on-chip flash memory (zero wait states at 100 MHz), 128 KB of SRAM (zero wait states), and 32 KB of data flash programmable up to 100,000 times. These values are explicitly listed for part number R5F563NDDGFP#V0 in Table 1.3 of R01DS0098EJ0180.

Which communication interfaces are integrated into the R5F563NDDGFP#V0?

The R5F563NDDGFP#V0 integrates Ethernet MAC, USB 2.0 host/function/OTG (full-speed), three CAN channels (ISO 11898-1), four I²C interfaces (1 Mbps), three SPI channels, 13 SCI channels, and one IEBus channel - all documented in the "Communication function" section of R01DS0098EJ0180.

What is the operating temperature range and package type for the R5F563NDDGFP#V0?

The R5F563NDDGFP#V0 is rated for -40°C to +85°C (D version) and housed in a 100-pin LQFP package (PLQP0100KB-A, 14 mm × 14 mm, 0.5 mm pitch). This matches the "D version" designation and PLQP0100KB-A package listed for R5F563NDDGFP#V0 in Table 1.3 of the official datasheet.

R5F563NDDGFP#V0 Specifications

Product attributes
Attribute value
Manufacturer:
Renesas
Package/Case:
100-LQFP
Series:
RX600
Packaging:
Tray
Product Status:
Active
Programmable:
-
Core Processor:
RX
Core Size:
32-Bit
Speed:
100MHz
Connectivity:
CANbus, EBI/EMI, Ethernet, I2C, LINbus, SCI, SPI, USB
Peripherals:
DMA, LVD, POR, PWM, WDT
Number of I/O:
78
Program Memory Size:
1.5MB (1.5M x 8)
Program Memory Type:
FLASH
EEPROM Size:
32K x 8
RAM Size:
128K x 8
Voltage - Supply (Vcc/Vdd):
2.7V ~ 3.6V
Data Converters:
A/D 8x10b, 14x12b; D/A 1x10b
Oscillator Type:
Internal
Operating Temperature:
-40°C ~ 105°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:

R5F563NDDGFP#V0 FAQ

1.How can I place an order for R5F563NDDGFP#V0 through Aetrix?

Please submit a Request for Quotation (RFQ) for R5F563NDDGFP#V0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for R5F563NDDGFP#V0 reliable?

The price and inventory of R5F563NDDGFP#V0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F563NDDGFP#V0 is usually 5 days.

3.What payment methods are accepted for R5F563NDDGFP#V0?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F563NDDGFP#V0 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for R5F563NDDGFP#V0?

R5F563NDDGFP#V0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your R5F563NDDGFP#V0 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for R5F563NDDGFP#V0?

For technical support, including R5F563NDDGFP#V0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F563NDDGFP#V0 requirements.

6.How does Aetrix verify that R5F563NDDGFP#V0 is sourced from the original manufacturer or authorized distributors?

All R5F563NDDGFP#V0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F563NDDGFP#V0 meets industry standards.

7.What is the process for return or replacement of R5F563NDDGFP#V0?

All R5F563NDDGFP#V0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F563NDDGFP#V0, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The R5F563NDDGFP#V0 part is unused and in its original packaging.

Return procedure for R5F563NDDGFP#V0:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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