Renesas R5F563T4EGFL#X0
- Part No.:
- R5F563T4EGFL#X0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
R5F563T4EGFL#X0.pdf
- Description:
- 32BIT MCU RX63T
- Quantity:
- Payment:

- Shipping:

Inventory:1,697
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F563T4EGFL#X0 from Renesas Electronics is a 100-MHz 32-bit RX CPU-based microcontroller optimized for digital power supply control and motor drive applications. It integrates dual 12-bit ADCs (with three sample-and-hold circuits, programmable gain amplifiers, and window comparators), one 10-bit 20-channel ADC, two 10-bit DACs, USB 2.0 full-speed interface, CAN 2.0B (ISO 11898-1 compliant), and dedicated Digital Power Supply Controller (DPC) hardware acceleration. It operates across –40°C to +105°C and supports IEC60730 safety compliance functions including oscillation-stop detection and self-diagnostic A/D.
For engineers reviewing the R5F563T4EGFL#X0 datasheet, R5F563T4EGFL#X0 pinout, R5F563T4EGFL#X0 application, or R5F563T4EGFL#X0 equivalent, this MCU delivers deterministic 100-MHz PWM timing with sub-nanosecond delay control (312 ps resolution), simultaneous 7-channel sampling across three ADC units, and on-chip FPU for real-time floating-point control loops in switched-mode power supplies and three-phase inverters.
Technical Context
The R5F563T4EGFL#X0 implements the RXv1 CPU core with Harvard architecture, 5-stage pipeline, and IEEE-754 single-precision FPU - enabling 165 DMIPS at 100 MHz. Its clock system includes PLL, 125-kHz LOCO for IWDT, and independent PCLKA/PCLKB/PCLKC/PCLKD domains enabling concurrent 100-MHz MTU3/GPT operation and 50-MHz peripheral bus timing.
It features dual ADC subsystems: S12ADB (two 12-bit units, 4 channels × 2, 1.0 µs conversion @ 50 MHz ADCLK) and ADA (one 10-bit unit, 20 channels, 0.5 µs @ 100 MHz ADCLK), both supporting software/external/timer-triggered conversion and self-diagnostic voltage generation. The DPC unit performs fixed-point compensator calculations using raw 10-bit ADC results for digital SMPS control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv1 32-bit CISC Harvard, 100 MHz max, 165 DMIPS, IEEE-754 FPU |
| Memory | 512 KB flash (no wait states @ 100 MHz), 48 KB SRAM, 32 KB data flash (100k erase cycles) |
| ADC System | Two 12-bit S12ADB units (4 ch × 2, 1.0 µs conv.), one 10-bit ADA unit (20 ch, 0.5 µs conv.), simultaneous 7-ch sampling |
| PWM & Timers | MTU3 (8 ch, 100 MHz, 3-phase complementary PWM), GPT (8 ch, 100 MHz, 312-ps PWM delay resolution), CMT (4 ch) |
| Communication | USB 2.0 FS (12 Mbps), CAN 2.0B (32 mailboxes), 5× SCI, 2× RIIC, 2× RSPI, no external bus interface |
| Power & Temp | Single 3.3 V or 5 V supply; operating range –40°C to +105°C (G version); four low-power modes |
| Safety Features | IEC60730 support: CRC calculator, IWDT with dedicated LOCO, oscillation-stop detection, A/D self-diagnostic |
Pinout & Package
Package: PLQP0144KA-A, 144-pin LQFP (20 mm × 20 mm, 0.5 mm pitch), RoHS-compliant, moisture sensitivity level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, VSS | Power supply and ground | Dual power domains: VCC/PLLVCC (4.0–5.5 V), AVCC/AVCC0 (4.0–5.5 V), VCC_USB (3.0–3.6 V) |
| XTAL, EXTAL | Main crystal oscillator input/output | Supports 4–12.5 MHz external crystal; enables PLL-based 100 MHz system clock |
| MTIOC0A–MTIOC7B | MTU3 waveform I/O | Eight 16-bit timer channels with complementary PWM, dead-time insertion, and phase-counting mode |
| AD00–AD19 | Analog input channels | 20 pins mapped to 10-bit ADA; 8 pins (AN000–AN007) shared with dual 12-bit S12ADB units |
| DA0, DA1 | Digital-to-analog outputs | Two 10-bit voltage-output DACs referenced to VREF (0 V to VREF range) |
| TXD0–TXD4, RXD0–RXD4 | SCI serial I/O | Five independent SCI channels supporting asynchronous, clock-synchronous, smart-card, SPI/I²C emulation |
| CAN_TX, CAN_RX | CAN physical layer interface | Differential CAN transceiver I/O (ISO 11898-1 compliant), integrated 32-mailbox message RAM |
| USB_DP, USB_DM | USB 2.0 differential pair | Full-speed (12 Mbps) USB device interface with internal transceiver and 2 KB buffer RAM |
Key Features
| Feature | Design Value |
|---|---|
| Digital Power Supply Controller (DPC) | Dedicated 16-bit fixed-point calculation engine for SMPS compensator algorithms, using raw 10-bit ADC inputs |
| Sub-nanosecond PWM Timing Control | GPT channels 0–3 support 312-ps PWM edge delay resolution at 100 MHz ICLK for precise gate-drive timing |
| Triple ADC Synchronization | Three independent ADC units (2× S12ADB + 1× ADA) enable simultaneous sampling on up to 7 analog channels |
| IEC60730 Safety Hardware | Integrated CAC (clock accuracy measurement), IWDT with dedicated LOCO, A/D self-test, CRC generator, and register write protection |
| Flexible Clock Domain Partitioning | Independent PCLKA (100 MHz for timers), PCLKB (50 MHz for peripherals), PCLKC (100 MHz for 10-bit ADC), PCLKD (50 MHz for 12-bit ADC) |
Applications
| Industrial Motor Drive | Digital AC-DC Power Supply |
|---|---|
|
Use Scenario: Closed-loop field-oriented control (FOC) of 3-phase PMSM/BLDC motors in HVAC compressors and industrial pumps. IC Role / Device Role / Timing Role: Real-time execution of FOC algorithm (Park/Clark transforms, PI regulators) via FPU and DPC; synchronized 3-phase PWM generation with dead-time compensation. Use Value: Eliminates external DSP/FPGA by integrating high-resolution PWM timing (312 ps), simultaneous multi-channel current sensing, and safety diagnostics required for UL/IEC certification. |
Use Scenario: Digitally controlled LLC resonant converter in server PSUs and telecom rectifiers. IC Role / Device Role / Timing Role: Primary-side digital controller executing voltage/current regulation loop using DPC hardware; 10-bit ADC samples resonant tank signals; 12-bit ADC monitors input/output rails. Use Value: Achieves <1% output regulation error across line/load transients using on-chip DPC acceleration and 7-channel simultaneous sampling for feedforward control. |
| Automotive Onboard Charger (OBC) | Uninterruptible Power Supply (UPS) |
|
Use Scenario: Bidirectional AC-DC/DC-AC conversion in EV onboard chargers compliant with ISO 15118 and SAE J1939. IC Role / Device Role / Timing Role: Dual-role controller managing PFC stage and DC-DC isolation stage; CAN interface handles vehicle communication; USB enables firmware updates. Use Value: Single-chip solution reduces BOM cost and board space while meeting automotive AEC-Q100 Grade 2 (–40°C to +105°C) and functional safety requirements via integrated IEC60730 features. |
Use Scenario: Line-interactive UPS with AVR (automatic voltage regulation) and battery charging management. IC Role / Device Role / Timing Role: System supervisor monitoring AC input, battery voltage, and load current; triggers relay switching and PWM-controlled buck/boost converters. Use Value: Simultaneous 7-channel ADC sampling captures instantaneous RMS values for fast AVR response (<20 ms), while dual DACs generate precision reference voltages for analog comparators. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F563TEADFB#V0 | Same RX63T family, 144-pin LQFP, 512 KB flash, 48 KB RAM, includes CAN module | Target applications requiring CAN bus connectivity (e.g., industrial automation networks) | Select R5F563TEADFB#V0 when CAN 2.0B communication is mandatory; R5F563T4EGFL#X0 omits CAN but retains identical ADC, PWM, and DPC capabilities |
| R5F563TBDDFB#V0 | Same package and temperature grade, but reduced memory: 256 KB flash, 24 KB RAM, no CAN | Cost-sensitive designs with smaller firmware footprint and lower RAM usage (e.g., basic SMPS controllers) | Choose R5F563TBDDFB#V0 for simplified power supply control where full 512 KB flash and 48 KB RAM are unnecessary |
Compared with R5F563TEADFB#V0, R5F563T4EGFL#X0 removes CAN functionality while retaining identical DPC, ADC, and PWM performance - reducing cost and complexity for standalone digital power applications. Against R5F563TBDDFB#V0, it provides double flash/RAM capacity for advanced control algorithms and larger safety-certified code bases.
Availability
R5F563T4EGFL#X0 is available at Aetrix Electronics and suitable for industrial motor drives, digital AC-DC power supplies, and uninterruptible power systems requiring stable component supply, long-term lifecycle support, and automotive-grade temperature operation.
Supply support for R5F563T4EGFL#X0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and enterprise applications.
The RX63T Group is designed specifically for digital power conversion and motor control, integrating hardware accelerators (DPC), high-resolution analog peripherals, and safety features aligned with IEC60730 for certified embedded power systems.
FAQ
What is the maximum operating frequency and CPU architecture of the R5F563T4EGFL#X0?
The R5F563T4EGFL#X0 operates at a maximum frequency of 100 MHz using the 32-bit RXv1 CPU core with Harvard architecture, 5-stage pipeline, and IEEE-754 single-precision floating-point unit. This delivers 165 DMIPS performance and supports deterministic real-time control loops essential for digital power and motor applications. The R5F563T4EGFL#X0 leverages its FPU for efficient Park/Clark transforms and PI regulator calculations without offloading to external processors.
Does the R5F563T4EGFL#X0 include CAN interface capability?
No, the R5F563T4EGFL#X0 does not include the CAN module. It belongs to the "D" variant subgroup of the RX63T family with CAN omitted - confirmed by Renesas product ordering codes and datasheet Table 1.3. For CAN-enabled alternatives, consider R5F563TEADFB#V0 (same package, 512 KB flash, CAN included). The R5F563T4EGFL#X0 retains all other key peripherals: USB 2.0, dual 12-bit ADCs, 10-bit 20-channel ADC, DPC, and high-resolution PWM timers.
What ADC resources are available on the R5F563T4EGFL#X0 and how are they configured?
The R5F563T4EGFL#X0 integrates three ADC subsystems: two independent 12-bit S12ADB units (4 channels × 2, with sample-and-hold, PGA, and window comparators) and one 10-bit ADA unit (20 channels). These support simultaneous sampling on up to 7 channels using coordinated trigger sources. Conversion time is 1.0 µs per channel for S12ADB (at 50 MHz ADCLK) and 0.5 µs for ADA (at 100 MHz ADCLK). The R5F563T4EGFL#X0 uses these for multi-sensor feedback in motor current/voltage sensing and power supply rail monitoring.
How does the Digital Power Supply Controller (DPC) function in the R5F563T4EGFL#X0?
The DPC in the R5F563T4EGFL#X0 is a dedicated 16-bit fixed-point calculation unit optimized for digital switch-mode power supply control. It executes compensator algorithms (e.g., PID, Type II/III) using raw 10-bit ADC measurement data, accelerating control loop execution without CPU intervention. This enables faster transient response and higher switching frequencies in LLC, phase-shifted full-bridge, and PFC topologies. The R5F563T4EGFL#X0's DPC directly interfaces with the ADA ADC and GPT timers to close the voltage/current regulation loop in hardware.
What package type and pin count does the R5F563T4EGFL#X0 use?
The R5F563T4EGFL#X0 uses the PLQP0144KA-A package: a 144-pin LQFP measuring 20 mm × 20 mm with 0.5 mm pitch, RoHS-compliant, and rated for –40°C to +105°C operation. This package provides 81 GPIO pins (including 27 open-drain outputs), full peripheral pinout for USB, ADC, DAC, timers, and communication interfaces, and supports industrial and automotive thermal requirements. The R5F563T4EGFL#X0's pin mapping aligns with other 144-pin RX63T variants for design reuse.
R5F563T4EGFL#X0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 48-LQFP
- Series:
- RX63T
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RX
- Core Size:
- 32-Bit
- Speed:
- 100MHz
- Connectivity:
- EBI/EMI, I2C, LINbus, SCI, SPI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 25
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 8K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 8x12b; D/A 2x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F563T4EGFL#X0 FAQ
1.How can I place an order for R5F563T4EGFL#X0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F563T4EGFL#X0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F563T4EGFL#X0 reliable?
The price and inventory of R5F563T4EGFL#X0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F563T4EGFL#X0 is usually 5 days.
3.What payment methods are accepted for R5F563T4EGFL#X0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F563T4EGFL#X0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F563T4EGFL#X0?
R5F563T4EGFL#X0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F563T4EGFL#X0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F563T4EGFL#X0?
For technical support, including R5F563T4EGFL#X0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F563T4EGFL#X0 requirements.
6.How does Aetrix verify that R5F563T4EGFL#X0 is sourced from the original manufacturer or authorized distributors?
All R5F563T4EGFL#X0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F563T4EGFL#X0 meets industry standards.
7.What is the process for return or replacement of R5F563T4EGFL#X0?
All R5F563T4EGFL#X0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F563T4EGFL#X0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F563T4EGFL#X0 part is unused and in its original packaging.
Return procedure for R5F563T4EGFL#X0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F563T4EGFL#X0 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

