Renesas R5F563T5EDFL#X0
- Part No.:
- R5F563T5EDFL#X0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
R5F563T5EDFL#X0.pdf
- Description:
- 32BIT MCU RX63T 48K LQFP48 -40/+
- Quantity:
- Payment:

- Shipping:

Inventory:1,049
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F563T5EDFL#X0 from Renesas Electronics is a 100-MHz 32-bit RX CPU-based microcontroller optimized for digital power supply control and motor inverter applications. It integrates dual 12-bit ADCs (with three sample-and-hold circuits, programmable gain amplifiers, and window comparators), one 10-bit 20-channel ADC, two 10-bit DACs, and dedicated Digital Power Supply Controller (DPC) hardware. It operates across –40°C to +85°C and supports IEC60730 functional safety compliance via self-diagnostic A/D, oscillation-stop detection, and CRC.
For engineers reviewing the R5F563T5EDFL#X0 datasheet, R5F563T5EDFL#X0 pinout, R5F563T5EDFL#X0 application, or R5F563T5EDFL#X0 equivalent, key selection criteria include its 100-MHz PWM timing resolution (312 ps delay control), three-phase complementary PWM generation with automatic dead-time insertion, on-chip DPC acceleration for SMPS control loops, and dual ADC simultaneous sampling capability for current/voltage sensing in real-time power conversion systems.
Technical Context
The R5F563T5EDFL#X0 implements the RXv1 CPU core with IEEE-754 single-precision FPU, 165 DMIPS performance at 100 MHz, and memory protection unit (MPU). Its clock system includes PLL, 125-kHz LOCO for IWDT, and independent PCLKA/PCLKB/PCLKC/PCLKD domains enabling precise peripheral clock domain partitioning - critical for synchronized PWM, ADC, and DPC operation.
It features MTU3 (8-channel 16-bit timer) and GPT (8-channel 16-bit general PWM timer) supporting three-phase complementary PWM output with hardware dead-time insertion and phase-counting mode. The DPC unit performs fixed-point compensator calculations using 10-bit ADC measurement results, accelerating digital control loop execution without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv1 32-bit CISC Harvard architecture, 100 MHz max, 165 DMIPS, IEEE-754 FPU |
| Flash / RAM | 512 KB on-chip flash (no wait states @ 100 MHz); 48 KB SRAM (no wait states) |
| ADC System | Dual 12-bit S12ADB (4 ch × 2 units, simultaneous 7-ch sampling); one 10-bit ADA (20 ch) |
| PWM & Timers | MTU3 (8 ch) + GPT (8 ch); 2× three-phase + 4× single-phase complementary PWM outputs |
| Digital Power Control | Dedicated 16-bit fixed-point DPC unit; uses 10-bit ADC inputs for real-time SMPS compensator calculation |
| Operating Range | –40°C to +85°C; 4.0–5.5 V main supply (VCC/PLLVCC), 3.0–3.6 V or 4.0–5.5 V analog supply (AVCC0) |
| Package | PLQP0048KB-A: 48-pin LQFP, 7 mm × 7 mm, 0.5 mm pitch, 39 GPIO pins with 5-V tolerance |
Pinout & Package
Package: PLQP0048KB-A - 48-pin LQFP, 7 mm × 7 mm body, 0.5 mm pitch, exposed pad (thermal pad), RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, VSS | Main power supply and ground | 4.0–5.5 V digital supply; decoupling required per Renesas layout guidelines |
| AVCC0, AVSS0 | Analog power and ground | Separate 3.0–3.6 V or 4.0–5.5 V analog domain; critical for ADC/DAC noise immunity |
| XTAL, EXTAL | External crystal oscillator input/output | Supports 4–12.5 MHz crystals for precise system clock generation |
| MTIOC0A–D, GTIOCA–B | MTU3/GPT waveform I/O | Hardware-controlled complementary PWM outputs with automatic dead-time insertion |
| AD00–AD07 | 12-bit ADC input channels | Eight analog inputs shared between dual S12ADB units; support simultaneous sampling |
| DA00, DA01 | 10-bit DAC outputs | Two independent voltage outputs for reference generation or feedback injection |
| POE0–POE3 | Port Output Enable control | Hardware fault shutdown of PWM outputs during overcurrent or comparator trip |
Key Features
| Feature | Design Value |
|---|---|
| Three-phase PWM generation | Hardware-accelerated non-overlapping waveforms with auto-inserted dead time; eliminates CPU overhead in inverter gate drive |
| 100-MHz PWM timing resolution | 312 ps delay control on GPT outputs enables fine-grained dead-time tuning for SiC/GaN switching optimization |
| Digital Power Supply Controller (DPC) | Fixed-point arithmetic engine computes PID/compensator outputs directly from 10-bit ADC measurements - bypasses CPU for sub-µs loop latency |
| IEC60730 safety functions | Integrated oscillation-stop detection, CRC calculator, self-diagnostic A/D, and IWDT with dedicated LOCO - reduces external safety component count |
| Dual 12-bit ADC with S/H | Three sample-and-hold circuits per unit enable simultaneous capture of phase current, DC-link voltage, and temperature for vector control |
Applications
| Motor Inverter Control | Digital AC-DC SMPS |
|---|---|
Use Scenario: Closed-loop field-oriented control (FOC) of 3-phase BLDC/PMSM motors in industrial drives. IC Role / Device Role / Timing Role: Real-time PWM generation, current/voltage sensing via dual ADCs, and DPC-assisted current loop compensation. Use Value: Hardware-dead-time insertion and 312-ps PWM delay control minimize shoot-through risk in high-frequency SiC inverters. |
Use Scenario: Digitally controlled LLC resonant converter with adaptive frequency and duty-cycle modulation. IC Role / Device Role / Timing Role: ADC sampling of primary-side current and output voltage; DPC executing Type III compensator in <1 µs. Use Value: On-chip DPC eliminates need for external DSP/FPGA, reducing BOM cost and control loop latency by >5× vs. software-only implementation. |
| Solar Microinverter | Uninterruptible Power Supply (UPS) |
Use Scenario: Grid-tied solar microinverter with MPPT and anti-islanding protection. IC Role / Device Role / Timing Role: Simultaneous sampling of PV voltage/current and AC line voltage; real-time harmonic analysis via FPU. Use Value: Dual 12-bit ADCs with common S/H allow synchronized acquisition across DC and AC domains - essential for accurate MPPT and grid sync. |
Use Scenario: Online double-conversion UPS with battery charging, inverter, and bypass control. IC Role / Device Role / Timing Role: Monitoring battery voltage/temperature, AC input/output quality, and managing transfer switching via GPIO and PWM. Use Value: Integrated IEC60730 diagnostics (CRC, IWDT, A/D self-test) satisfy Class B safety requirements without external monitoring ICs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital power and motor control applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F563TEADFB#V0 | 144-pin LQFP; 512 KB flash; 48 KB RAM; includes CAN interface; no DPC disable option | Targeted at higher-channel-count inverters requiring CAN bus communication and extended peripheral set | Select when CAN connectivity and >48 GPIO are required; not pin-compatible with R5F563T5EDFL#X0 |
| R5F563TBDDFP#V0 | 100-pin LQFP; 256 KB flash; 24 KB RAM; no CAN; same DPC and ADC capabilities | Cost-optimized variant for space-constrained but functionally equivalent power designs | Choose for identical DPC/ADC/PWM functionality in larger package with more GPIO and external bus support |
Compared with R5F563T5EDFL#X0, the R5F563TEADFB#V0 adds CAN and expands I/O but increases footprint and cost; the R5F563TBDDFP#V0 retains full DPC/ADC/PWM capability in a 100-pin package with greater routing flexibility and external memory support - both serve distinct mechanical and interface requirements rather than direct drop-in replacement.
Availability
R5F563T5EDFL#X0 is available at Aetrix Electronics and suitable for digital power supply design, motor inverter development, solar microinverter production, and uninterruptible power supply (UPS) manufacturing requiring stable component supply and long-term industrial lifecycle support.
Supply support for R5F563T5EDFL#X0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering trusted embedded solutions for automotive, industrial, infrastructure, and IoT applications.
The RX63T Group - including R5F563T5EDFL#X0 - was designed specifically for high-precision digital power conversion and motor control, integrating hardware accelerators (DPC, MTU3, GPT) and safety features (IEC60730) into a single-chip solution.
FAQ
What is the operating voltage range for R5F563T5EDFL#X0?
The R5F563T5EDFL#X0 supports a 4.0–5.5 V supply on VCC/PLLVCC pins and flexible analog supply options: AVCC0 can be operated at either 3.0–3.6 V or 4.0–5.5 V, enabling compatibility with both 3.3-V and 5-V sensor interfaces while maintaining full ADC/DAC performance. This dual-range analog supply is explicitly specified in the R01DS0087EJ0220 datasheet Section 1.1.
Does R5F563T5EDFL#X0 include CAN interface functionality?
No, R5F563T5EDFL#X0 does not include the CAN module. Per Table 1.2 (Page 9) and product ordering code decoding in Table 1.3 (Page 10) of the R01DS0087EJ0220 datasheet, the "D" in the fourth character of the part number (R5F563TD5EDFL#X0) indicates "CAN module not included". Only variants with "E" (e.g., R5F563TE…) integrate the ISO11898-1 compliant CAN controller.
What is the maximum ADC sampling rate supported by R5F563T5EDFL#X0?
The R5F563T5EDFL#X0 supports up to 1 MSPS per channel on its dual 12-bit S12ADB units (1.0 µs conversion time at PCLKD = 50 MHz) and 2 MSPS on its 10-bit ADA unit (0.5 µs at ADCLK = 100 MHz). Simultaneous sampling across seven channels is achievable using the three-sample-and-hold circuits - confirmed in Section 1.1 "12-bit A/D converter (S12ADB)" on Page 6 of R01DS0087EJ0220.
How does the Digital Power Supply Controller (DPC) in R5F563T5EDFL#X0 operate?
The DPC in R5F563T5EDFL#X0 is a dedicated 16-bit fixed-point calculation unit that executes digital compensator algorithms (e.g., PID, Type II/III) using real-time inputs from the 10-bit ADC. It operates autonomously without CPU intervention, producing control outputs in under 1 µs - a capability documented in Section 1.1 "Digital power supply controller (DPC)" on Page 7 of R01DS0087EJ0220.
What package type and pin count does R5F563T5EDFL#X0 use?
R5F563T5EDFL#X0 uses the PLQP0048KB-A package: a 48-pin LQFP with 7 mm × 7 mm body size, 0.5 mm pin pitch, and thermal pad. This is confirmed in Table 1.2 (Page 9) and the "List of Products" (Table 1.3, Page 10) of the R01DS0087EJ0220 datasheet, where the "FL" suffix maps to the 48-pin variant.
R5F563T5EDFL#X0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 48-LQFP
- Series:
- RX63T
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RX
- Core Size:
- 32-Bit
- Speed:
- 100MHz
- Connectivity:
- I2C, LINbus, SCI, SPI, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 25
- Program Memory Size:
- 48KB (48K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 8K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 8x12b; D/A 2x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F563T5EDFL#X0 FAQ
1.How can I place an order for R5F563T5EDFL#X0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F563T5EDFL#X0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F563T5EDFL#X0 reliable?
The price and inventory of R5F563T5EDFL#X0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F563T5EDFL#X0 is usually 5 days.
3.What payment methods are accepted for R5F563T5EDFL#X0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F563T5EDFL#X0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F563T5EDFL#X0?
R5F563T5EDFL#X0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F563T5EDFL#X0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F563T5EDFL#X0?
For technical support, including R5F563T5EDFL#X0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F563T5EDFL#X0 requirements.
6.How does Aetrix verify that R5F563T5EDFL#X0 is sourced from the original manufacturer or authorized distributors?
All R5F563T5EDFL#X0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F563T5EDFL#X0 meets industry standards.
7.What is the process for return or replacement of R5F563T5EDFL#X0?
All R5F563T5EDFL#X0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F563T5EDFL#X0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F563T5EDFL#X0 part is unused and in its original packaging.
Return procedure for R5F563T5EDFL#X0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F563T5EDFL#X0 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

