Renesas R5F563TBADFH#V1
- Part No.:
- R5F563TBADFH#V1
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 112-LQFP
- Datasheet:
-
R5F563TBADFH#V1.pdf
- Description:
- IC MCU 32BIT 256KB FLASH 112LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:3,534
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F563TBADFH#V1 from Renesas Electronics is a 100-MHz 32-bit RX CPU-based microcontroller designed for digital power supply control and motor drive applications. It integrates dual 12-bit ADCs (8 channels total, three sample-and-hold circuits per unit), one 10-bit ADC (20 channels), two 10-bit DACs, CAN interface, USB 2.0 full-speed, and hardware-accelerated digital power supply controller (DPC) logic - enabling real-time compensator calculations for switched-mode power supplies.
For engineers reviewing the R5F563TBADFH#V1 datasheet, R5F563TBADFH#V1 pinout, R5F563TBADFH#V1 application, or R5F563TBADFH#V1 equivalent, this MCU delivers deterministic PWM timing (312-ps resolution at 100 MHz), IEC60730-compliant self-diagnostic features (oscillation-stop detection, CRC, ADC self-test), and robust low-power operation across –40°C to +85°C industrial temperature range in a 112-pin LQFP package.
Technical Context
The R5F563TBADFH#V1 implements the RXv1 CPU core with IEEE-754 single-precision FPU, 165 DMIPS performance at 100 MHz, and memory protection unit (MPU). Its clock system supports external crystal (4–12.5 MHz) with PLL multiplication, dedicated 125-kHz LOCO for IWDT, and independent clock domains for ICLK (100 MHz), PCLKA (100 MHz), PCLKB (50 MHz), and PCLKD (50 MHz) to optimize peripheral timing.
It features two complementary PWM timer units: MTU3 (8-channel, 100-MHz operation, three-phase PWM with automatic dead-time insertion) and GPT (8-channel, 100-MHz operation, programmable PWM delay down to 312 ps), both supporting simultaneous A/D trigger generation and phase-counting modes - critical for synchronous rectification and digital PFC control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv1 32-bit CISC Harvard architecture with 5-stage pipeline, 165 DMIPS @ 100 MHz |
| Max Operating Frequency | 100 MHz system clock (ICLK); enables sub-microsecond interrupt latency and real-time control loop execution |
| Memory | 256 KB on-chip flash (no wait states), 24 KB SRAM, 32 KB data flash (100,000 write/erase cycles) |
| Analog Peripherals | Dual 12-bit S12ADB ADCs (8 ch total, 3× S/H per unit), one 10-bit ADA ADC (20 ch), two 10-bit DACs |
| PWM & Timing | MTU3 (8 ch) + GPT (8 ch) with 312-ps PWM delay resolution, three-phase complementary output, and A/D trigger synchronization |
| Communication | CAN 2.0B (1 ch, 32 mailboxes), USB 2.0 full-speed (1 ch), 5× SCI, 2× RIIC, 2× RSPI, all with DMA/DTC support |
| Digital Power Control | Dedicated DPC unit for fixed-point compensator calculation in digital SMPS; uses 10-bit ADC results directly |
Pinout & Package
Package: PLQP0112JA-A - 112-pin LQFP, 20 × 20 mm, 0.65 mm pitch, exposed thermal pad, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, VSS | Power supply and ground | Separate analog/digital domains: AVCC0/AVCC (3.0–3.6 V or 4.0–5.5 V), VCC (4.0–5.5 V), VSS reference planes |
| XTAL, EXTAL | Main crystal oscillator input/output | Supports 4–12.5 MHz external crystal; enables precise clock source for USB and CAN timing compliance |
| MTIOC0A–MTIOC7B | MTU3 waveform I/O | Eight 16-bit timer channels with complementary PWM outputs; supports non-overlapping gate drive for 3-phase inverters |
| GTIOCA0–GTIOCB3 | GPT waveform I/O | Four GPT channels with programmable dead-time and 312-ps PWM edge delay for digital PFC and LLC resonant control |
| AD00–AD07, AD10–AD19 | Analog input channels | 8× 12-bit (S12ADB) + 20× 10-bit (ADA) inputs; simultaneous sampling on up to 7 channels using three ADC units |
| DA0, DA1 | Digital-to-analog outputs | Two 10-bit voltage-output DACs (0–VREF); used for reference generation, bias control, or analog feedback injection |
| TXD0–TXD4, RXD0–RXD4 | SCI serial I/O | Five independent asynchronous/clock-synchronous interfaces; supports LIN, smart-card, SPI, and I²C emulation modes |
| TXD6, RXD6 | CAN transceiver I/O | Dedicated CANH/CANL pins for ISO 11898-1 compliant differential bus communication (1 Mbps max) |
Key Features
| Feature | Design Value |
|---|---|
| IEC60730 Compliance Support | Oscillation-stop detection, CRC calculator, ADC self-diagnostic, IWDT with dedicated LOCO, frequency measurement circuit |
| Digital Power Supply Controller (DPC) | Hardware-accelerated 16-bit fixed-point compensator engine; accepts raw 10-bit ADC samples for real-time PID/lead-lag calculation |
| PWM Timing Precision | 312-ps resolution on GPT PWM edges at 100 MHz - enables fine-grained dead-time tuning and adaptive timing compensation |
| Simultaneous Multi-ADC Sampling | Three independent ADC units allow synchronized sampling across 7 channels (e.g., phase currents + DC bus + temperature) |
| Robust Debug & Security | FINE two-wire debug interface, JTAG, MPU, register write protection, and secure boot ROM option (not enabled in this variant) |
Applications
| Industrial Digital Power Supplies | Motor Drive Inverters |
|---|---|
|
Use Scenario: Closed-loop control of AC/DC and DC/DC converters (PFC, LLC, phase-shifted full-bridge) with adaptive voltage/current regulation. IC Role / Device Role / Timing Role: Real-time digital controller executing PID/compensator algorithms via DPC unit, synchronizing PWM, ADC sampling, and CAN status reporting. Use Value: Eliminates external DSP/FPGA; achieves <1 µs control loop latency with hardware-accelerated math and deterministic 312-ps PWM edge placement. |
Use Scenario: Field-oriented control (FOC) of 3-phase BLDC/PMSM motors in HVAC compressors, industrial pumps, and servo drives. IC Role / Device Role / Timing Role: Central timing and signal acquisition hub - generating complementary PWM for gate drivers, sampling current/voltage sensors, and managing CAN diagnostics. Use Value: Simultaneous 7-channel ADC sampling captures motor phase currents and bus voltage within one PWM cycle; MTU3/GPT timers deliver jitter-free gate timing. |
| Uninterruptible Power Systems (UPS) | Renewable Energy Inverters |
|
Use Scenario: Dual-mode operation (line-interactive and online) with battery charging, inverter output regulation, and grid synchronization. IC Role / Device Role / Timing Role: Master controller coordinating AC/DC rectifier, DC/DC charger, and DC/AC inverter stages via CAN and internal peripherals. Use Value: Integrated CAN + USB + multiple SCI interfaces enable seamless communication with BMS, display, and host PC; IEC60730 features satisfy safety certification requirements. |
Use Scenario: Grid-tied solar microinverters and string inverters requiring high-efficiency MPPT, anti-islanding detection, and reactive power control. IC Role / Device Role / Timing Role: High-precision timing controller managing interleaved boost stages, H-bridge inversion, and grid-synchronization sampling. Use Value: 100-MHz PWM with 312-ps delay resolution enables precise reactive power injection; dual ADCs support simultaneous PV voltage, current, and grid voltage monitoring. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital power control applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F563TEADFH#V1 | 512 KB flash, 48 KB RAM, same package and peripheral set; includes identical DPC, ADC, PWM, and CAN capabilities | Supports larger firmware images and complex control algorithms; suitable for multi-stage power conversion with extended diagnostics | Select when firmware size exceeds 256 KB or additional SRAM is required for multi-loop control buffers |
| R5F563TBDDFH#V0 | Same flash/RAM configuration but lacks CAN module; otherwise identical clock, ADC, PWM, and DPC functionality | Applicable where CAN is not required (e.g., isolated DC/DC modules with UART-only telemetry) | Choose for cost-sensitive, CAN-free designs needing identical analog/peripheral performance and IEC60730 compliance |
Compared with R5F563TBADFH#V1, R5F563TEADFH#V1 offers double flash and RAM for advanced firmware while retaining identical real-time control capability; R5F563TBDDFH#V0 removes CAN but preserves all analog timing and DPC functions - making it ideal for UART/USB-only digital power modules.
Availability
R5F563TBADFH#V1 is available at Aetrix Electronics and suitable for industrial digital power supplies, motor drive inverters, UPS systems, and renewable energy inverters requiring stable component supply, long-term lifecycle support, and automotive-grade reliability under –40°C to +85°C conditions.
Supply support for R5F563TBADFH#V1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and infrastructure markets.
The RX63T Group - including R5F563TBADFH#V1 - was engineered specifically for digital power supply control and motor drive applications, integrating hardware-accelerated math units, ultra-precise PWM timing, and IEC60730 safety features into a single-chip solution.
FAQ
What is the maximum operating frequency and CPU performance of the R5F563TBADFH#V1?
The R5F563TBADFH#V1 operates at a maximum system clock frequency of 100 MHz and delivers 165 DMIPS performance using the 32-bit RXv1 CPU core with integrated single-precision IEEE-754 floating-point unit. This enables sub-microsecond control loop execution essential for digital power supply and motor control applications where deterministic timing is critical.
Does the R5F563TBADFH#V1 include a CAN interface, and what version does it support?
Yes, the R5F563TBADFH#V1 includes one CAN 2.0B-compliant channel supporting both standard and extended frames per ISO 11898-1, with 32 configurable mailboxes. It operates at up to 1 Mbps and integrates dedicated CAN transmit/receive pins (TXD6/RXD6) for direct connection to industry-standard transceivers.
What analog-to-digital converter resources are available on the R5F563TBADFH#V1?
The R5F563TBADFH#V1 integrates three independent ADC subsystems: two 12-bit S12ADB units (8 channels total, with three sample-and-hold circuits per unit) and one 10-bit ADA unit (20 channels). It supports simultaneous sampling across up to 7 channels and includes self-diagnostic, window comparator, and programmable gain amplifier functions.
How does the Digital Power Supply Controller (DPC) function in the R5F563TBADFH#V1?
The DPC in the R5F563TBADFH#V1 is a dedicated hardware accelerator for fixed-point compensator calculations in digital switched-mode power supplies. It accepts raw 10-bit ADC samples directly and executes robust control algorithms (e.g., PID, lead-lag) without CPU intervention - reducing latency and freeing the RX core for higher-level tasks like communication and supervision.
What package type and pin count does the R5F563TBADFH#V1 use?
The R5F563TBADFH#V1 is housed in a PLQP0112JA-A package: a 112-pin LQFP measuring 20 × 20 mm with 0.65 mm pitch and an exposed thermal pad. This package supports full peripheral access including CAN, USB, multiple SCI, dual ADC banks, and 81 GPIOs - optimized for high-density industrial power board layouts.
R5F563TBADFH#V1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 112-LQFP
- Series:
- RX600
- Packaging:
- Tray
- Product Status:
- Not For New Designs
- Programmable:
- Not Verified
- Core Processor:
- RX
- Core Size:
- 32-Bit Single-Core
- Speed:
- 100MHz
- Connectivity:
- CANbus, EBI/EMI, I2C, LINbus, SCI, SPI, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 69
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 24K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- A/D 12x10b, 8x12b; D/A 2x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F563TBADFH#V1 FAQ
1.How can I place an order for R5F563TBADFH#V1 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F563TBADFH#V1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F563TBADFH#V1 reliable?
The price and inventory of R5F563TBADFH#V1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F563TBADFH#V1 is usually 5 days.
3.What payment methods are accepted for R5F563TBADFH#V1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F563TBADFH#V1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F563TBADFH#V1?
R5F563TBADFH#V1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F563TBADFH#V1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F563TBADFH#V1?
For technical support, including R5F563TBADFH#V1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F563TBADFH#V1 requirements.
6.How does Aetrix verify that R5F563TBADFH#V1 is sourced from the original manufacturer or authorized distributors?
All R5F563TBADFH#V1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F563TBADFH#V1 meets industry standards.
7.What is the process for return or replacement of R5F563TBADFH#V1?
All R5F563TBADFH#V1 units undergo pre-shipment inspection (PSI). If there is an issue with R5F563TBADFH#V1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F563TBADFH#V1 part is unused and in its original packaging.
Return procedure for R5F563TBADFH#V1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F563TBADFH#V1 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

