Renesas R5F563TCDDFB#V0
- Part No.:
- R5F563TCDDFB#V0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
R5F563TCDDFB#V0.pdf
- Description:
- IC MCU 32BIT 384KB FLASH 144LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F563TCDDFB#V0 from Renesas Electronics is a 100-MHz 32-bit RX CPU-based microcontroller optimized for digital power supply control and motor drive applications. It integrates dual 12-bit ADCs (with three sample-and-hold circuits, programmable gain amplifiers, and window comparators), one 10-bit 20-channel ADC, two 10-bit DACs, USB 2.0 full-speed interface, and up to eight 16-bit GPT/MTU3 timer channels supporting three-phase complementary PWM with dead-time generation - deployed in industrial inverters and switched-mode power supplies.
For engineers reviewing the R5F563TCDDFB#V0 datasheet, R5F563TCDDFB#V0 pinout, R5F563TCDDFB#V0 application, or R5F563TCDDFB#V0 equivalent, key selection criteria include its 384 KB on-chip flash, 32 KB SRAM, CAN-free configuration, D-version (–40°C to +85°C) temperature grade, and PLQP0144KA-A 144-pin LQFP package with 81 GPIOs - critical for space-constrained, high-precision analog-digital control designs requiring IEC60730 compliance support.
Technical Context
The R5F563TCDDFB#V0 implements the RXv1 CPU core with IEEE-754 single-precision FPU, 165 DMIPS performance at 100 MHz, and Harvard architecture with 5-stage pipeline. Its memory subsystem includes 384 KB zero-wait-state flash, 32 KB SRAM, and 32 KB data flash rated for 100,000 erase/write cycles.
Dedicated hardware accelerates real-time control: Digital Power Supply Controller (DPC) unit performs fixed-point compensatory calculations using 10-bit ADC inputs; MTU3/GPT timers deliver sub-nanosecond PWM delay resolution (312 ps at 100 MHz); and dual S12ADB ADC units enable simultaneous sampling across seven channels with self-diagnostic functions for functional safety.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv1 32-bit CISC core with FPU, 100 MHz max operation, 165 DMIPS - enables real-time floating-point math for digital power control loops without software emulation overhead. |
| Memory | 384 KB on-chip flash (no wait states), 32 KB SRAM, 32 KB data flash (100k write cycles) - supports field firmware updates and parameter storage without external EEPROM. |
| Analog Peripherals | Two 12-bit S12ADB ADCs (4 ch × 2 units, 3× S/H, PGA, window comparator), one 10-bit ADA ADC (20 ch), two 10-bit DACs - enables multi-sensor feedback and precise actuator control in single-chip power stage designs. |
| PWM & Timing | MTU3 (8 ch) + GPT (8 ch) with 100 MHz clock, three-phase complementary PWM, dead-time insertion, and 312-ps PWM edge delay resolution - eliminates CPU burden in motor gate driving and resonant converter timing. |
| Communication | USB 2.0 full-speed (12 Mbps), 5× SCI (async/clock-sync/LIN), 2× I2C/SMBus, 2× RSPI, no CAN - targets human-interface and host communication in non-automotive industrial systems. |
| Package & Temp | PLQP0144KA-A 144-pin LQFP (20 × 20 mm, 0.5 mm pitch), –40°C to +85°C (D version) - provides high I/O count and thermal margin for convection-cooled power electronics enclosures. |
Pinout & Package
Package: PLQP0144KA-A - 144-pin LQFP, 20 × 20 mm body, 0.5 mm pitch, exposed thermal pad, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Dual 4.0–5.5 V domains: VCC/PLLVCC for digital core, AVCC0/AVCC for analog section - enables clean separation of noise-sensitive ADC/DAC paths from switching logic. |
| MTIOC0A–MTIOC7B | MTU3 waveform I/O | Eight independent PWM output pins per channel pair - supports full-bridge, three-phase inverter, and multi-phase interleaved topologies without external gate drivers. |
| AD00–AD07, AD10–AD19 | Analog input channels | 20 dedicated 10-bit ADC inputs + 8 dedicated 12-bit ADC inputs - allows concurrent voltage, current, temperature, and auxiliary sensing in SMPS feedback networks. |
| DA0 / DA1 | Digital-to-analog outputs | Two buffered 10-bit DACs with 0–VREF range - used for programmable reference generation, soft-start ramping, or analog biasing in hybrid control schemes. |
| USB_DP / USB_DM | USB 2.0 differential pair | Full-speed USB interface with integrated transceiver - enables direct PC connectivity for calibration, logging, and firmware updates without external PHY. |
Key Features
| Feature | Design Value |
|---|---|
| Digital Power Supply Controller (DPC) | Hardware-accelerated 16-bit fixed-point calculation engine using 10-bit ADC inputs - reduces closed-loop computation latency to <1 µs for digitally controlled DC-DC converters. |
| IEC60730 Safety Support | Oscillation-stop detection, CRC calculator, self-diagnostic A/D, IWDT with dedicated LOCO, frequency measurement circuit - satisfies Class B requirements without external monitoring ICs. |
| Simultaneous Multi-Channel Sampling | Three-unit synchronized sampling across 7 ADC channels - captures correlated voltage/current waveforms for instantaneous power calculation and harmonic analysis. |
| Programmable Gain Amplifier (PGA) | 11-step gain (2.0× to 13.333×) per 12-bit ADC unit - enables direct connection of low-level shunt resistor or thermistor signals without external op-amp stages. |
| High-Resolution PWM Delay | 312-ps edge timing control on GPT PWM outputs at 100 MHz - permits fine-tuning of dead times and phase shifts in resonant LLC or SiC-based converters. |
Applications
| Industrial Inverter Control | Digital AC-DC SMPS |
|---|---|
|
Use Scenario: Closed-loop vector control of 3-phase induction motors in HVAC compressors and pump drives. IC Role / Device Role / Timing Role: Main system controller executing FOC algorithm, generating six PWM gate signals via MTU3, sampling motor currents via dual S12ADB ADCs with simultaneous 3-channel capture. Use Value: Integrated DPC and 312-ps PWM delay enable adaptive dead-time compensation and real-time current loop bandwidth >20 kHz without external DSP. |
Use Scenario: Digitally regulated 1–3 kW telecom rectifier with active PFC and LLC resonant DC-DC stage. IC Role / Device Role / Timing Role: Primary-side digital controller acquiring AC line voltage, DC bus, and transformer current via 12-bit ADCs; computing PID and feedforward terms in DPC unit; driving half-bridge gates via GPT PWM with programmable dead time. Use Value: On-chip 10-bit 20-channel ADC monitors all critical nodes (input, bus, output, temps); eliminates need for external ADCs and isolators in cost-sensitive designs. |
| Uninterruptible Power Supply (UPS) | Motor Drive Reference Design Platform |
|
Use Scenario: Bidirectional 3-phase UPS with battery charging, grid synchronization, and seamless transfer. IC Role / Device Role / Timing Role: System MCU managing AC/DC and DC/AC conversion stages, executing grid sync PLL, sampling 12+ analog signals (voltages, currents, temps), and communicating via USB/SCI to HMI. Use Value: Dual 12-bit ADCs with window comparators detect overvoltage/overcurrent faults within 1 µs; CRC and IWDT ensure runtime integrity per IEC62040-4. |
Use Scenario: Eval platform for field-oriented control of BLDC/PMSM motors using sensorless or Hall-based commutation. IC Role / Device Role / Timing Role: Reference controller implementing open/closed-loop speed/torque control, generating space-vector PWM, reading encoder/Hall inputs, and providing USB-based tuning interface. Use Value: 81 GPIOs and 144-pin LQFP allow direct connection to gate drivers, current sensors, and debug interfaces - accelerates validation of motor algorithms without adapter boards. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F563TEADFB#V0 | Same package and pinout; adds CAN 2.0B module (32 mailboxes), increases flash to 512 KB and RAM to 48 KB. | Required where CAN bus integration is needed for distributed motor control or industrial networking (e.g., PLC backplane). | Select R5F563TEADFB#V0 if CAN communication is mandatory; otherwise R5F563TCDDFB#V0 offers identical analog/peripheral capability at lower cost and code footprint. |
| R5F563TCDDFA#V0 | Same flash/RAM and feature set; uses PLQP0120KA-A 120-pin LQFP (16 × 16 mm, 0.5 mm pitch), reducing GPIO count to 72 and removing external bus interface. | Suitable for space-constrained designs where fewer I/Os and no external memory expansion are acceptable. | Choose R5F563TCDDFA#V0 for compact form factor and reduced PCB area; R5F563TCDDFB#V0 retains full 81-GPIO capability and CS-area external bus support. |
Compared with R5F563TEADFB#V0, R5F563TCDDFB#V0 trades CAN and memory capacity for cost efficiency in standalone power control; versus R5F563TCDDFA#V0, it delivers higher I/O density and external bus access - making it optimal for complex, I/O-intensive digital power systems without CAN requirements.
Availability
R5F563TCDDFB#V0 is available at Aetrix Electronics and suitable for industrial inverters, digital AC-DC SMPS, and uninterruptible power supplies requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for production programs.
Supply support for R5F563TCDDFB#V0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for industrial, automotive, and infrastructure markets.
The RX63T Group - including R5F563TCDDFB#V0 - was designed specifically for digital power supply control and motor drive applications, integrating high-resolution PWM, multi-channel synchronized ADCs, and safety features aligned with IEC60730 Class B.
FAQ
What is the maximum operating frequency and CPU performance of the R5F563TCDDFB#V0?
The R5F563TCDDFB#V0 operates at a maximum frequency of 100 MHz and delivers 165 DMIPS performance using its 32-bit RXv1 CPU core with integrated IEEE-754 single-precision floating-point unit. This enables deterministic execution of complex digital power control algorithms and real-time motor control loops without external co-processors.
Does the R5F563TCDDFB#V0 include CAN interface functionality?
No, the R5F563TCDDFB#V0 does not include the CAN module. It belongs to the "DD" variant family explicitly defined in the Renesas RX63T datasheet as CAN-module-not-included. For CAN-enabled versions, consider R5F563TEADFB#V0 or R5F563TCADFB#V0 - both share the same PLQP0144KA-A package and pinout.
What analog peripherals are integrated into the R5F563TCDDFB#V0?
The R5F563TCDDFB#V0 integrates two independent 12-bit S12ADB ADC units (4 channels × 2, with three sample-and-hold circuits, programmable gain amplifiers, and window comparators), one 10-bit ADA ADC (20 channels), and two 10-bit DACs (DA0/DA1). These support simultaneous multi-sensor acquisition and precision analog output for closed-loop power and motor control.
What package type and pin count does the R5F563TCDDFB#V0 use?
The R5F563TCDDFB#V0 uses the PLQP0144KA-A package: a 144-pin LQFP with 20 × 20 mm body size, 0.5 mm pitch, and exposed thermal pad. It provides 81 general-purpose I/O pins, including 27 open-drain outputs and 29 dedicated input pins - optimized for high-density industrial control PCB layouts.
How does the R5F563TCDDFB#V0 support IEC60730 compliance for functional safety?
The R5F563TCDDFB#V0 supports IEC60730 Class B compliance through integrated hardware features: oscillation-stop detection, CRC calculator with three polynomials, self-diagnostic A/D converter, independent watchdog timer (IWDT) with dedicated 125-kHz LOCO, and clock frequency accuracy measurement circuit - enabling runtime diagnostics without external components.
R5F563TCDDFB#V0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 144-LQFP
- Series:
- RX600
- Packaging:
- Tray
- Product Status:
- Not For New Designs
- Programmable:
- Not Verified
- Core Processor:
- RX
- Core Size:
- 32-Bit Single-Core
- Speed:
- 100MHz
- Connectivity:
- EBI/EMI, I2C, LINbus, SCI, SPI
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 81
- Program Memory Size:
- 384KB (384K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 32K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- A/D 20x10b, 8x12b; D/A 2x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F563TCDDFB#V0 FAQ
1.How can I place an order for R5F563TCDDFB#V0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F563TCDDFB#V0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F563TCDDFB#V0 reliable?
The price and inventory of R5F563TCDDFB#V0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F563TCDDFB#V0 is usually 5 days.
3.What payment methods are accepted for R5F563TCDDFB#V0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F563TCDDFB#V0 transactions.
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R5F563TCDDFB#V0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F563TCDDFB#V0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F563TCDDFB#V0?
For technical support, including R5F563TCDDFB#V0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F563TCDDFB#V0 requirements.
6.How does Aetrix verify that R5F563TCDDFB#V0 is sourced from the original manufacturer or authorized distributors?
All R5F563TCDDFB#V0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F563TCDDFB#V0 meets industry standards.
7.What is the process for return or replacement of R5F563TCDDFB#V0?
All R5F563TCDDFB#V0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F563TCDDFB#V0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F563TCDDFB#V0 part is unused and in its original packaging.
Return procedure for R5F563TCDDFB#V0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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