Renesas R5F563TCDDFP#V0
- Part No.:
- R5F563TCDDFP#V0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F563TCDDFP#V0.pdf
- Description:
- IC MCU 32BIT 384KB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F563TCDDFP#V0 from Renesas Electronics is a 100-MHz 32-bit RX MCU with integrated FPU, 384 KB on-chip flash, 32 KB SRAM, dual 12-bit ADCs (with programmable gain amplifiers and window comparators), one 10-bit 20-channel ADC, two 10-bit DACs, and CAN-free peripheral set optimized for digital power supply control in industrial inverters and motor drives.
For engineers reviewing the R5F563TCDDFP#V0 datasheet, R5F563TCDDFP#V0 pinout, R5F563TCDDFP#V0 application, or R5F563TCDDFP#V0 equivalent, this device delivers deterministic PWM timing (312-ps resolution), IEC60730-compliant self-diagnostic features, and dedicated digital power supply controller (DPC) hardware for real-time compensator calculations - critical for high-reliability SMPS and servo amplifier designs.
Technical Context
The R5F563TCDDFP#V0 implements the RXv1 CPU core with IEEE-754 single-precision FPU, 165 DMIPS @ 100 MHz, and memory protection unit (MPU). It supports little-endian data arrangement and executes instructions in one system clock cycle at maximum frequency.
Its timing subsystem integrates MTU3 (8-channel 16-bit timer with three-phase complementary PWM) and GPT (8-channel 16-bit general PWM timer with programmable dead-time insertion and 312-ps PWM delay resolution), both synchronized to PCLKA up to 100 MHz. The DPC unit performs fixed-point compensator calculations using inputs from the 10-bit ADC, enabling closed-loop digital control without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RXv1 32-bit CISC Harvard CPU with 5-stage pipeline, 165 DMIPS @ 100 MHz |
| Max Clock | 100 MHz system clock (ICLK); PCLKA = 100 MHz for MTU3/GPT timers |
| Memory | 384 KB on-chip flash (no wait states), 32 KB SRAM, 32 KB data flash (100k erase cycles) |
| ADC | Dual 12-bit S12ADB (4 ch × 2 units, simultaneous 7-ch sampling, PGA, window comparator); one 10-bit ADA (20 ch, 0.5 µs/ch @ 100 MHz ADCLK) |
| DAC | Two 10-bit DAa channels, output range 0 V to VREF |
| PWM Timing | GPT supports 312-ps PWM edge delay resolution @ 100 MHz ICLK; MTU3 provides non-overlapping three-phase complementary outputs with automatic dead-time insertion |
| Digital Power Control | Dedicated DPC unit performs 16-bit fixed-point compensator calculations using 10-bit ADC results - enables real-time digital SMPS control without CPU load |
Pinout & Package
Package: PLQP0100KB-A, 100-pin LQFP (14 × 14 mm, 0.5 mm pitch), RoHS-compliant, moisture sensitivity level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, VSS | Power supply and ground | Separate analog/digital domains: AVCC0/AVCC = 4.0–5.5 V; VCC = 4.0–5.5 V; PLLVCC = 4.0–5.5 V |
| MTIOC0A–MTIOC7B | MTU3 waveform I/O | Eight 16-bit timer channels support three-phase complementary PWM (2 ch), single-phase complementary PWM (4 ch), and phase-counting mode |
| GTIOCA0–GTIOCB3 | GPT waveform I/O | Eight GPT channels provide 4 single-phase complementary or 3 three-phase + 1 single-phase complementary outputs with programmable dead time |
| AN000–AN019 | Analog input | 20-channel 10-bit ADC (ADA) inputs; AN000–AN007 also serve as inputs for dual 12-bit S12ADB units |
| DA0, DA1 | DAC output | Two independent 10-bit voltage-output DACs referenced to VREF (0 V to VREF) |
Key Features
| Feature | Design Value |
|---|---|
| Digital Power Supply Controller (DPC) | Hardware-accelerated 16-bit fixed-point calculation engine for PID/compensator algorithms using 10-bit ADC inputs - reduces CPU overhead in SMPS feedback loops |
| IEC60730 Compliance Support | Integrated oscillation-stop detection, CRC calculator, IWDT with dedicated LOCO, A/D self-diagnostic (VREFL0/VREFH0×1/2/VREFH0 generation), and frequency measurement circuit |
| Precision PWM Timing | GPT achieves 312-ps PWM edge delay resolution at 100 MHz ICLK - enables fine-grained dead-time tuning for SiC/GaN gate drivers |
| Simultaneous Multi-ADC Sampling | Three ADC units (two S12ADB + one ADA) allow synchronized sampling across up to 7 channels - essential for vector-controlled motor current sensing |
| Programmable Gain Amplifier | 11-step PGA (2.0× to 13.333×) per S12ADB unit - supports direct low-level current shunt signal conditioning without external op-amps |
Applications
| Industrial Inverter Control | Digital AC Servo Drive |
|---|---|
|
Use Scenario: Closed-loop field-oriented control (FOC) of 3-phase induction or PMSM motors in HVAC compressors and CNC spindles. IC Role / Device Role / Timing Role: Primary controller executing FOC algorithm, generating synchronized three-phase PWM via MTU3, sampling motor phase currents via simultaneous 7-channel ADC, and calculating real-time compensation via DPC unit. Use Value: Eliminates need for external DSP or FPGA by integrating high-resolution PWM, multi-channel synchronized ADC, and hardware DPC - reduces BOM cost and PCB area. |
Use Scenario: High-bandwidth position/velocity loop control in robotic joint actuators with integrated resolver or encoder feedback. IC Role / Device Role / Timing Role: Real-time execution of position loop PID, velocity loop filtering, and current loop PWM generation; uses GPT's 312-ps delay resolution to minimize gate driver propagation skew in SiC half-bridges. Use Value: Achieves <1 µs current loop latency using on-chip DPC and synchronized ADC sampling - meets ISO 13849 PLd functional safety timing requirements. |
| Switch-Mode Power Supply (SMPS) | Uninterruptible Power Supply (UPS) |
|
Use Scenario: Digital control of isolated LLC resonant converters and active clamp forward topologies in telecom rectifiers and server PSUs. IC Role / Device Role / Timing Role: DPC unit computes compensator output from 10-bit ADC voltage/current samples; MTU3 generates precise variable-frequency resonant gate drive; IWDT ensures fail-safe shutdown. Use Value: Hardware DPC enables 100-kHz+ control loop bandwidth without CPU scheduling jitter - improves transient response and efficiency over analog controllers. |
Use Scenario: Dual-conversion online UPS managing battery charging, inverter output regulation, and bypass switching under grid disturbances. IC Role / Device Role / Timing Role: Coordinated control of AC-DC rectifier (via ADC-sampled line voltage) and DC-AC inverter (via MTU3 PWM), with IEC60730 self-test routines executed during idle cycles. Use Value: Integrated CRC, oscillator stop detection, and A/D self-diagnostic meet UL 1778 Class A certification requirements for medical-grade UPS systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F563TEADFP#V0 | Same package and pinout; includes CAN module (32 mailboxes), 512 KB flash, 48 KB RAM | Required where CAN bus communication is needed for distributed motor control networks or industrial PLC interconnect | Select when CAN physical layer interface and protocol stack support are mandatory; otherwise R5F563TCDDFP#V0 offers lower cost and identical power/performance |
| R5F563TBDDFP#V0 | Same package and pinout; reduced memory (256 KB flash, 24 KB RAM), no DPC unit, no S12ADB programmable gain amplifier | Suitable for cost-sensitive, lower-complexity SMPS or fan controllers without multi-axis motor control or high-precision current sensing | Choose for simpler digital power applications where DPC acceleration and dual 12-bit ADCs are unnecessary - saves ~15% BOM cost |
Compared with R5F563TEADFP#V0 and R5F563TBDDFP#V0, the R5F563TCDDFP#V0 uniquely balances 384 KB flash, full DPC capability, dual S12ADB units with PGA, and 100-MHz PWM timing - making it the optimal choice for mid-tier industrial motor drives and digital SMPS requiring IEC60730 compliance without CAN overhead.
Availability
R5F563TCDDFP#V0 is available at Aetrix Electronics and suitable for industrial motor drives, digital switch-mode power supplies, and uninterruptible power systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F563TCDDFP#V0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power devices for automotive, industrial, and IoT applications.
The RX63T Group - including the R5F563TCDDFP#V0 - was designed specifically for digital power conversion and motor control, integrating hardware accelerators (DPC), precision analog (dual 12-bit ADCs with PGA), and deterministic real-time PWM to replace discrete analog controllers and DSPs.
FAQ
What is the operating temperature range for the R5F563TCDDFP#V0?
The R5F563TCDDFP#V0 is rated for industrial operation from –40°C to +85°C (D version). It does not support the extended –40°C to +105°C (G version) range. Thermal derating guidelines for operation near +85°C are provided in Renesas Application Note R01AN1779EU0100.
Does the R5F563TCDDFP#V0 include a CAN interface?
No, the R5F563TCDDFP#V0 explicitly excludes the CAN module, as indicated by the "DD" in its part number suffix (per Table 1.3 of R01DS0087EJ0220). For CAN-enabled variants, consider the R5F563TEADFP#V0 or R5F563TCADFP#V0, which include 32-mailbox ISO11898-1 compliant CAN controllers.
What ADC resources are available on the R5F563TCDDFP#V0?
The R5F563TCDDFP#V0 integrates two 12-bit S12ADB units (4 channels × 2, with simultaneous 7-channel sampling, programmable gain amplifier, and window comparator) and one 10-bit ADA unit (20 channels, 0.5 µs conversion time at 100 MHz ADCLK). All ADCs support software, timer-triggered, and external-start conversion modes.
How does the Digital Power Supply Controller (DPC) function in the R5F563TCDDFP#V0?
The DPC in the R5F563TCDDFP#V0 is a dedicated hardware accelerator that performs 16-bit fixed-point compensator calculations (e.g., PID, lead-lag) using real-time inputs from the 10-bit ADC. It operates autonomously without CPU intervention, enabling deterministic sub-microsecond control loop updates for digital SMPS applications.
What debug interfaces does the R5F563TCDDFP#V0 support?
The R5F563TCDDFP#V0 supports both JTAG and Renesas FINE (two-wire) debugging interfaces. It is fully compatible with the E1 and E20 emulators, enabling real-time trace, breakpoint setting, and memory inspection during development and validation of motor control or power conversion firmware.
R5F563TCDDFP#V0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX600
- Packaging:
- Tray
- Product Status:
- Not For New Designs
- Programmable:
- Not Verified
- Core Processor:
- RX
- Core Size:
- 32-Bit Single-Core
- Speed:
- 100MHz
- Connectivity:
- EBI/EMI, I2C, LINbus, SCI, SPI
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 57
- Program Memory Size:
- 384KB (384K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 32K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- A/D 12x10b, 8x12b; D/A 2x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F563TCDDFP#V0 FAQ
1.How can I place an order for R5F563TCDDFP#V0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F563TCDDFP#V0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F563TCDDFP#V0 reliable?
The price and inventory of R5F563TCDDFP#V0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F563TCDDFP#V0 is usually 5 days.
3.What payment methods are accepted for R5F563TCDDFP#V0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F563TCDDFP#V0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F563TCDDFP#V0?
R5F563TCDDFP#V0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F563TCDDFP#V0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F563TCDDFP#V0?
For technical support, including R5F563TCDDFP#V0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F563TCDDFP#V0 requirements.
6.How does Aetrix verify that R5F563TCDDFP#V0 is sourced from the original manufacturer or authorized distributors?
All R5F563TCDDFP#V0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F563TCDDFP#V0 meets industry standards.
7.What is the process for return or replacement of R5F563TCDDFP#V0?
All R5F563TCDDFP#V0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F563TCDDFP#V0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F563TCDDFP#V0 part is unused and in its original packaging.
Return procedure for R5F563TCDDFP#V0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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