Renesas R5F564MFGDFP#31
- Part No.:
- R5F564MFGDFP#31
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F564MFGDFP#31.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 100LFQFP
- Quantity:
- Payment:

- Shipping:

Inventory:3,920
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Product details
Overview
R5F564MFGDFP#31 from Renesas is a 120-MHz 32-bit RXv2 microcontroller with integrated FPU, 4 MB code flash, 512 KB SRAM, IEEE 1588-compliant dual Ethernet MAC, full-speed USB 2.0 with battery charging, and CAN v2.0B - deployed in industrial gateways requiring deterministic real-time control, secure connectivity, and multi-protocol edge processing.
For engineers reviewing the R5F564MFGDFP#31 datasheet, R5F564MFGDFP#31 pinout, R5F564MFGDFP#31 application, or R5F564MFGDFP#31 equivalent, key selection criteria include dual Ethernet + PTP timestamping capability, on-chip AES/SHA encryption, 127 GPIO with 5-V tolerance, 12-bit dual A/D with self-diagnostic, and support for IEC 60730 Class B functional safety compliance.
Technical Context
The R5F564MFGDFP#31 implements the RXv2 CPU core with Harvard architecture, 5-stage pipeline, and variable-length instructions - delivering 240 DMIPS at 120 MHz while supporting IEEE-754 single-precision floating-point operations and two MAC units. Its clock system integrates PLL, HOCO (16/18/20 MHz), LOCO (240 kHz), and IWDT-dedicated oscillator, enabling independent domain clocks (ICLK up to 120 MHz, PCLKA up to 120 MHz, PCLKB up to 60 MHz).
Peripheral subsystems are tightly coupled via Event Link Controller (ELC) for zero-CPU-intervention triggering: MTU3/GPT timers generate A/D start triggers, SCIg/SCIh support LIN and smart-card modes, and ETHERC+EPTPC+EDMACa form a hardware-accelerated time-sensitive networking (TSN)-ready stack with cut-through frame transfer and Magic Packet wake-on-LAN.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC with 5-stage pipeline, 240 DMIPS @ 120 MHz - enables real-time deterministic execution of complex control algorithms without external co-processors. |
| Memory | 4 MB code flash (no wait states @ 120 MHz), 64 KB data flash (100k erase cycles), 512 KB SRAM (no wait), 32 KB ECC RAM - supports robust firmware updates, data logging, and fault-tolerant runtime operation. |
| Connectivity | Dual IEEE 1588-compliant Ethernet MAC (MII/RMII), full-speed USB 2.0 with battery charging (USBA), 3× CAN v2.0B (32 mailboxes/channel), 9× SCIg/h (LIN/Smart Card), 4× SCIFA (16-byte FIFO) - enables converged industrial networking with time synchronization and protocol bridging. |
| Analog Peripherals | Two 12-bit S12ADC units (8 + 21 channels), conversion time 0.48 µs/ch; 2× R12DA (12-bit); on-die temperature sensor (±1°C) - provides high-resolution sensor acquisition and closed-loop analog control without external ADC/DAC. |
| Security & Safety | AES-128/192/256, DES/T-DES, SHA-1/224/256/HMAC, MPU, register write protection, oscillation-stop detection, CRC engine - meets IEC 60730 Class B requirements for self-test and secure boot. |
| Package & Environment | LFBGA-176 (13 × 13 mm, 0.8-mm pitch), –40°C to +105°C (G-version), 2.7–3.6 V supply - qualified for extended-temperature industrial and transportation applications with high I/O density and thermal reliability. |
Pinout & Package
Package: PLBG0176GA-A (13 × 13 mm, 0.8-mm pitch, 176-pin LFBGA). Pinout validated per Renesas R01DS0173EJ0120 Rev.1.20, pages 42–110 (pin function mapping for 176-pin variant).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Power supply inputs | Separate digital/analog domains enable noise isolation; AVCC1 powers A/D and D/A circuits for precision analog performance. |
| XTAL / EXTAL | Main crystal oscillator interface | Supports 8–24 MHz external crystal for precise system timing and IEEE 1588 PTP synchronization stability. |
| ETH_MDC / ETH_MDIO | MDIO management interface | Enables software configuration of external PHY registers without dedicated SPI/I2C bus overhead. |
| ETH_TXD0–3 / ETH_RXD0–3 | Ethernet physical layer data | Direct MII interface pins - no external level-shifting required when paired with standard 3.3-V PHYs. |
| USB_VBUS / USB_DP / USB_DM | USB 2.0 FS transceiver interface | Integrated USBA module with 8.5 KB buffer supports battery charging detection (BC1.2) and OTG role switching in embedded host/device designs. |
| CAN0_TX / CAN0_RX | Channel 0 CAN differential pair | Compliant with ISO 11898-1; supports bit rates up to 1 Mbps with built-in loopback mode for automated CAN FD readiness testing. |
| AD00–AD07 / AD10–AD20 | Analog input channels | Unit 0 (8 ch) and Unit 1 (21 ch) share common reference (AVSS1/AVCC1); unit-specific sample-and-hold enables simultaneous sampling across mixed-signal control loops. |
Key Features
| Feature | Design Value |
|---|---|
| IEEE 1588 Precision Time Protocol Engine | Hardware-accelerated timestamping (sub-100 ns resolution) synchronized to ETHERC frames - eliminates software jitter in time-critical automation and power substation applications. |
| Event Link Controller (ELC) | 119 internal event sources routed without CPU intervention - e.g., MTU3 output compare triggers A/D conversion, enabling cycle-accurate sensor sampling aligned to PWM edges. |
| IEC 60730 Safety Support | On-chip oscillation-stop detection, CRC calculator, A/D self-diagnostic, register lock bits - reduces external safety monitoring components and simplifies Class B certification evidence generation. |
| Secure Boot & Trusted Memory | TM function blocks read access to flash blocks 8–9; AES engine supports encrypted firmware decryption in ROM bootloader - prevents unauthorized firmware extraction or tampering. |
| Multi-Domain Clock Architecture | Independent ICLK (120 MHz), PCLKA (120 MHz), PCLKB (60 MHz), PCLKC/D (60 MHz) domains - allows peripherals like Ethernet (PCLKA) and A/D (PCLKC/D) to operate at optimal frequencies without CPU clock throttling. |
Applications
| Industrial Ethernet Gateway | Smart Energy Metering Hub |
|---|---|
Use Scenario: Aggregating Modbus TCP, CANopen, and BACnet MS/TP traffic into time-synchronized IEEE 1588 PTP-enabled Ethernet backbone for SCADA systems. IC Role / Device Role / Timing Role: Primary application processor executing protocol stacks, managing dual Ethernet interfaces, and performing real-time PTP timestamp correction using EPTPC hardware. Use Value: Eliminates need for external FPGA or timing coprocessor; deterministic 120-MHz RXv2 core ensures <50 µs worst-case interrupt latency for time-critical packet handling. | Use Scenario: Multi-tariff electricity meter with harmonic analysis, tamper detection, and secure remote firmware update over cellular/LTE backhaul. IC Role / Device Role / Timing Role: System-on-chip controller integrating metrology A/D sampling, AES-encrypted OTA updates, RTC calendar, and SDHI-based secure log storage. Use Value: On-chip 12-bit dual A/D with self-diagnostic meets IEC 62053-22 Class 0.5S accuracy; trusted memory prevents rollback attacks during field updates. |
| Automotive Body Control Module | Programmable Logic Controller (PLC) I/O Base |
Use Scenario: Central body controller managing door locks, lighting, HVAC, and LIN-connected sensors in EV platforms with extended temperature range requirements. IC Role / Device Role / Timing Role: Real-time MCU executing ASAM MCD-2 MC-compliant diagnostics, LIN protocol stack (via SCIh), and PWM-driven LED dimming with dead-time compensation. Use Value: GPTA's complementary PWM with automatic dead-time insertion ensures safe MOSFET gate driving; -40°C to +105°C rating supports under-hood deployment. | Use Scenario: DIN-rail mounted PLC base unit with 16-channel isolated digital I/O, EtherCAT slave interface, and local HMI rendering. IC Role / Device Role / Timing Role: Deterministic motion controller running IEC 61131-3 logic with hardware-synced EtherCAT distributed clock (DC) using ETHERC+EDMACa+ELC chain. Use Value: Dual Ethernet MAC + EPTPC enables precise DC synchronization (<1 µs jitter); 127 GPIO with 5-V tolerance simplifies interfacing to legacy 24-V industrial sensors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEDFP#30 | RX65N Group; identical 176-pin LFBGA package, same 120 MHz CPU, but adds TrustZone-based secure boot and 16 MB flash - no IEEE 1588 PTP hardware. | Preferred for cloud-connected IoT edge nodes requiring Arm TrustZone isolation; unsuitable where sub-microsecond PTP timestamping is mandatory. | Select R5F565NEDFP#30 only if security partitioning outweighs deterministic time synchronization needs. |
| STM32H743ZIT6 | Cortex-M7 @ 480 MHz; single Ethernet MAC (no IEEE 1588), no integrated USB battery charging PHY, 2 MB flash, 1 MB RAM - requires external PHY and level shifters for industrial I/O. | Better suited for high-throughput motor control with dual-core asymmetry; lacks native LIN/SCIF and fails IEC 60730 diagnostic coverage out-of-box. | Choose STM32H743ZIT6 when raw compute throughput > real-time determinism, and external component BOM cost is acceptable. |
Compared with R5F564MFGDFP#31, R5F565NEDFP#30 trades PTP hardware for TrustZone security, while STM32H743ZIT6 offers higher clock speed but requires external components to match R5F564MFGDFP#31's integrated industrial connectivity and safety features.
Availability
R5F564MFGDFP#31 is available at Aetrix Electronics and suitable for industrial gateways, smart energy meters, automotive body controllers, and programmable logic controller I/O bases requiring stable component supply across extended product lifecycles.
Supply support for R5F564MFGDFP#31 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a Japanese semiconductor manufacturer specializing in microcontrollers, analog, power management, and SoC solutions for industrial, automotive, and enterprise applications.
The RX64M Group targets high-performance industrial automation and networked embedded systems - designed to replace legacy 16-bit MCUs with integrated Ethernet, USB, CAN, and functional safety features in a single chip.
FAQ
What is the maximum operating frequency and DMIPS rating of the R5F564MFGDFP#31?
The R5F564MFGDFP#31 operates at a maximum frequency of 120 MHz and delivers 240 DMIPS performance. This is achieved by the RXv2 CPU core with 5-stage pipeline, single-cycle 32-bit multiply, and dual MAC units - verified in Renesas R01DS0173EJ0120 Rev.1.20 Section 1.1. The DMIPS figure reflects Dhrystone 2.1 benchmark results measured at 120 MHz with cache enabled.
Does the R5F564MFGDFP#31 support IEEE 1588 Precision Time Protocol hardware acceleration?
Yes, the R5F564MFGDFP#31 includes a dedicated PTP controller (EPTPC) linked directly to its dual Ethernet MAC (ETHERC) modules. It provides hardware timestamping of ingress/egress Ethernet frames with sub-100 ns resolution, enabling transparent clock and boundary clock implementations per IEEE 1588-2008 - confirmed in Section 1.1 and Figure 1.3 of R01DS0173EJ0120 Rev.1.20.
How many analog-to-digital converter channels does the R5F564MFGDFP#31 provide, and what is their resolution?
The R5F564MFGDFP#31 integrates two independent 12-bit A/D converters: S12ADC Unit 0 with 8 channels and Unit 1 with 21 channels. Resolution is configurable at 8-, 10-, or 12-bit per channel, with minimum conversion times of 0.42 µs (8-bit), 0.45 µs (10-bit), and 0.48 µs (12-bit) - detailed in Table 1.1 (page 9) and Section 21.3 of R01DS0173EJ0120 Rev.1.20.
What package type and pin count does the R5F564MFGDFP#31 use?
The R5F564MFGDFP#31 uses the PLBG0176GA-A package: a 176-pin Low-Profile Fine-Pitch Ball Grid Array measuring 13 mm × 13 mm with 0.8-mm ball pitch. This matches the "176-pin LFBGA" variant defined in Table 1.2 of R01DS0173EJ0120 Rev.1.20 and supports all peripheral functions including dual Ethernet, USB, and 127 GPIO.
Is the R5F564MFGDFP#31 qualified for extended temperature operation?
Yes, the R5F564MFGDFP#31 is rated for –40°C to +105°C operation (G-version), as specified in Section 1.1 "Operating temp. range" of R01DS0173EJ0120 Rev.1.20. This qualification covers full functionality of CPU, flash, SRAM, Ethernet, USB, CAN, and A/D peripherals across the entire range - making it suitable for under-hood automotive and outdoor industrial deployments.
R5F564MFGDFP#31 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX600
- Packaging:
- Tray
- Product Status:
- Discontinued at Digi-Key
- Programmable:
- Not Verified
- Core Processor:
- RXv2
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, SCI, SPI, SSI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 78
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 64K x 8
- RAM Size:
- 552K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 22x12b; D/A 1x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F564MFGDFP#31 FAQ
1.How can I place an order for R5F564MFGDFP#31 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F564MFGDFP#31 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F564MFGDFP#31 reliable?
The price and inventory of R5F564MFGDFP#31 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F564MFGDFP#31 is usually 5 days.
3.What payment methods are accepted for R5F564MFGDFP#31?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F564MFGDFP#31 transactions.
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4.How is shipping managed for R5F564MFGDFP#31?
R5F564MFGDFP#31 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F564MFGDFP#31 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F564MFGDFP#31?
For technical support, including R5F564MFGDFP#31 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F564MFGDFP#31 requirements.
6.How does Aetrix verify that R5F564MFGDFP#31 is sourced from the original manufacturer or authorized distributors?
All R5F564MFGDFP#31 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F564MFGDFP#31 meets industry standards.
7.What is the process for return or replacement of R5F564MFGDFP#31?
All R5F564MFGDFP#31 units undergo pre-shipment inspection (PSI). If there is an issue with R5F564MFGDFP#31, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F564MFGDFP#31 part is unused and in its original packaging.
Return procedure for R5F564MFGDFP#31:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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