Renesas R5F564MFHGFB#V1
- Part No.:
- R5F564MFHGFB#V1
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
R5F564MFHGFB#V1.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 144LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,077
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F564MFHGFB#V1 from Renesas is a 120-MHz 32-bit RXv2 microcontroller with integrated FPU, 4-MB code flash, 512-KB SRAM, IEEE 1588-compliant dual Ethernet MAC, full-speed USB 2.0 with battery charging, CAN (3 channels), and 12-bit A/D (29 total channels). It targets industrial automation controllers requiring deterministic real-time I/O, secure firmware updates, and multi-protocol connectivity.
For engineers reviewing the R5F564MFHGFB#V1 datasheet, R5F564MFHGFB#V1 pinout, R5F564MFHGFB#V1 application, or R5F564MFHGFB#V1 equivalent, key selection criteria include its 177-pin TFLGA package, dual Ethernet + USB + CAN coexistence, 120-MHz deterministic timing, on-chip AES/SHA crypto acceleration, and IEC60730 safety support for Class B compliance.
Technical Context
The R5F564MFHGFB#V1 implements the RXv2 CPU core with 240 DMIPS at 120 MHz, single-precision IEEE-754 FPU, and dual multiply-accumulate units. Its memory subsystem includes 4-MB zero-wait-state flash, 512-KB SRAM, 64-KB data flash (100k erase cycles), and 32-KB ECC-protected RAM.
Peripheral architecture features dual ETHERC modules with EPTPC (IEEE 1588 PTP), USBA with 8.5-KB buffer and battery charging support, three ISO11898-1 CAN controllers (32 mailboxes each), and two independent 12-bit S12ADC units (8 + 21 channels) with self-diagnostic and disconnection detection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit, 120 MHz max, 240 DMIPS, IEEE-754 FPU, 5-stage pipeline |
| Memory | 4 MB code flash (no wait states), 512 KB SRAM, 64 KB data flash (100k cycles) |
| Connectivity | Dual IEEE 1588 Ethernet MAC, USB 2.0 FS with battery charging, 3× CAN, 9× SCI, 4× SCIFA, 2× RIIC |
| Analog | Two 12-bit ADCs (8 + 21 channels), 2× 12-bit DACs, on-chip temperature sensor (±1°C) |
| Security & Safety | AES/DES/SHA crypto engine, MPU, CRC, IWDTa, oscillation-stop detection, A/D self-diagnostic |
| Package & Temp | 177-pin TFLGA (8 mm × 8 mm, 0.5-mm pitch), –40°C to +105°C (G-version) |
| Power | 2.7–3.6 V supply, 0.3 mA/MHz typical active current, four low-power modes |
Pinout & Package
Package: 177-pin TFLGA (PTLG0177KA-A), 8 mm × 8 mm, 0.5-mm pitch, 0.75-mm height, lead-free and RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Core & analog power supply | 2.7–3.6 V main supply; separate analog domains enable noise isolation for ADC/DAC |
| VBATT | Battery backup input | Supplies RTC during main power loss; enables timekeeping in deep software standby |
| XTAL / EXTAL | Main crystal oscillator interface | Supports 8–24 MHz external crystal; enables precise 120-MHz system clock via PLL |
| ETH_MDC / ETH_MDIO | MDIO management interface | Configures PHY registers for dual Ethernet ports; required for IEEE 1588 timestamp calibration |
| USBA_VBUS / USBA_ID | USB OTG detection pins | Detect host/device role and VBUS presence; enable battery charging negotiation in USBA module |
| CAN0_TX / CAN0_RX | Channel 0 CAN transceiver I/O | Direct connection to ISO11898-1 compliant transceiver; supports 1 Mbps with 32 mailbox buffers |
Key Features
| Feature | Design Value |
|---|---|
| Dual IEEE 1588 Ethernet MAC | Enables precise time-synchronized control across distributed industrial nodes without external PTP hardware |
| USB 2.0 FS with battery charging | Eliminates need for external charging IC; supports BC1.2 detection and D+/D− enumeration in host/function mode |
| On-chip AES/SHA crypto engine | Accelerates firmware signature verification and secure boot in <10 ms; avoids software-only latency bottlenecks |
| IEC60730 Class B support | Integrated oscillation-stop detection, CRC unit, IWDTa windowing, and A/D self-test reduce certification effort |
| Event Link Controller (ELC) | Hardware-triggered peripheral chaining (e.g., TPU → ADC start → DMA transfer) eliminates CPU ISR overhead |
Applications
| Industrial PLC Controller | Smart Energy Gateway |
|---|---|
|
Use Scenario: Real-time motion control and fieldbus gateway in modular PLC rack with EtherCAT master and Modbus TCP slave. IC Role / Device Role / Timing Role: Central deterministic controller executing cyclic tasks at 1-ms intervals; synchronizes servo drives via IEEE 1588 PTP timestamps. Use Value: Dual Ethernet + CAN + USB enables concurrent protocol bridging; 120-MHz RXv2 core ensures sub-100-µs interrupt latency for motion loop closure. |
Use Scenario: Secure edge gateway aggregating smart meter data (DLMS/COSEM over IPv6) and managing local DERs via CANopen. IC Role / Device Role / Timing Role: Trusted execution environment hosting TLS 1.2 stack, secure bootloader, and time-synced data logging with RTC battery backup. Use Value: On-chip AES/SHA accelerates encrypted MQTT publish; 64-KB data flash stores firmware images with atomic update rollback. |
| Factory Automation HMI | Medical Infusion Pump Controller |
|
Use Scenario: Touch-enabled HMI panel with Ethernet backhaul, USB service port, and CAN-connected I/O modules. IC Role / Device Role / Timing Role: Human interface processor running FreeRTOS with GUI rendering, real-time CAN I/O polling, and Ethernet diagnostics. Use Value: 512-KB SRAM hosts frame buffer and protocol stacks; 177-pin TFLGA provides dense I/O for resistive touch and LED indicators. |
Use Scenario: Safety-critical infusion pump with motor control, pressure sensing, and wireless telemetry (BLE via USB bridge). IC Role / Device Role / Timing Role: IEC60730-certifiable controller performing periodic self-tests, closed-loop flow rate regulation, and fault-safe shutdown. Use Value: A/D self-diagnostic and analog input disconnection detection prevent undetected sensor faults; IWDTa windowing enforces safe watchdog refresh timing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEHDFB#V0 | Same RX64M family, 144-pin LFBGA, 2.5-MB flash, no USBA module, single Ethernet MAC | Lacks USB battery charging and second Ethernet channel; suitable for cost-sensitive gateways without dual-network redundancy | Select when dual Ethernet and USB charging are unnecessary and PCB area is constrained by 144-pin footprint |
| R7FA6M2AF3CFB#AA0 | RX72M series, 240-MHz RXv3 core, 2-MB flash, single Ethernet, no USBA, enhanced safety features (lockstep CPU) | Higher performance but no USB battery charging; adds lockstep CPU and functional safety libraries for ASIL-B | Choose for automotive or medical applications requiring ASIL-B certification where USB charging is secondary |
Compared with R5F564MFHGFB#V1, the R5F565NEHDFB#V0 reduces feature count and package size for lower-cost deployments, while the R7FA6M2AF3CFB#AA0 trades USB/Ethernet flexibility for higher compute throughput and functional safety certification-making R5F564MFHGFB#V1 optimal for industrial edge devices needing balanced connectivity, security, and real-time determinism.
Availability
R5F564MFHGFB#V1 is available at Aetrix Electronics and suitable for industrial automation controllers, smart energy gateways, factory HMIs, and medical infusion pumps requiring stable component supply across extended product lifecycles.
Supply support for R5F564MFHGFB#V1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and IoT markets.
The RX64M Group, including R5F564MFHGFB#V1, was designed for high-performance industrial edge devices requiring deterministic real-time control, multi-protocol connectivity, and built-in functional safety features.
FAQ
What is the maximum operating frequency and core type of the R5F564MFHGFB#V1?
The R5F564MFHGFB#V1 operates at a maximum frequency of 120 MHz using the 32-bit RXv2 CPU core, delivering 240 DMIPS performance. It integrates a single-precision IEEE-754 floating-point unit and dual multiply-accumulate units. This core enables deterministic real-time execution for industrial control loops, and the R5F564MFHGFB#V1 maintains full performance across its specified temperature range of –40°C to +105°C.
Does the R5F564MFHGFB#V1 support IEEE 1588 Precision Time Protocol?
Yes, the R5F564MFHGFB#V1 includes a dedicated PTP controller (EPTPC) tightly coupled to both Ethernet MAC modules, enabling full IEEE 1588-2008 hardware timestamping with sub-microsecond accuracy. The R5F564MFHGFB#V1 supports one-step and two-step clock synchronization, delay request-response mechanisms, and transparent clock functionality-critical for time-sensitive networking in industrial automation systems.
What USB capabilities does the R5F564MFHGFB#V1 provide?
The R5F564MFHGFB#V1 integrates the USBA module supporting full-speed USB 2.0 (12 Mbps) in host, function, and OTG modes, with built-in battery charging detection per USB Battery Charging Specification v1.2. It includes an 8.5-KB on-chip RAM buffer and requires no external pull-up/pull-down resistors. This capability is exclusive to 176-/177-pin RX64M variants like the R5F564MFHGFB#V1.
How many analog-to-digital converter channels does the R5F564MFHGFB#V1 support?
The R5F564MFHGFB#V1 integrates two independent 12-bit S12ADC units: Unit 0 provides 8 channels, and Unit 1 provides 21 channels, for a total of 29 configurable analog inputs. Both units support 8-/10-/12-bit resolution, sample-and-hold, self-diagnostic voltage generation, and analog input disconnection detection-features essential for reliable sensor monitoring in industrial environments.
What package type and pin count does the R5F564MFHGFB#V1 use?
The R5F564MFHGFB#V1 uses a 177-pin TFLGA package (PTLG0177KA-A), measuring 8 mm × 8 mm with 0.5-mm pitch and 0.75-mm height. This fine-pitch land-grid array supports high I/O density for industrial interfaces including dual Ethernet PHY routing, multiple CAN transceivers, and parallel camera capture-making it ideal for space-constrained edge controllers where the R5F564MFHGFB#V1's full peripheral set must be utilized.
R5F564MFHGFB#V1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 144-LQFP
- Series:
- RX
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, SCI, SPI, SSI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 111
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 64K x 8
- RAM Size:
- 512K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F564MFHGFB#V1 FAQ
1.How can I place an order for R5F564MFHGFB#V1 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F564MFHGFB#V1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F564MFHGFB#V1 reliable?
The price and inventory of R5F564MFHGFB#V1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F564MFHGFB#V1 is usually 5 days.
3.What payment methods are accepted for R5F564MFHGFB#V1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F564MFHGFB#V1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F564MFHGFB#V1?
R5F564MFHGFB#V1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F564MFHGFB#V1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F564MFHGFB#V1?
For technical support, including R5F564MFHGFB#V1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F564MFHGFB#V1 requirements.
6.How does Aetrix verify that R5F564MFHGFB#V1 is sourced from the original manufacturer or authorized distributors?
All R5F564MFHGFB#V1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F564MFHGFB#V1 meets industry standards.
7.What is the process for return or replacement of R5F564MFHGFB#V1?
All R5F564MFHGFB#V1 units undergo pre-shipment inspection (PSI). If there is an issue with R5F564MFHGFB#V1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F564MFHGFB#V1 part is unused and in its original packaging.
Return procedure for R5F564MFHGFB#V1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F564MFHGFB#V1 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

