Renesas R5F564MGCDFC#31
- Part No.:
- R5F564MGCDFC#31
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 176-LQFP
- Datasheet:
-
R5F564MGCDFC#31.pdf
- Description:
- IC MCU 32BIT 2.5MB FLSH 176LFQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,613
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Product details
Overview
R5F564MGCDFC#31 from Renesas is a 120-MHz 32-bit RXv2 microcontroller with integrated FPU, 4 MB code flash, 512 KB SRAM, IEEE 1588-compliant dual Ethernet MAC, full-speed USB 2.0 with battery charging support, CAN (ISO 11898-1), and hardware AES/SHA encryption - deployed in industrial gateways requiring deterministic real-time control, secure connectivity, and multi-protocol edge processing.
For engineers reviewing the R5F564MGCDFC#31 datasheet, R5F564MGCDFC#31 pinout, R5F564MGCDFC#31 application, or R5F564MGCDFC#31 equivalent, this MCU delivers verified 240 DMIPS performance, on-chip ECC-protected RAM, BGO-capable data flash (100k write cycles), and IEC 60730-compliant safety features including oscillation-stop detection, CRC, and A/D self-diagnosis - critical for functional safety certification in motor drives and PLCs.
Technical Context
The R5F564MGCDFC#31 implements the RXv2 CISC Harvard architecture with 5-stage pipeline, single-cycle 32×32 multiplier, and IEEE-754-compliant single-precision FPU - enabling high-efficiency floating-point math for motion control algorithms. Its clock system supports independent domain scaling: ICLK up to 120 MHz for CPU/core logic, PCLKA up to 120 MHz for Ethernet/USB/AES, and PCLKB up to 60 MHz for timers/ADC.
Real-time determinism is enforced via ELC (Event Link Controller) for zero-CPU-intervention peripheral interoperation, DTC/DMAC/EXDMAC for autonomous data movement, and MTU3/GPT with dead-time-compensated complementary PWM - all synchronized to precise PCLK domains. The device integrates dual Ethernet controllers with dedicated EDMAC (3-channel) and EPTPC for IEEE 1588 timestamping, plus USBA with 8.5 KB on-chip buffer and battery-charging capability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC with 5-stage pipeline, 240 DMIPS @ 120 MHz - enables real-time servo loop execution in <1 µs. |
| Memory | 4 MB code flash (no wait states @ 120 MHz), 64 KB data flash (100k erase cycles), 512 KB SRAM (no wait), 32 KB ECC RAM (SEC-DED) - supports robust firmware updates and fault-tolerant data logging. |
| Connectivity | Dual IEEE 1588 Ethernet MAC (MII/RMII), USBA with battery charging (8.5 KB buffer), 3× CAN (ISO 11898-1), 9× SCI/SCIg/h, 4× SCIFA, 2× RIIC, QSPI, SDHI - enables converged industrial networking stack. |
| Analog Peripherals | Two 12-bit S12ADC units (8 + 21 ch), conversion time 0.48 µs/ch; 2× R12DA (12-bit); on-die temperature sensor (±1°C) - supports closed-loop analog sensing without external signal conditioning. |
| Timers & PWM | MTU3a (9 ch), TPUa (6 ch), GPTA (4 ch), CMTW (2×32-bit), with ELC-triggered PWM, dead-time insertion, and phase-shifted three-phase generation - meets IEC 61800-3 requirements for inverter control. |
| Security & Safety | Hardware AES-128/192/256, DES/TDES, SHA-1/224/256, HMAC, IEC 60730-compliant self-test (A/D diagnosis, oscillator stop detection, register protection) - satisfies SIL2/PLd functional safety evidence requirements. |
| Power & Environment | 2.7–3.6 V supply, –40°C to +105°C (G-version), four low-power modes, RTC with VBATT backup - suitable for uncooled DIN-rail mounted automation equipment. |
Pinout & Package
Package: PLQP0176KB-A (176-pin LQFP, 24 × 24 mm, 0.5 mm pitch). Pin count and peripheral availability align with 176-pin configuration per Table 1.2 of R01DS0173EJ0120 - includes 127 general-purpose I/O pins (19× 5-V tolerant), dual Ethernet PHY interface signals, USBA transceiver pins, CANH/CANL, QSPI, SDHI, and parallel camera interface (PDC) signals.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, AVCC0, AVCC1 | Core & analog power supply | Separate 2.7–3.6 V domains enable noise isolation between digital logic and ADC/DAC sections. |
| XTAL/EXTAL | Main crystal oscillator input/output | Supports 8–24 MHz crystal for precise system timing; paired with PLL for 120 MHz ICLK generation. |
| ETH_MDC/MDIO, ETH_TXD[3:0], ETH_RXD[3:0] | Ethernet MAC physical interface | Dual MII/RMII-capable pins allow concurrent 10/100 Mbps operation on two independent networks. |
| USBA_DP/USBA_DM | USB 2.0 Full-Speed differential pair | Integrated transceiver with battery-charging detection (BC1.2) eliminates need for external USB PHY. |
| CAN0_TX/CAN0_RX, CAN1_TX/CAN1_RX, CAN2_TX/CAN2_RX | CAN bus transceiver interfaces | Three independent ISO 11898-1 compliant channels support multi-bus automotive or machinery diagnostics. |
| QSPI_IO0–QSPI_IO3, QSPI_CLK, QSPI_SSL | Quad SPI flash interface | Direct connection to quad-output serial NOR flash enables XIP (execute-in-place) boot and firmware storage. |
Key Features
| Feature | Design Value |
|---|---|
| ELC (Event Link Controller) | 119 internal event sources linked without CPU intervention - reduces interrupt latency to sub-microsecond for time-critical I/O synchronization. |
| Background Operation (BGO) | Simultaneous code/data flash programming/erasing during application execution - enables seamless firmware updates without halting real-time tasks. |
| IEC 60730 Safety Support | Hardware CRC unit, A/D self-diagnostic, oscillation-stop detection, register write protection - provides traceable evidence for Class B compliance. |
| IEEE 1588 Precision Time Protocol | EPTPC block tightly coupled to ETHERC with hardware timestamping at packet ingress/egress - achieves sub-100 ns time synchronization accuracy. |
| Complementary PWM with Dead-Time Control | MTU3a auto-inserts non-overlapping delays in hardware - eliminates shoot-through risk in 3-phase inverter gate drivers without software overhead. |
Applications
| Industrial Ethernet Gateway | Programmable Logic Controller (PLC) |
|---|---|
Use Scenario: Aggregating Modbus TCP, EtherNet/IP, and PROFINET traffic across factory floor devices while executing local control logic. IC Role / Device Role / Timing Role: Dual Ethernet MAC + EPTPC serves as time-synchronized protocol bridge; MTU3/GPT generates precise I/O scan timing (1 ms resolution). Use Value: Eliminates need for external switch/FPGA by integrating two full-featured Ethernet stacks with hardware PTP timestamping and deterministic packet routing. |
Use Scenario: Executing ladder logic and motion control sequences in DIN-rail mounted controllers with fieldbus coexistence (CAN + RS485). IC Role / Device Role / Timing Role: RXv2 core runs real-time OS (e.g., FreeRTOS) with 240 DMIPS headroom; 3× CAN modules handle device-level diagnostics and actuator feedback. Use Value: On-chip 4 MB flash stores multiple firmware images; data flash retains configuration and runtime logs across 100k power cycles. |
| Motor Drive Inverter | Secure Edge Node |
Use Scenario: Closed-loop vector control of PMSM/BLDC motors with current sensing, thermal monitoring, and field-oriented control (FOC) computation. IC Role / Device Role / Timing Role: FPU accelerates trigonometric calculations; MTU3a generates synchronized 3-phase PWM with hardware dead-time compensation. Use Value: 12-bit ADC with sample-and-hold and disconnection detection ensures accurate current measurement; temperature sensor validates thermal derating. |
Use Scenario: Remote asset monitoring with encrypted sensor data upload, OTA firmware validation, and secure boot in IIoT edge nodes. IC Role / Device Role / Timing Role: AES/SHA engines perform cryptographic operations offload; trusted memory (TM) protects bootloader integrity in blocks 8–9. Use Value: Hardware crypto accelerates TLS handshake by >10× vs. software-only; IEC 60730 self-tests satisfy cybersecurity assurance requirements (IEC 62443). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F566TEADFP#30 | RX66T Group; 160 MHz CPU, enhanced FPU, 32 KB SRAM w/ECC, no Ethernet MAC, adds encoder interface (ENCA), higher PWM resolution (192 MHz timer base) | Optimized for servo drive control with position feedback; lacks dual Ethernet but adds hardware position capture | Select when prioritizing motor control precision over network convergence - requires external PHY for Ethernet connectivity. |
| STM32H743VI | ARM Cortex-M7; 480 MHz, 2 MB flash, 1 MB RAM, single Ethernet MAC, no IEEE 1588 hardware timestamping, no integrated USB battery charging | General-purpose high-performance MCU with strong DSP capability; limited industrial protocol offload (no ELC, no MTU3-style PWM) | Choose for cost-sensitive designs where Linux RTOS or bare-metal ARM ecosystem preference outweighs deterministic peripheral linking and PTP accuracy. |
Compared with R5F564MGCDFC#31, the R5F566TEADFP#30 trades dual Ethernet and PTP for superior motor control peripherals and higher clock speed, while the STM32H743VI offers broader toolchain adoption but lacks hardware-accelerated industrial protocol stacks and fails to match the RX64M's integrated safety and security feature depth.
Availability
R5F564MGCDFC#31 is available at Aetrix Electronics and suitable for industrial gateways, programmable logic controllers, motor drive inverters, and secure edge nodes requiring stable component supply, long-term lifecycle commitment, and traceable sourcing for production ramp.
Supply support for R5F564MGCDFC#31 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a Japanese semiconductor manufacturer specializing in microcontrollers, analog, and power solutions for industrial, automotive, and infrastructure markets.
The RX64M Group targets high-reliability industrial automation applications - designed to integrate real-time control, multi-protocol networking, functional safety, and hardware security into a single chip for DIN-rail and embedded gateway use cases.
FAQ
What is the maximum operating frequency and DMIPS rating of the R5F564MGCDFC#31?
The R5F564MGCDFC#31 operates at a maximum frequency of 120 MHz and delivers 240 DMIPS performance. This is achieved through its RXv2 CPU core with 5-stage pipeline, single-cycle 32×32 multiplier, and efficient instruction set - enabling deterministic execution of complex control algorithms within tight cycle budgets required by industrial motion applications.
Does the R5F564MGCDFC#31 support IEEE 1588 Precision Time Protocol?
Yes, the R5F564MGCDFC#31 includes a dedicated EPTPC (Precision Time Protocol Controller) block tightly coupled to its dual Ethernet MAC (ETHERC). It performs hardware timestamping on packet ingress and egress with sub-100 ns accuracy - essential for time-sensitive networking in industrial automation and power substation applications.
How many Ethernet MAC interfaces does the R5F564MGCDFC#31 integrate?
The R5F564MGCDFC#31 integrates two fully independent IEEE 802.3-compliant Ethernet MAC interfaces, each supporting 10/100 Mbps in full- and half-duplex modes with MII/RMII physical layer options. Both MACs are supported by dedicated EDMAC channels and share access to the EPTPC for synchronized time stamping.
What type of USB interface is included in the R5F564MGCDFC#31?
The R5F564MGCDFC#31 includes a full-speed USB 2.0 host/function module with battery charging (USBA), featuring an integrated transceiver, 8.5 KB on-chip RAM buffer, and BC1.2-compliant charging detection - eliminating external PHY components and enabling direct connection to USB peripherals or chargers in industrial HMI and gateway designs.
Is hardware encryption available on the R5F564MGCDFC#31?
Yes, the R5F564MGCDFC#31 includes optional hardware acceleration for AES (128/192/256-bit), DES/TDES, and SHA-1/224/256/HMAC cryptographic functions. These engines operate independently of the CPU, enabling secure boot, TLS offload, and firmware authentication without compromising real-time control performance.
R5F564MGCDFC#31 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 176-LQFP
- Series:
- RX600
- Packaging:
- Tray
- Product Status:
- Discontinued at Digi-Key
- Programmable:
- Not Verified
- Core Processor:
- RXv2
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, SCI, SPI, SSI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 127
- Program Memory Size:
- 2.5MB (2.5M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 64K x 8
- RAM Size:
- 552K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F564MGCDFC#31 FAQ
1.How can I place an order for R5F564MGCDFC#31 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F564MGCDFC#31 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F564MGCDFC#31 reliable?
The price and inventory of R5F564MGCDFC#31 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F564MGCDFC#31 is usually 5 days.
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Once your R5F564MGCDFC#31 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F564MGCDFC#31?
For technical support, including R5F564MGCDFC#31 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F564MGCDFC#31 requirements.
6.How does Aetrix verify that R5F564MGCDFC#31 is sourced from the original manufacturer or authorized distributors?
All R5F564MGCDFC#31 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F564MGCDFC#31 meets industry standards.
7.What is the process for return or replacement of R5F564MGCDFC#31?
All R5F564MGCDFC#31 units undergo pre-shipment inspection (PSI). If there is an issue with R5F564MGCDFC#31, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F564MGCDFC#31 part is unused and in its original packaging.
Return procedure for R5F564MGCDFC#31:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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