Renesas R5F564MGHDLK#21
- Part No.:
- R5F564MGHDLK#21
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 145-TFLGA
- Datasheet:
-
R5F564MGHDLK#21.pdf
- Description:
- IC MCU 32BIT 2.5MB FLSH 145TFLGA
- Quantity:
- Payment:

- Shipping:

Inventory:416
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Product details
Overview
R5F564MGHDLK#21 from Renesas is a 32-bit RXv2 core microcontroller operating at up to 120 MHz (240 DMIPS), featuring 4 MB on-chip code flash, 512 KB SRAM, IEEE 1588-compliant dual Ethernet MAC, full-speed USB 2.0 with battery charging support, and integrated 12-bit A/D and D/A converters - deployed in industrial automation gateways requiring real-time protocol handling and secure firmware execution.
For engineers reviewing the R5F564MGHDLK#21 datasheet, R5F564MGHDLK#21 pinout, R5F564MGHDLK#21 application, or R5F564MGHDLK#21 equivalent, this MCU delivers deterministic real-time control with hardware-accelerated crypto (AES-128/192/256, SHA-256), dual Ethernet for redundancy or time-synchronized I/O, and robust functional safety features aligned with IEC 60730.
Technical Context
The R5F564MGHDLK#21 implements the RXv2 CPU core with Harvard architecture, 5-stage pipeline, and variable-length instructions enabling ultra-compact code density. It integrates dual Ethernet MACs with IEEE 1588 PTP hardware timestamping and dedicated EDMAC channels for zero-copy frame processing.
Its memory subsystem includes 4 MB no-wait-state flash supporting background programming, 512 KB SRAM with no wait states, 32 KB ECC-protected RAM (SEC-DED), and 8 KB standby RAM backed by VBATT. Clocking uses PLL multiplication of HOCO (16–20 MHz) or external crystal (8–24 MHz) to achieve 120 MHz ICLK.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC core with 5-stage pipeline, 240 DMIPS @ 120 MHz - enables high-throughput deterministic task scheduling in real-time OS environments. |
| Flash Memory | 4 MB code flash, 120-MHz no-wait access, background erase/program - supports field firmware updates without halting application execution. |
| SRAM | 512 KB general-purpose SRAM + 32 KB ECC-protected RAM (SEC-DED) - ensures data integrity for safety-critical variables and stack operations. |
| Ethernet | Dual IEEE 1588-compliant MACs with MII/RMII, 10/100 Mbps, cut-through forwarding - enables time-synchronized multi-network industrial communication with sub-microsecond timestamp resolution. |
| USB | Full-speed USB 2.0 host/function with battery charging support (USBA module) - allows direct connection to USB peripherals and power negotiation for embedded host applications. |
| A/D Converter | Two 12-bit S12ADC units (8 + 21 channels), 0.48 µs conversion time, self-diagnostic & disconnection detection - provides high-accuracy analog monitoring with built-in functional safety verification. |
| Crypto Engine | Hardware AES (128/192/256), DES/TDES, SHA-1/SHA-2 (224/256), HMAC - accelerates secure boot, firmware signing, and TLS offload without CPU overhead. |
Pinout & Package
Package: PLQP0176KB-A (176-pin LQFP, 24 × 24 mm, 0.5-mm pitch). Pin count and peripheral availability match 176-pin RX64M configuration per datasheet Table 1.2.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Power supply inputs | Single 2.7–3.6 V supply domain; AVCC0/AVCC1 provide isolated analog reference for ADC/DAC - enables noise-sensitive mixed-signal operation. |
| VBATT | Battery backup input | Supplies RTC during main power loss - maintains calendar/timekeeping and wake-on-event capability in deep software standby mode. |
| XTAL / EXTAL | Main clock oscillator terminals | Supports 8–24 MHz crystal or resonator - provides precise timing source for Ethernet PHY synchronization and real-time control loops. |
| MD0 / MD1 | Mode setting pins | Configure boot mode (SCI/USB/user) and endian selection at reset - defines initial firmware load path and memory layout behavior. |
| ETXD0–7 / ETXCK / ERXD0–7 / ERXCK | Ethernet MAC physical interface | MII interface signals for dual Ethernet channels - enables simultaneous connection to two independent 10/100 Mbps networks with hardware timestamping. |
| USBDP / USBDM | USB 2.0 differential data lines | Full-speed USB transceiver I/O (12 Mbps) with integrated pull-ups - eliminates external termination components for cost-sensitive USB host designs. |
Key Features
| Feature | Design Value |
|---|---|
| IEEE 1588 Hardware Timestamping | Integrated PTP controller (EPTPC) synchronizes dual Ethernet MACs to sub-100 ns precision - eliminates software timestamp jitter in time-critical motion control networks. |
| Functional Safety Support | Oscillation-stop detection, CRC engine, IWDTa with window function, A/D self-diagnostic, register write protection - satisfies IEC 60730 Class B requirements without external safety monitors. |
| Secure Boot & Firmware Validation | Trusted Memory (TM) blocks 8–9 prevent read-out; hardware crypto accelerates signature verification - enforces authenticated firmware execution and protects intellectual property. |
| Flexible Power Management | Four low-power modes (sleep, all-module stop, software standby, deep software standby) with VBATT-backed RTC - extends uptime in battery-backed edge nodes while maintaining network presence. |
| High-Density Peripheral Integration | 127 GPIOs (19 5-V tolerant), 29 timers (TPUa/MTU3a/GPTA), 9 SCIg/h channels, 4 SCIFA, 2 RIIC, 3 CAN, QSPI, SDHI - reduces BOM count and PCB layer count in compact industrial controllers. |
Applications
| Industrial Ethernet Gateway | Smart Energy Metering Hub |
|---|---|
Use Scenario: Aggregating Modbus TCP, PROFINET, and EtherCAT traffic across dual Ethernet ports with time-synchronized data logging. IC Role / Device Role / Timing Role: Real-time protocol stack processor with IEEE 1588 PTP hardware timestamping and dual-MAC cut-through forwarding. Use Value: Enables deterministic packet routing and sub-microsecond time alignment between fieldbus domains without external timing hardware. |
Use Scenario: Multi-tariff energy meter with tamper detection, secure firmware updates, and remote diagnostics via USB or Ethernet. IC Role / Device Role / Timing Role: Secure metering SoC with hardware crypto, A/D self-test, and VBATT-backed RTC for billing accuracy during outages. Use Value: Meets IEC 62056 and UL 2900-1 security requirements while reducing bill-of-materials through integrated crypto and safety diagnostics. |
| Programmable Logic Controller (PLC) CPU Module | Factory Automation Edge Node |
Use Scenario: Compact PLC base unit executing ladder logic with motion control, analog I/O conditioning, and EtherNet/IP communication. IC Role / Device Role / Timing Role: Deterministic real-time controller with MTU3a complementary PWM, 12-bit A/D with disconnection detection, and dual CAN. Use Value: Supports 100 µs I/O scan cycles and synchronized 3-phase motor drive output with automatic dead-time compensation. |
Use Scenario: Embedded vision-aided quality inspection node using CMOS camera interface (PDC), SDHI for local image storage, and USB for operator interface. IC Role / Device Role / Timing Role: Vision preprocessing SoC with parallel data capture unit, 512 KB SRAM for frame buffering, and hardware AES for encrypted image upload. Use Value: Eliminates external FPGA or DDR memory by integrating high-bandwidth image acquisition, processing buffer, and secure transport in one chip. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEHDFP#30 | Same RX64M family, 144-pin LQFP, 2.5 MB flash, single Ethernet MAC, no USBA (battery charging) | Limited to single-network applications; lacks USB battery charging and second Ethernet channel | Select when dual Ethernet and USB charging are unnecessary and board space is constrained. |
| R5F571MLHDFB#30 | RX71M family, 176-pin LQFP, 2 MB flash, 120 MHz, single Ethernet MAC, no IEEE 1588 hardware, higher temp grade (−40°C to +105°C) | Targeted at automotive body electronics; lacks PTP hardware and dual MAC but offers extended temperature range | Choose for high-temp environments where IEEE 1588 is not required and functional safety certification differs. |
Compared with R5F564MGHDLK#21, R5F565NEHDFP#30 reduces peripheral count and package size at the cost of dual Ethernet and USB charging, while R5F571MLHDFB#30 trades PTP hardware and dual MAC for extended temperature operation and automotive qualification - making R5F564MGHDLK#21 optimal for time-synchronized industrial networking where both redundancy and precision timing are mandatory.
Availability
R5F564MGHDLK#21 is available at Aetrix Electronics and suitable for industrial Ethernet gateways, smart energy metering hubs, programmable logic controller CPU modules, and factory automation edge nodes requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F564MGHDLK#21 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a Japanese semiconductor manufacturer specializing in microcontrollers, analog, and power management ICs for industrial, automotive, and infrastructure markets.
The RX64M Group - including R5F564MGHDLK#21 - was designed for high-performance industrial automation applications demanding real-time determinism, functional safety compliance (IEC 60730), and integrated connectivity (dual Ethernet, USB, CAN, SDHI).
FAQ
What is the maximum operating frequency and performance rating of the R5F564MGHDLK#21?
The R5F564MGHDLK#21 operates at a maximum frequency of 120 MHz and delivers 240 DMIPS of processing performance. Its RXv2 CPU core includes a single-precision IEEE-754 floating-point unit, dual multiply-and-accumulate units, and a 5-stage pipeline - enabling efficient execution of real-time control algorithms and protocol stacks without external co-processors.
Does the R5F564MGHDLK#21 support IEEE 1588 Precision Time Protocol hardware timestamping?
Yes, the R5F564MGHDLK#21 integrates a dedicated PTP controller (EPTPC) linked to both Ethernet MACs, providing hardware timestamping with sub-100 ns resolution. This enables precise time synchronization across dual networks without CPU intervention - critical for motion control, distributed I/O, and time-sensitive networking applications.
What are the flash and RAM capacities of the R5F564MGHDLK#21?
The R5F564MGHDLK#21 includes 4 MB of on-chip code flash memory with no-wait-state operation at 120 MHz, 512 KB of general-purpose SRAM, 32 KB of ECC-protected RAM (SEC-DED), and 8 KB of VBATT-backed standby RAM. All memory blocks support background programming/erasing for seamless firmware updates.
Which communication interfaces are supported by the R5F564MGHDLK#21 for industrial connectivity?
The R5F564MGHDLK#21 supports dual IEEE 1588-compliant Ethernet MACs, full-speed USB 2.0 with battery charging (USBA), three CAN 2.0B channels, nine SCIg/h serial interfaces, four SCIFA with 16-byte FIFOs, two I²C (up to 1 Mbps), quad SPI, SD host interface, and parallel data capture for CMOS cameras - covering the full spectrum of industrial wired and embedded peripheral connectivity.
How does the R5F564MGHDLK#21 meet functional safety requirements for industrial equipment?
The R5F564MGHDLK#21 includes multiple IEC 60730-compliant features: oscillation-stop detection, hardware CRC generator, independent watchdog timer (IWDTa) with window function, A/D converter self-diagnostic, register write protection, and voltage monitoring circuits with configurable thresholds - enabling Class B compliance without external safety monitors.
R5F564MGHDLK#21 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 145-TFLGA
- Series:
- RX600
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RXv2
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, SCI, SPI, SSI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 111
- Program Memory Size:
- 2.5MB (2.5M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 64K x 8
- RAM Size:
- 552K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F564MGHDLK#21 FAQ
1.How can I place an order for R5F564MGHDLK#21 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F564MGHDLK#21 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F564MGHDLK#21 reliable?
The price and inventory of R5F564MGHDLK#21 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F564MGHDLK#21 is usually 5 days.
3.What payment methods are accepted for R5F564MGHDLK#21?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F564MGHDLK#21 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F564MGHDLK#21?
R5F564MGHDLK#21 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F564MGHDLK#21 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F564MGHDLK#21?
For technical support, including R5F564MGHDLK#21 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F564MGHDLK#21 requirements.
6.How does Aetrix verify that R5F564MGHDLK#21 is sourced from the original manufacturer or authorized distributors?
All R5F564MGHDLK#21 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F564MGHDLK#21 meets industry standards.
7.What is the process for return or replacement of R5F564MGHDLK#21?
All R5F564MGHDLK#21 units undergo pre-shipment inspection (PSI). If there is an issue with R5F564MGHDLK#21, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F564MGHDLK#21 part is unused and in its original packaging.
Return procedure for R5F564MGHDLK#21:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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