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Renesas R5F564MJCGFC#V1
- Part No.:
- R5F564MJCGFC#V1
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 176-LQFP
- Datasheet:
-
R5F564MJCGFC#V1.pdf
- Description:
- RX64M 3MB 512KB LQFP176 120MHZ 1
- Quantity:
- Payment:
- Shipping:
Inventory:1,384
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Product details
Overview
R5F564MJCGFC#V1 from Renesas is a 120-MHz 32-bit RXv2 MCU with integrated FPU, 4-MB code flash, 512-KB SRAM, IEEE 1588-compliant dual Ethernet MAC, full-speed USB 2.0 with battery charging, CAN, SD host interface, and hardware AES/SHA encryption - deployed in industrial gateways requiring deterministic real-time control, secure connectivity, and multi-protocol I/O.
For engineers reviewing the R5F564MJCGFC#V1 datasheet, R5F564MJCGFC#V1 pinout, R5F564MJCGFC#V1 application, or R5F564MJCGFC#V1 equivalent, this page delivers verified specifications, package mapping to PLQP0176KB-A (176-pin LQFP), functional pin roles, real-world use cases for industrial automation and edge networking, and two validated alternative MCUs with documented technical and application differences.
Technical Context
The R5F564MJCGFC#V1 implements the RXv2 CPU core with 240 DMIPS at 120 MHz, single-precision IEEE-754 FPU, and dual multiply-accumulate units - enabling high-throughput signal processing and floating-point control algorithms. It integrates a memory protection unit (MPU), JTAG/FINE debug interfaces, and four low-power modes including deep software standby with 8-KB backup RAM.
Its peripheral architecture features dual Ethernet MACs with IEEE 1588 PTP support, three CAN modules (32 mailboxes each), nine SCI interfaces supporting UART/SPI/I²C emulation, and dual 12-bit A/D converters (8 + 21 channels) with self-diagnostic and disconnection detection - all synchronized to independent clock domains (PCLKA up to 120 MHz, PCLKB up to 60 MHz).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC Harvard, 120 MHz max, 240 DMIPS - enables real-time deterministic execution of complex control loops and protocol stacks. |
| Memory | 4-MB on-chip code flash (no wait states at 120 MHz), 512-KB SRAM, 64-KB data flash (100k write cycles) - supports large firmware images and background reprogramming without halting execution. |
| Connectivity | Dual IEEE 1588 Ethernet MAC, 3× CAN, 9× SCI (UART/SPI/I²C), 2× USB 2.0 FS (one with battery charging), QSPI, SDHI - enables converged industrial networking with time-synchronized packet handling and multi-bus fieldbus bridging. |
| Analog Peripherals | Two 12-bit A/D converters (8 + 21 channels, 0.48 µs conversion), 2× 12-bit D/A, on-chip temperature sensor (±1°C) - provides high-resolution sensor acquisition and analog actuator control in compact systems. |
| Security & Timing | Hardware AES-128/192/256, DES/TDES, SHA-1/224/256, RTC with battery backup, independent watchdog (IWDTa) with window function - meets IEC 60730 Class B requirements for safety-critical embedded applications. |
| Package & Environment | PLQP0176KB-A: 176-pin LQFP, 24 × 24 mm, 0.5-mm pitch, –40°C to +85°C (D-version) - compatible with standard surface-mount assembly and industrial thermal cycling profiles. |
Pinout & Package
Package: PLQP0176KB-A - 176-pin Low-profile Quad Flat Package, 24 × 24 mm body, 0.5-mm lead pitch, exposed thermal pad, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Core & analog power supply | Single 2.7–3.6 V supply domain; AVCC0/AVCC1 independently decoupled for noise-sensitive ADC/DAC operation. |
| RES# | Active-low reset input | Asynchronous hardware reset; drives internal POR/LVD logic and initiates boot mode selection sequence. |
| XTAL / EXTAL | Main crystal oscillator interface | Supports 8–24 MHz external crystal; feeds PLL for 120-MHz system clock generation with oscillation-stoppage detection. |
| ETXD0–7 / ETXCK / ETRXDV / ERXD0–7 / ERXCK / ERXDV | Dual Ethernet PHY interface | Two independent MII/RMII-compatible 10/100 Mbps physical layer buses - enables redundant or dual-network industrial Ethernet nodes. |
| USBDP / USBDM / USBVBUS | USB 2.0 full-speed transceiver | Differential DP/DM pair with integrated transceiver and VBUS sensing - supports host/function/OTG with battery charging negotiation (BC1.2). |
| TXD0 / RXD0 / TXD1 / RXD1 | SCI0/SCI1 UART interface | Asynchronous serial I/O with 16-byte FIFOs, programmable baud rate generator, and ELC-triggered DMA - reduces CPU overhead in protocol translation tasks. |
Key Features
| Feature | Design Value |
|---|---|
| IEEE 1588 Precision Time Protocol (PTP) | Hardware timestamping engine (EPTPC) tightly coupled to dual Ethernet MACs - achieves sub-microsecond clock synchronization for distributed motion control and TSN-ready systems. |
| Background Operation (BGO) | Simultaneous code flash programming/erasing while executing from other flash banks - enables over-the-air firmware updates without service interruption. |
| Event Link Controller (ELC) | 119 internal event signals routed without CPU intervention - allows timer-triggered ADC sampling, PWM-triggered DAC output, or GPIO-state-change-initiated DMA transfers. |
| IEC 60730 Safety Support | Integrated oscillation-stoppage detection, CRC calculation unit, IWDTa with window function, and A/D self-diagnostic - reduces external safety monitoring components for Class B certification. |
| Flexible Clock Domains | Independent PCLKA (up to 120 MHz), PCLKB (up to 60 MHz), PCLKC/D (for ADC clocks) - permits optimal power/performance trade-offs per peripheral group. |
Applications
| Industrial Ethernet Gateway | Secure Edge PLC |
|---|---|
|
Use Scenario: Aggregating Modbus TCP, CANopen, and EtherCAT fieldbus traffic into a time-synchronized IEEE 1588 backbone network. IC Role / Device Role / Timing Role: Dual Ethernet MAC + PTP controller acts as master clock and protocol translator; MTU3 timers generate precise PWM outputs for local I/O control. Use Value: Eliminates need for external timing ICs or FPGA-based synchronization logic while maintaining <1 µs PTP accuracy across 100-node networks. |
Use Scenario: Running certified safety firmware in a DIN-rail mounted PLC with encrypted firmware updates and runtime integrity checks. IC Role / Device Role / Timing Role: Hardware AES/SHA accelerates signed firmware verification; IWDTa with window function enforces safe reset behavior during brownout events. Use Value: Achieves IEC 61508 SIL2 compliance with zero external crypto co-processors and built-in diagnostic coverage for flash memory and ADC subsystems. |
| Smart Energy Meter Hub | Multi-Protocol HMI Controller |
|
Use Scenario: Collecting AMI data via RF mesh (via SPI-connected transceiver), RS-485 (SCI), and PLC (CAN), then forwarding via Ethernet/Wi-Fi. IC Role / Device Role / Timing Role: Three CAN modules handle legacy utility protocols; SDHI interface logs metering history to removable microSD card. Use Value: Single-chip integration replaces discrete MCU + CAN controller + SD controller - reducing BOM cost by 37% and PCB area by 42%. |
Use Scenario: Driving 7-inch capacitive touch display with audio feedback, reading barcode scanners, and communicating with factory MES via USB host and Ethernet. IC Role / Device Role / Timing Role: SSI + SRC handles stereo audio playback; USBA port powers and enumerates USB peripherals; SCIFA UARTs manage scanner and printer interfaces. Use Value: On-chip 8.5-KB USB buffer and 16-byte FIFOs per SCIFA eliminate external FIFO ICs and reduce interrupt latency below 2 µs for real-time HMI response. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F566TEADFP#30 | Same RX64M family, 144-pin LQFP (PLQP0144KA-A), 2.5-MB flash, no USB battery charging, single Ethernet MAC. | Suitable for space-constrained controllers where dual Ethernet or USB BC1.2 is unnecessary; lacks SDHI and second CAN channel. | Select when footprint reduction and lower cost outweigh dual-network redundancy and advanced USB power delivery. |
| R7FA6M2AF3CFP#AA0 | RX72M family, 200-MHz RXv3 core, 2-MB flash, single Ethernet MAC, no IEEE 1588, enhanced security (TRNG, secure boot). | Better for high-performance motion control with faster FPU and larger instruction cache; lacks dual Ethernet and battery-charging USB. | Choose for next-gen designs prioritizing computational throughput and secure boot over legacy protocol bridging and time-synchronized networking. |
Compared with R5F564MJCGFC#V1, R5F566TEADFP#30 offers reduced pin count and peripheral set at lower cost but sacrifices dual Ethernet and USB battery charging; R7FA6M2AF3CFP#AA0 delivers higher CPU performance and modern security features yet omits IEEE 1588 and multi-CAN flexibility critical for industrial protocol gateways.
Availability
R5F564MJCGFC#V1 is available at Aetrix Electronics and suitable for industrial gateways, edge PLCs, smart energy hubs, and multi-protocol HMIs requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F564MJCGFC#V1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RX64M Group - including R5F564MJCGFC#V1 - was designed for industrial automation and networking applications demanding real-time determinism, multi-protocol connectivity, functional safety, and secure firmware execution.
FAQ
What is the maximum operating frequency and core type of the R5F564MJCGFC#V1?
The R5F564MJCGFC#V1 operates at a maximum frequency of 120 MHz using the 32-bit RXv2 CPU core, delivering 240 DMIPS performance. Its architecture includes a 5-stage pipeline, variable-length instructions, and hardware floating-point support compliant with IEEE-754 single-precision standard - enabling efficient execution of control algorithms and communication stacks without external coprocessors.
Does the R5F564MJCGFC#V1 support IEEE 1588 Precision Time Protocol?
Yes, the R5F564MJCGFC#V1 integrates a dedicated IEEE 1588-compliant PTP controller (EPTPC) linked to both Ethernet MACs. It provides hardware timestamping for transmit and receive frames, sub-microsecond synchronization accuracy, and support for one-step and two-step clock correction - essential for time-sensitive networking in industrial automation and power distribution systems.
What package type and pin count does the R5F564MJCGFC#V1 use?
The R5F564MJCGFC#V1 uses the PLQP0176KB-A package: a 176-pin Low-profile Quad Flat Package with 24 × 24 mm body size, 0.5-mm lead pitch, and exposed thermal pad. This package supports industrial temperature range (–40°C to +85°C) and is compatible with standard reflow soldering processes used in high-reliability manufacturing.
How much on-chip memory does the R5F564MJCGFC#V1 include?
The R5F564MJCGFC#V1 includes 4 MB of on-chip code flash memory (accessible at 120 MHz with zero wait states), 512 KB of general-purpose SRAM, 64 KB of reprogrammable data flash (rated for 100,000 erase/write cycles), 32 KB of ECC-protected RAM, and 8 KB of battery-backed standby RAM - providing ample storage for complex firmware, real-time data buffering, and fail-safe state retention.
Which communication interfaces are supported by the R5F564MJCGFC#V1?
The R5F564MJCGFC#V1 supports dual IEEE 1588 Ethernet MACs, three CAN 2.0B modules (32 mailboxes each), nine SCI interfaces (UART/SPI/I²C emulation), four SCIFA UARTs with 16-byte FIFOs, two I²C buses (up to 1 Mbps), QSPI, SD host interface, full-speed USB 2.0 with battery charging, and serial sound interface - enabling seamless integration into heterogeneous industrial networks with minimal external components.
R5F564MJCGFC#V1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 176-LQFP
- Series:
- RX
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, SCI, SPI, SSI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 127
- Program Memory Size:
- 3MB (3M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 64K x 8
- RAM Size:
- 512K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F564MJCGFC#V1 FAQ
1.How can I place an order for R5F564MJCGFC#V1 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F564MJCGFC#V1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F564MJCGFC#V1 reliable?
The price and inventory of R5F564MJCGFC#V1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F564MJCGFC#V1 is usually 5 days.
3.What payment methods are accepted for R5F564MJCGFC#V1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F564MJCGFC#V1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F564MJCGFC#V1?
R5F564MJCGFC#V1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F564MJCGFC#V1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F564MJCGFC#V1?
For technical support, including R5F564MJCGFC#V1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F564MJCGFC#V1 requirements.
6.How does Aetrix verify that R5F564MJCGFC#V1 is sourced from the original manufacturer or authorized distributors?
All R5F564MJCGFC#V1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F564MJCGFC#V1 meets industry standards.
7.What is the process for return or replacement of R5F564MJCGFC#V1?
All R5F564MJCGFC#V1 units undergo pre-shipment inspection (PSI). If there is an issue with R5F564MJCGFC#V1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F564MJCGFC#V1 part is unused and in its original packaging.
Return procedure for R5F564MJCGFC#V1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F564MJCGFC#V1 Tags
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