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Renesas R5F564MJGGFC#V1
- Part No.:
- R5F564MJGGFC#V1
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 176-LQFP
- Datasheet:
-
R5F564MJGGFC#V1.pdf
- Description:
- IC MCU 32BIT 3MB FLASH 176LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:3,932
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Product details
Overview
R5F564MJGGFC#V1 from Renesas is a 120-MHz 32-bit RXv2 microcontroller with integrated FPU, 4 MB code flash, 512 KB SRAM, IEEE 1588-compliant dual Ethernet MAC, full-speed USB 2.0 with battery charging, CAN, SD host interface, and hardware encryption (AES/DES/SHA). It targets industrial networking gateways requiring deterministic real-time control, secure firmware updates, and multi-protocol connectivity.
For engineers reviewing the R5F564MJGGFC#V1 datasheet, R5F564MJGGFC#V1 pinout, R5F564MJGGFC#V1 application, or R5F564MJGGFC#V1 equivalent, key selection criteria include its 177-pin TFLGA package, -40°C to +105°C operating range (G-version), dual Ethernet with PTP support, on-chip 64 KB data flash rated for 100,000 erase/write cycles, and hardware-accelerated cryptographic engines supporting AES-128/192/256, DES, and SHA-1/2.
Technical Context
The R5F564MJGGFC#V1 implements the RXv2 CPU core with 240 DMIPS performance at 120 MHz, single-precision IEEE-754 floating-point unit, and dual multiply-accumulate units. Its memory subsystem includes 4 MB zero-wait-state code flash, 512 KB SRAM, 32 KB ECC-protected RAM, and 8 KB standby RAM backed by VBATT.
Peripheral architecture features dual Ethernet controllers (ETHERC) with EPTPC for IEEE 1588 timestamping, three CAN modules (ISO 11898-1 compliant), nine SCI interfaces (including LIN-capable SCIh), four SCIFA with 16-byte FIFOs, two RIIC buses (1 Mbps max), QSPI, SDHI, and parallel data capture (PDC) - all coordinated via Event Link Controller (ELC) for CPU-offload operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC Harvard architecture, 120 MHz max, 240 DMIPS, IEEE-754 FPU, 5-stage pipeline |
| Memory | 4 MB code flash (no wait states), 64 KB data flash (100k cycles), 512 KB SRAM, 32 KB ECC RAM, 8 KB standby RAM |
| Operating Range | -40°C to +105°C (G-version), 2.7–3.6 V supply, 0.3 mA/MHz typical active current |
| Connectivity | Dual IEEE 1588 Ethernet MAC, 3× CAN, 9× SCI/SCIg/SCIh, 4× SCIFA, 2× RIIC (1 Mbps), QSPI, SDHI, USB 2.0 FS with battery charging |
| Analog Peripherals | Two 12-bit ADCs (8+21 channels, 0.48 µs/ch), 2× 12-bit DACs, on-die temperature sensor (±1°C), RTC with battery backup |
| Security | Hardware AES (128/192/256), DES/T-DES, SHA-1/224/256, HMAC, trusted memory protection for flash blocks 8–9 |
| Package | TFLGA-177 (8 mm × 8 mm, 0.5 mm pitch), 127 general-purpose I/O pins (19× 5-V tolerant) |
Pinout & Package
Package: TFLGA-177 (8 mm × 8 mm, 0.5 mm pitch), RoHS-compliant, G-version (-40°C to +105°C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Power supply inputs | Core/analog power domains (2.7–3.6 V); separate AVCC0/AVCC1 enable independent analog rail filtering |
| VBATT | Battery backup supply | Provides power to RTC during main VCC dropout; enables calendar/timekeeping in deep software standby |
| CLKIN / CLKOUT | External crystal interface | Supports 8–24 MHz crystal for main clock; CLKOUT can drive external peripherals or test equipment |
| ETH_MDC / ETH_MDIO | MDIO management interface | IEEE 802.3-compliant serial bus for configuring PHY registers across both Ethernet channels |
| ETH_TXD0–3 / ETH_RXD0–3 | Ethernet data lanes | Dual 4-lane RMII/MII interface; supports simultaneous 10/100 Mbps full-duplex operation on both ports |
| USBA_VBUS / USBA_DP / USBA_DM | USB 2.0 FS transceiver | Dedicated USB port with battery charging detection (BC1.2), no external resistors required |
| SD0_CMD / SD0_CLK / SD0_DAT0–3 | SD host interface | 4-bit SD bus supporting high-speed mode (15 MB/s), SDIO v3.00, CRC7/CRC16 error checking |
| CAN0_TX / CAN0_RX | CAN channel 0 differential pair | ISO 11898-1 compliant; 32 mailbox buffers per channel; supports standard/extended frames up to 1 Mbps |
Key Features
| Feature | Design Value |
|---|---|
| IEEE 1588 Precision Time Protocol | Hardware timestamping engine (EPTPC) synchronized to dual Ethernet MACs for sub-microsecond time alignment in industrial automation |
| Event Link Controller (ELC) | 119 internal event signals routed without CPU intervention - e.g., TPU timer overflow triggers ADC conversion or GPIO toggle |
| Background Operation (BGO) | Simultaneous code flash programming/erasing while executing from other flash banks - enables seamless firmware updates |
| Hardware Cryptographic Acceleration | Dedicated AES/DES/SHA engines offload CPU during TLS handshake, secure boot, or encrypted OTA updates |
| IEC 60730 Class B Support | Integrated oscillation-stop detection, CRC calculation unit, IWDT windowing, A/D self-diagnostic, and register write protection |
| Flexible Clock Architecture | Independent clock domains (ICLK/PCLKA–D/FCLK/BCLK) allow peripherals like Ethernet (PCLKA), ADC (PCLKC/D), and SDRAM (BCLK) to run at optimal frequencies |
Applications
| Industrial Ethernet Gateway | Secure PLC Communication Module |
|---|---|
|
Use Scenario: Aggregating Modbus TCP, EtherNet/IP, and PROFINET traffic between legacy fieldbus devices and cloud SCADA systems. IC Role / Device Role / Timing Role: Dual Ethernet MAC with IEEE 1588 PTP serves as time-synchronized packet forwarding engine; hardware crypto secures firmware updates and TLS tunnels. Use Value: Eliminates need for external PHYs or crypto co-processors; deterministic latency under 5 µs for time-critical packet routing. |
Use Scenario: Retrofitting safety-certified PLCs with secure remote diagnostics, over-the-air configuration, and encrypted HMI communication. IC Role / Device Role / Timing Role: Acts as secure communications coprocessor - handles CAN/USB/SDHI I/O while enforcing IEC 60730 Class B runtime checks and AES-256 encrypted data logging. Use Value: Reduces certification effort via built-in self-test functions and tamper-resistant flash protection (trusted memory blocks 8–9). |
| Smart Energy Meter Hub | Automated Test Equipment Controller |
|
Use Scenario: Multi-utility meter aggregation node collecting AMI data via RF mesh, PLC, and cellular backhaul with local time synchronization. IC Role / Device Role / Timing Role: RTC with battery backup maintains accurate time stamping; dual Ethernet and USB provide redundant upstream links; temperature sensor compensates metrology ADC drift. Use Value: Meets ANSI C12.19 time accuracy requirements (<2 s/month drift) without external TCXO; 12-bit ADC self-calibration improves metering linearity. |
Use Scenario: Controlling mixed-signal test fixtures with synchronized analog stimulus generation, digital pattern capture, and real-time pass/fail analysis. IC Role / Device Role / Timing Role: Coordinates high-speed PDC camera input, 12-bit DAC waveform synthesis, and 12-bit ADC sampling using ELC-triggered DMA transfers - all timed to GPT/MTU3 PWM outputs. Use Value: Achieves <100 ns inter-channel skew between analog output and digital capture; eliminates FPGA logic for trigger distribution. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F566TEADFP#30 | Same RX64M family, 144-pin LFBGA, 2.5 MB flash, 384 KB SRAM, single Ethernet, no USB battery charging | Suitable for space-constrained edge nodes where dual Ethernet and USB BC are unnecessary | Select when BOM cost reduction and smaller footprint outweigh need for redundant Ethernet or fast-charging USB support |
| R5F572MHDDFC#V0 | RX72M family, 240 MHz, 4 MB flash, 1 MB SRAM, single Ethernet, enhanced motion control timers (MTU3+), no SDHI | Optimized for servo drives and robotics requiring higher PWM resolution and encoder interpolation | Choose for motor control applications needing >1 ns dead-time precision and 32-bit position capture - not for gateway/data hub roles |
Compared with R5F564MJGGFC#V1, the R5F566TEADFP#30 reduces peripheral count and package size for cost-sensitive deployments, while the R5F572MHDDFC#V0 trades dual Ethernet and SDHI for higher CPU throughput and advanced motion control IP - making R5F564MJGGFC#V1 uniquely balanced for time-aware industrial gateways.
Availability
R5F564MJGGFC#V1 is available at Aetrix Electronics and suitable for industrial gateways, secure PLC modules, smart energy meter hubs, and automated test equipment requiring stable component supply, long-term lifecycle assurance, and automotive-grade reliability.
Supply support for R5F564MJGGFC#V1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and infrastructure markets.
The RX64M Group - including R5F564MJGGFC#V1 - was designed for high-performance industrial networking applications demanding real-time determinism, functional safety compliance (IEC 60730), and hardware-accelerated security.
FAQ
What is the maximum operating frequency and CPU performance of the R5F564MJGGFC#V1?
The R5F564MJGGFC#V1 operates at a maximum frequency of 120 MHz using the RXv2 CPU core and delivers 240 DMIPS of processing performance. It includes a single-precision IEEE-754 floating-point unit and dual multiply-accumulate units, enabling efficient signal processing and control loop execution. The R5F564MJGGFC#V1 achieves this performance with zero-wait-state access to its 4 MB on-chip code flash memory.
Does the R5F564MJGGFC#V1 support IEEE 1588 Precision Time Protocol?
Yes, the R5F564MJGGFC#V1 integrates a dedicated IEEE 1588-compliant Precision Time Protocol controller (EPTPC) linked to both Ethernet MACs. This enables hardware timestamping of ingress/egress frames with sub-microsecond accuracy, essential for time-sensitive networking in industrial automation. The R5F564MJGGFC#V1 supports PTP profiles including IEEE 1588-2008 and IEEE 802.1AS.
What package type and pin count does the R5F564MJGGFC#V1 use?
The R5F564MJGGFC#V1 uses an 8 mm × 8 mm TFLGA package with 177 pins and a 0.5 mm pitch. It provides 127 general-purpose I/O pins, including 19 that are 5-V tolerant. This package is qualified for operation from –40°C to +105°C (G-version) and supports fine-pitch PCB assembly with high thermal and mechanical reliability.
How many Ethernet and CAN interfaces does the R5F564MJGGFC#V1 include?
The R5F564MJGGFC#V1 includes two IEEE 802.3-compliant Ethernet MACs (supporting 10/100 Mbps full/half-duplex) and three independent CAN modules compliant with ISO 11898-1. Each CAN module supports 32 mailboxes and both standard and extended frames up to 1 Mbps. The dual Ethernet capability enables redundant network paths or protocol bridging in gateway applications.
Is hardware cryptographic acceleration available on the R5F564MJGGFC#V1?
Yes, the R5F564MJGGFC#V1 includes dedicated hardware accelerators for AES (128/192/256-bit keys), DES/T-DES, and SHA-1/224/256/HMAC. These engines operate independently of the CPU, enabling high-throughput encryption for TLS, secure boot, and firmware signing without degrading real-time performance. Trusted memory protection further isolates critical flash blocks (8–9) from unauthorized read access.
R5F564MJGGFC#V1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 176-LQFP
- Series:
- RX
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, SCI, SPI, SSI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 127
- Program Memory Size:
- 3MB (3M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 64K x 8
- RAM Size:
- 512K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F564MJGGFC#V1 FAQ
1.How can I place an order for R5F564MJGGFC#V1 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F564MJGGFC#V1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F564MJGGFC#V1 reliable?
The price and inventory of R5F564MJGGFC#V1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F564MJGGFC#V1 is usually 5 days.
3.What payment methods are accepted for R5F564MJGGFC#V1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F564MJGGFC#V1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F564MJGGFC#V1?
R5F564MJGGFC#V1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F564MJGGFC#V1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F564MJGGFC#V1?
For technical support, including R5F564MJGGFC#V1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F564MJGGFC#V1 requirements.
6.How does Aetrix verify that R5F564MJGGFC#V1 is sourced from the original manufacturer or authorized distributors?
All R5F564MJGGFC#V1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F564MJGGFC#V1 meets industry standards.
7.What is the process for return or replacement of R5F564MJGGFC#V1?
All R5F564MJGGFC#V1 units undergo pre-shipment inspection (PSI). If there is an issue with R5F564MJGGFC#V1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F564MJGGFC#V1 part is unused and in its original packaging.
Return procedure for R5F564MJGGFC#V1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F564MJGGFC#V1 Tags
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