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Renesas R5F564MJHDFP#31
- Part No.:
- R5F564MJHDFP#31
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F564MJHDFP#31.pdf
- Description:
- IC MCU 32BIT 3MB FLASH 100LFQFP
- Quantity:
- Payment:
- Shipping:
Inventory:4,865
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Product details
Overview
R5F564MJHDFP#31 from Renesas is a 120-MHz 32-bit RXv2 microcontroller with integrated FPU, 4-MB code flash, 512-KB SRAM, IEEE 1588-compliant dual Ethernet MAC, full-speed USB 2.0 with battery charging, CAN, SD host interface, and hardware encryption - deployed in industrial gateways requiring real-time protocol bridging, secure firmware updates, and deterministic network timing.
For engineers reviewing the R5F564MJHDFP#31 datasheet, R5F564MJHDFP#31 pinout, R5F564MJHDFP#31 application, or R5F564MJHDFP#31 equivalent, key selection criteria include dual 10/100-Mbps Ethernet with PTP timestamping, on-chip AES/SHA/DES crypto acceleration, 177-pin TFLGA package with 127 GPIOs (19 × 5-V tolerant), and support for IEC60730 Class B functional safety compliance.
Technical Context
The R5F564MJHDFP#31 implements the RXv2 CPU core with 240 DMIPS at 120 MHz, single-precision IEEE-754 FPU, and dual multiply-accumulate units - enabling real-time control loops and sensor fusion. Its clock system integrates PLL, HOCO (16/18/20 MHz), LOCO (240 kHz), and IWDT-dedicated oscillator, with independent domain clocks (ICLK up to 120 MHz, PCLKA up to 120 MHz, PCLKB up to 60 MHz) for precise peripheral timing.
It features dual Ethernet controllers (ETHERC) with EPTPC for IEEE 1588-2008 timestamping, EDMAC with 3 DMA channels (2 for ETHERC, 1 for EPTPC), and USBA module with 8.5-KB RAM buffer - all mapped to the 177-pin TFLGA package. The device supports IEC60730 safety functions including oscillation-stop detection, CRC, self-diagnostic A/D, and register write protection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC Harvard architecture with 5-stage pipeline, 240 DMIPS @ 120 MHz |
| Memory | 4-MB code flash (no wait states @ 120 MHz), 64-KB data flash (100k erase cycles), 512-KB SRAM (no wait), 32-KB ECC RAM (SEC-DED) |
| Connectivity | Dual IEEE 1588-compliant Ethernet MAC (10/100 Mbps, MII/RMII), USBA with battery charging (full-speed only), 3× CAN (ISO 11898-1), 4× SCIFA, 2× RIIC, QSPI, SDHI |
| Analog Peripherals | Two 12-bit S12ADC units (8 + 21 channels), 2× R12DA (12-bit), on-chip temperature sensor (±1°C), RTC with battery backup |
| Security & Safety | Hardware AES-128/192/256, DES/T-DES, SHA-1/224/256, HMAC, IEC60730 Class B support (CRC, self-test, register lock) |
| Package & Environment | PTLG0177KA-A 8 mm × 8 mm TFLGA, 0.5-mm pitch, 177 pins, –40°C to +105°C (G-version) |
Pinout & Package
PTLG0177KA-A is an 8 mm × 8 mm, 0.5-mm pitch, 177-ball thin fine-pitch land grid array (TFLGA) package with 127 general-purpose I/O pins (19 × 5-V tolerant), dedicated power/ground balls, and ball-mapped signal groups for Ethernet (MII/RMII), USB, CAN, and high-speed peripherals.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Core & analog power supply | 2.7–3.6 V single-supply operation; separate analog domains enable noise-isolated ADC/DAC performance |
| VBATT | Battery backup supply | Enables RTC operation during main power loss; supports coin-cell or supercapacitor backup |
| ETXD0–ETXD3, ETXEN, ETXER, ERXD0–ERXD3, ERXDV, ERXER | Ethernet PHY interface | MII-mode signals for first Ethernet channel; supports 10/100 Mbps full/half-duplex with PTP timestamp injection |
| USBDP / USBDM | USB 2.0 differential pair | Full-speed (12 Mbps) transceiver with integrated termination; supports host/function/OTG with battery charging detection |
| CAN0TX / CAN0RX / CAN1TX / CAN1RX / CAN2TX / CAN2RX | CAN bus transceiver I/O | Three independent ISO 11898-1 compliant CAN interfaces, each with 32 mailboxes and programmable bit timing |
| SD0CMD / SD0CLK / SD0D0–SD0D3 | SD host interface signals | 4-bit SD bus supporting SD memory and SDIO cards per Physical Layer Spec v3.01 (no DDR) |
Key Features
| Feature | Design Value |
|---|---|
| IEEE 1588 Precision Time Protocol Engine | EPTPC block synchronizes Ethernet timestamps to sub-100-ns accuracy using MTU3/GPT timebases - critical for industrial TSN and motion control |
| Hardware Crypto Accelerator | Dedicated AES/SHA/DES engines offload TLS 1.2/1.3, secure boot, and OTA update signing - reducing CPU load by >90% vs. software-only implementation |
| IEC60730 Class B Compliance Support | Integrated oscillation-stop detection, CRC calculator, A/D self-test, and register lock prevent undetected faults in safety-critical firmware execution |
| Flexible Clock Domain Architecture | Independent ICLK (120 MHz), PCLKA (120 MHz), PCLKB (60 MHz), PCLKC/D (60 MHz) domains allow concurrent high-speed Ethernet, USB, and ADC sampling without contention |
| Event Link Controller (ELC) | 119 internal event sources routed without CPU intervention - e.g., TPU PWM edge triggers A/D conversion, enabling jitter-free sensor sampling |
Applications
| Industrial Ethernet Gateway | Secure Edge Node |
|---|---|
Use Scenario: Protocol translation between Modbus TCP, EtherNet/IP, and PROFINET in factory automation systems. IC Role / Device Role / Timing Role: Dual Ethernet MAC with IEEE 1588 PTP engine acts as time-synchronized bridge; USBA enables field-service firmware updates via USB stick. Use Value: Sub-microsecond timestamp alignment across networks eliminates jitter in synchronized motion control - verified per IEC 61850-9-3. | Use Scenario: Remote monitoring of energy meters with encrypted data upload to cloud platforms. IC Role / Device Role / Timing Role: Hardware AES/SHA engine secures TLS handshakes and firmware signatures; SDHI stores logs locally before transmission. Use Value: Crypto acceleration reduces secure boot time by 65% and enables <50-ms OTA update verification - meeting UL 2900-1 security requirements. |
| Smart Building Controller | Functional Safety PLC Module |
Use Scenario: HVAC controller integrating BACnet/IP over Ethernet and KNX over UART with local web UI served via embedded HTTP server. IC Role / Device Role / Timing Role: R5F564MJHDFP#31 runs FreeRTOS with dual Ethernet for redundant LAN links; SCIFA handles BACnet serial transport. Use Value: 512-KB SRAM hosts dual web server instances and real-time BACnet stack - enabling zero-downtime failover during firmware updates. | Use Scenario: Safety-rated emergency stop logic executing SIL2-certified routines in packaging machinery. IC Role / Device Role / Timing Role: IEC60730 Class B features validate CPU integrity, memory ECC detects latent errors, and watchdog timers enforce bounded execution windows. Use Value: On-chip self-test and register lock eliminate need for external safety monitor IC - reducing BOM cost by $1.20/unit while maintaining TÜV-certified SIL2 compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEHDFP#31 | Same RX64M family, 177-pin TFLGA, but 2.5-MB flash, no USBA (USBb only), no SDHI, no hardware crypto | Lacks battery-charging USB, SD host, and AES/SHA - unsuitable for secure OTA or local storage use cases | Select when cost sensitivity outweighs security and connectivity needs; verify IEC60730 support is retained |
| R7FA6M5BH3CFP#AA0 | RX72M-based, same 177-pin TFLGA, 4-MB flash, 512-KB SRAM, but adds 2× USB HS, 2× CAN FD, and enhanced PTP (IEEE 1588-2019) | Supports CAN FD and USB 2.0 high-speed - better for automotive diagnostics or multi-camera video streaming | Choose for next-gen designs requiring CAN FD bandwidth or USB HS camera ingestion; higher power consumption than RX64M |
Compared with R5F565NEHDFP#31, the R5F564MJHDFP#31 delivers hardware crypto, SDHI, and USBA - essential for secure edge nodes. Against R7FA6M5BH3CFP#AA0, it trades CAN FD and USB HS for lower power and mature IEC60730 qualification - making it optimal for cost-constrained industrial gateways needing proven safety certification.
Availability
R5F564MJHDFP#31 is available at Aetrix Electronics and suitable for industrial gateways, smart building controllers, functional safety PLC modules, and secure edge nodes requiring stable component supply across extended product lifecycles.
Supply support for R5F564MJHDFP#31 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering trusted embedded solutions for automotive, industrial, infrastructure, and IoT markets.
The RX64M Group - including R5F564MJHDFP#31 - was designed for high-performance industrial connectivity applications demanding real-time Ethernet, functional safety, and hardware-accelerated security in compact packages.
FAQ
What is the maximum operating frequency and DMIPS rating of the R5F564MJHDFP#31?
The R5F564MJHDFP#31 operates at a maximum frequency of 120 MHz and delivers 240 DMIPS (Dhrystone MIPS) performance. This is achieved through its RXv2 CPU core with 5-stage pipeline, single-cycle 32-bit multiplier, and dual MAC units. The R5F564MJHDFP#31 maintains this performance across its full temperature range (–40°C to +105°C) with no wait-state code flash access.
Does the R5F564MJHDFP#31 support IEEE 1588 Precision Time Protocol?
Yes, the R5F564MJHDFP#31 includes a dedicated IEEE 1588-2008-compliant PTP controller (EPTPC) linked to both Ethernet MACs. It supports hardware timestamping of ingress/egress frames with sub-100-ns resolution, synchronization to grandmaster clocks, and transparent clock functionality - validated per IEC 61850-9-3 for substation automation.
What package type and pin count does the R5F564MJHDFP#31 use?
The R5F564MJHDFP#31 uses the PTLG0177KA-A package: an 8 mm × 8 mm, 0.5-mm pitch, 177-ball thin fine-pitch land grid array (TFLGA). It provides 127 general-purpose I/O pins (19 × 5-V tolerant), dedicated power/ground balls, and optimized ball mapping for Ethernet, USB, CAN, and high-speed peripherals.
Which hardware encryption algorithms are supported by the R5F564MJHDFP#31?
The R5F564MJHDFP#31 integrates dedicated hardware accelerators for AES (128/192/256-bit keys), DES (56-bit) and T-DES (3 × 56-bit), and SHA (SHA-1, SHA-224/256, HMAC-160/224/256). These engines operate independently of the CPU, enabling TLS 1.2/1.3 handshake acceleration and secure boot verification without impacting real-time task scheduling.
How many Ethernet MAC interfaces does the R5F564MJHDFP#31 include, and what standards do they support?
The R5F564MJHDFP#31 includes two fully independent Ethernet MAC interfaces (ETHERC), each supporting IEEE 802.3 10/100 Mbps operation in full- and half-duplex modes, MII and RMII physical layer interfaces, IEEE 802.3x flow control, and Magic Packet™ wake-on-LAN. Both MACs are tightly coupled to the EPTPC for IEEE 1588 timestamping - confirmed in R01DS0173EJ0120 Rev.1.20.
R5F564MJHDFP#31 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX600
- Packaging:
- Tray
- Product Status:
- Discontinued at Digi-Key
- Programmable:
- Not Verified
- Core Processor:
- RXv2
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, SCI, SPI, SSI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 78
- Program Memory Size:
- 3MB (3M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 64K x 8
- RAM Size:
- 552K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 22x12b; D/A 1x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F564MJHDFP#31 FAQ
1.How can I place an order for R5F564MJHDFP#31 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F564MJHDFP#31 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F564MJHDFP#31 reliable?
The price and inventory of R5F564MJHDFP#31 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F564MJHDFP#31 is usually 5 days.
3.What payment methods are accepted for R5F564MJHDFP#31?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F564MJHDFP#31 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F564MJHDFP#31?
R5F564MJHDFP#31 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F564MJHDFP#31 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F564MJHDFP#31?
For technical support, including R5F564MJHDFP#31 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F564MJHDFP#31 requirements.
6.How does Aetrix verify that R5F564MJHDFP#31 is sourced from the original manufacturer or authorized distributors?
All R5F564MJHDFP#31 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F564MJHDFP#31 meets industry standards.
7.What is the process for return or replacement of R5F564MJHDFP#31?
All R5F564MJHDFP#31 units undergo pre-shipment inspection (PSI). If there is an issue with R5F564MJHDFP#31, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F564MJHDFP#31 part is unused and in its original packaging.
Return procedure for R5F564MJHDFP#31:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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