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Renesas R5F564MLCDLC#21
- Part No.:
- R5F564MLCDLC#21
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 177-TFLGA
- Datasheet:
-
R5F564MLCDLC#21.pdf
- Description:
- IC MCU 32BIT 4MB FLASH 177TFLGA
- Quantity:
- Payment:
- Shipping:
Inventory:319
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Product details
Overview
R5F564MLCDLC#21 from Renesas is a 120-MHz 32-bit RXv2 microcontroller with integrated FPU, 4 MB code flash, 512 KB SRAM, IEEE 1588-compliant dual Ethernet MAC, full-speed USB 2.0 with battery charging, CAN (3 channels), and 12-bit A/D (29 total channels). It targets industrial networking gateways requiring deterministic real-time control, secure firmware updates, and multi-protocol connectivity.
For engineers reviewing the R5F564MLCDLC#21 datasheet, R5F564MLCDLC#21 pinout, R5F564MLCDLC#21 application, or R5F564MLCDLC#21 equivalent, key selection criteria include its 177-pin TFLGA package, dual Ethernet + USB + CAN coexistence, 120 MHz real-time performance with 240 DMIPS, and hardware-accelerated AES/SHA encryption for IEC 60730 Class B compliance.
Technical Context
The R5F564MLCDLC#21 implements the RXv2 CPU core with CISC Harvard architecture, 5-stage pipeline, and variable-length instructions enabling ultra-compact code. It integrates dual independent Ethernet controllers (ETHERC) with IEEE 1588 PTP support via EPTPC and dedicated EDMAC channels - one channel per ETHERC plus one for EPTPC - enabling time-synchronized packet timestamping without CPU intervention.
Its clock system combines external crystal (8–24 MHz), internal HOCO (16/18/20 MHz), LOCO (240 kHz), and PLL to generate independent clocks: ICLK up to 120 MHz for CPU, PCLKA up to 120 MHz for high-speed peripherals (Ethernet, USB, AES), and PCLKB up to 60 MHz for timers and ADC. The device supports four low-power modes and RTC operation from VBATT during deep software standby.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit, 120 MHz max, 240 DMIPS, IEEE-754 single-precision FPU |
| Memory | 4 MB code flash (no wait states at 120 MHz), 64 KB data flash (100k write cycles), 512 KB SRAM, 32 KB ECC RAM |
| Connectivity | Dual IEEE 1588 Ethernet MAC, USB 2.0 FS with battery charging, 3× CAN, 9× SCI, 4× SCIFA, 2× I2C, QSPI, SDHI |
| Analog | Two 12-bit S12ADC units (8 + 21 channels), 2× 12-bit R12DA, on-chip temperature sensor (±1°C) |
| Timers & Control | 29 extended timers including MTU3a (9-channel), GPTA (4-channel), TPUa (6-channel), IWDTa, RTC with battery backup |
| Security & Compliance | AES-128/192/256, DES/T-DES, SHA-1/224/256, HMAC, CRC, self-diagnostic A/D, register write protection for IEC 60730 |
| Package & Environment | PTLG0177KA-A 177-pin TFLGA (8 mm × 8 mm, 0.5 mm pitch), –40°C to +105°C (G-version) |
Pinout & Package
Package: PTLG0177KA-A - 177-pin Thin Fine-Pitch Land Grid Array (TFLGA), 8 mm × 8 mm body, 0.5 mm pitch, 0.75 mm height, RoHS-compliant, lead-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Power supply inputs | Core (2.7–3.6 V), analog unit 0, analog unit 1 - separate domains enable noise isolation for ADC/DAC |
| VBATT | Battery backup supply | Provides power to RTC during main VCC dropout; enables calendar/timekeeping in deep software standby |
| XTAL / EXTAL | Main crystal oscillator terminals | Supports 8–24 MHz external crystal for precise system clock; required for Ethernet PHY timing and USB accuracy |
| MDIO / MDC | PHY management interface | IEEE 802.3-compliant serial interface to configure external Ethernet PHY devices (e.g., DP83848) |
| ETXD0–ETXD3 / ETXEN / ETXER / ERXD0–ERXD3 / ERXDV / ERXER | Ethernet MII signals | Full MII interface for 10/100 Mbps Ethernet; supports both MII and RMII via configuration; dual-channel routing enables redundant or bridged LAN |
| USBDP / USBDM | USB 2.0 differential data pair | Full-speed (12 Mbps) USB transceiver pins; integrated pull-ups eliminate external components; supports host/function/OTG |
| CANH / CANL | CAN bus differential pair (per channel) | Three independent ISO 11898-1 compliant CAN interfaces; each supports 32 mailboxes and bit rates up to 1 Mbps |
Key Features
| Feature | Design Value |
|---|---|
| Dual IEEE 1588 Ethernet MAC | Enables time-synchronized industrial Ethernet (e.g., EtherCAT slave, PROFINET IRT) with hardware timestamping and PTP event message handling |
| USB 2.0 FS with Battery Charging | Supports BC 1.2 charging detection and D+/- handshake - allows embedded host to charge connected peripherals without external IC |
| Hardware Crypto Acceleration | AES/SHA/DES engines operate independently of CPU; accelerate secure boot, OTA firmware signing, and TLS stack offload |
| IEC 60730 Safety Support | Includes oscillation-stop detection, CRC calculation unit, IWDTa windowing, A/D self-test, and register lock bits - reduces Class B certification effort |
| Event Link Controller (ELC) | 119 internal event signals routed without CPU involvement - e.g., trigger ADC conversion on PWM edge, start timer on CAN RX, or toggle GPIO on interrupt |
Applications
| Industrial Ethernet Gateway | Secure PLC Communication Module |
|---|---|
|
Use Scenario: Aggregating Modbus RTU fieldbus data and forwarding over EtherNet/IP or PROFINET to SCADA systems. IC Role / Device Role / Timing Role: Primary controller managing dual Ethernet ports (one for upstream plant network, one for downstream field network), USB for configuration, and CAN for legacy device bridging. Use Value: Hardware PTP timestamping ensures sub-microsecond synchronization across distributed I/O; 120 MHz real-time response handles protocol translation with <50 µs latency. |
Use Scenario: Embedded communication module in modular PLC backplanes supporting secure firmware updates and diagnostics. IC Role / Device Role / Timing Role: Secure co-processor handling encrypted OTA updates, certificate validation, and runtime integrity checks while main CPU executes ladder logic. Use Value: On-chip AES-256 and SHA-256 acceleration reduce update verification time by >90% vs. software-only; ECC RAM prevents silent corruption in safety-critical memory. |
| Energy Meter with Multi-Protocol Support | Building Automation Controller |
|
Use Scenario: Smart electricity meter communicating via DLMS/COSEM over PLC (via CAN), RF mesh (via UART + external transceiver), and cellular backhaul (via USB-connected modem). IC Role / Device Role / Timing Role: Central protocol translator with isolated CAN, multiple SCIFA/SCI for RS-485/RS-232, and USB host for 3G/LTE modems. Use Value: 9-channel SCIg + 4-channel SCIFA + 3× CAN provides concurrent physical layer support; 16-byte SCIFA FIFOs prevent overrun in bursty AMI traffic. |
Use Scenario: BACnet MS/TP-to-BACnet/IP gateway in HVAC controllers connecting legacy chillers to cloud-based building management systems. IC Role / Device Role / Timing Role: Real-time protocol converter with deterministic timer-triggered CAN frame scheduling and Ethernet packet assembly. Use Value: MTU3a complementary PWM outputs drive fan speed control; GPTA synchronized timers ensure precise 100-ms BACnet polling intervals across all 32 MS/TP nodes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEDFC#30 | Same RX65N Group; 120 MHz, 2 MB flash, 384 KB SRAM, single Ethernet, no USB battery charging | Lacks dual Ethernet and USB BC 1.2; supports only one ETHERC channel and standard USB (no charging) | Select when cost-sensitive designs require single-network redundancy and omit peripheral charging capability |
| R7FA6M2AF3CFP#AA0 | RX72M Group; 240 MHz, 2 MB flash, 384 KB SRAM, single Ethernet, USB HS, no CAN FD | Higher CPU speed but reduced peripheral count; USB 2.0 high-speed (480 Mbps) instead of FS + BC; no CAN FD support | Choose for compute-intensive motion control where USB camera streaming outweighs multi-CAN needs |
Compared with R5F564MLCDLC#21, the R5F565NEDFC#30 offers lower BOM cost and smaller footprint but sacrifices dual-Ethernet determinism and USB charging; the R7FA6M2AF3CFP#AA0 delivers higher throughput for vision tasks yet lacks the CAN/Ethernet coexistence critical for industrial gateways.
Availability
R5F564MLCDLC#21 is available at Aetrix Electronics and suitable for industrial Ethernet gateways, secure PLC communication modules, energy metering systems, and building automation controllers requiring stable component supply across long product lifecycles.
Supply support for R5F564MLCDLC#21 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RX64M Group - including R5F564MLCDLC#21 - was designed for high-reliability industrial networking applications demanding real-time determinism, multi-protocol connectivity, and functional safety certification support.
FAQ
What is the maximum operating frequency and CPU architecture of the R5F564MLCDLC#21?
The R5F564MLCDLC#21 operates at a maximum frequency of 120 MHz using the 32-bit RXv2 CPU core with CISC Harvard architecture, 5-stage pipeline, and variable-length instructions. It delivers 240 DMIPS and includes a single-precision IEEE-754 floating-point unit. This architecture enables deterministic real-time execution critical for industrial control loops and protocol stacks running on the R5F564MLCDLC#21.
Does the R5F564MLCDLC#21 support IEEE 1588 Precision Time Protocol?
Yes, the R5F564MLCDLC#21 integrates a dedicated PTP controller (EPTPC) linked to both Ethernet MACs, enabling hardware timestamping of PTP event messages at the physical layer. It supports one-step and two-step clock synchronization, transparent clock operation, and timestamp insertion/removal - all without CPU overhead. This makes the R5F564MLCDLC#21 suitable for time-critical industrial Ethernet implementations like EtherCAT and PROFINET IRT.
How many Ethernet and CAN interfaces does the R5F564MLCDLC#21 provide?
The R5F564MLCDLC#21 features two independent IEEE 802.3-compliant Ethernet MACs (ETHERC) and three ISO 11898-1-compliant CAN modules, each with 32 mailboxes. This dual-Ethernet + triple-CAN capability allows simultaneous operation of redundant networks, protocol bridging (e.g., CAN-to-Ethernet), or segregated traffic domains - a key differentiator of the R5F564MLCDLC#21 in gateway applications.
What security features are included in the R5F564MLCDLC#21 for IEC 60730 compliance?
The R5F564MLCDLC#21 includes hardware-assisted IEC 60730 Class B compliance features: oscillation-stop detection, CRC calculation unit, windowed independent watchdog timer (IWDTa), A/D converter self-diagnostic function, and register write protection. These features are implemented in silicon and documented in Renesas' Functional Safety Manual for RX64M, reducing validation effort for the R5F564MLCDLC#21 in safety-critical industrial equipment.
What is the package type and pin count of the R5F564MLCDLC#21?
The R5F564MLCDLC#21 uses the PTLG0177KA-A package: a 177-pin Thin Fine-Pitch Land Grid Array with 8 mm × 8 mm body size, 0.5 mm pitch, and 0.75 mm height. This compact, high-I/O-count package supports the full peripheral set - including dual Ethernet MII, USB, CAN, and 127 general-purpose I/O pins - making it ideal for space-constrained industrial control modules using the R5F564MLCDLC#21.
R5F564MLCDLC#21 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 177-TFLGA
- Series:
- RX600
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RXv2
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, SCI, SPI, SSI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 127
- Program Memory Size:
- 4MB (4M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 64K x 8
- RAM Size:
- 552K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F564MLCDLC#21 FAQ
1.How can I place an order for R5F564MLCDLC#21 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F564MLCDLC#21 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F564MLCDLC#21 reliable?
The price and inventory of R5F564MLCDLC#21 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F564MLCDLC#21 is usually 5 days.
3.What payment methods are accepted for R5F564MLCDLC#21?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F564MLCDLC#21 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F564MLCDLC#21?
R5F564MLCDLC#21 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F564MLCDLC#21 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F564MLCDLC#21?
For technical support, including R5F564MLCDLC#21 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F564MLCDLC#21 requirements.
6.How does Aetrix verify that R5F564MLCDLC#21 is sourced from the original manufacturer or authorized distributors?
All R5F564MLCDLC#21 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F564MLCDLC#21 meets industry standards.
7.What is the process for return or replacement of R5F564MLCDLC#21?
All R5F564MLCDLC#21 units undergo pre-shipment inspection (PSI). If there is an issue with R5F564MLCDLC#21, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F564MLCDLC#21 part is unused and in its original packaging.
Return procedure for R5F564MLCDLC#21:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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