Renesas R5F564MLCGFC#V1
- Part No.:
- R5F564MLCGFC#V1
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 176-LQFP
- Datasheet:
-
R5F564MLCGFC#V1.pdf
- Description:
- IC MCU 32BIT 4MB FLASH 176LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,856
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F564MLCGFC#V1 from Renesas is a 32-bit RXv2 core microcontroller operating at up to 120 MHz (240 DMIPS), featuring 4 MB on-chip code flash, 512 KB SRAM, IEEE 1588-compliant dual Ethernet MAC, full-speed USB 2.0 with battery charging support, and integrated 12-bit A/D and D/A converters - deployed in industrial automation gateways requiring real-time protocol handling and secure connectivity.
For engineers reviewing the R5F564MLCGFC#V1 datasheet, R5F564MLCGFC#V1 pinout, R5F564MLCGFC#V1 application, or R5F564MLCGFC#V1 equivalent, this page delivers verified specifications, package mapping to PLQP0176KB-A (176-pin LQFP), functional pin roles, IEC60730-ready safety features, and validated alternative MCUs for migration or second-sourcing - all grounded in Renesas R01DS0173EJ0120 Rev.1.20 documentation.
Technical Context
The R5F564MLCGFC#V1 implements the RXv2 CPU core with CISC Harvard architecture, 5-stage pipeline, and variable-length instructions enabling ultra-compact code density. It integrates dual Ethernet controllers (ETHERC) with IEEE 1588 PTP timing, EPTPC hardware timestamping, and EDMAC with 3-channel DMA - optimized for deterministic networked control systems.
Its clock system combines external crystal (8–24 MHz) with internal PLL and multiple on-chip oscillators (LOCO, HOCO, IWDT-dedicated), allowing independent domain clocking: ICLK up to 120 MHz, PCLKA up to 120 MHz for high-speed peripherals, and PCLKB up to 60 MHz for timers and ADCs - enabling precise power/performance trade-offs across low-power and real-time domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC core with 5-stage pipeline, 240 DMIPS @ 120 MHz - enables high-throughput deterministic execution for real-time control loops. |
| Flash Memory | 4 MB code flash, zero-wait-state access @ 120 MHz - supports large firmware images and background programming without halting execution. |
| RAM | 512 KB SRAM (no wait states), 32 KB ECC RAM (SEC-DED), 8 KB standby RAM - ensures data integrity and retention during deep software standby. |
| Ethernet | Dual IEEE 1588-compliant MAC with MII/RMII, 10/100 Mbps, PTP timestamping, and cut-through forwarding - meets precision time synchronization requirements in industrial Ethernet protocols. |
| USB | Full-speed USB 2.0 host/function with battery charging support (USBA), 8.5 KB buffer - enables direct peripheral charging and embedded host functionality without external PHY. |
| A/D Converter | Two 12-bit S12ADC units (8 + 21 channels), 0.48 µs conversion time, self-diagnostic and disconnection detection - provides high-resolution analog sensing with built-in functional safety checks. |
| Operating Temp | –40°C to +105°C (G-version) - qualified for under-hood automotive and harsh industrial environments without derating. |
Pinout & Package
Package: PLQP0176KB-A, 176-pin LQFP (24 × 24 mm, 0.5 mm pitch), RoHS-compliant, lead-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Power supply inputs | Single 2.7–3.6 V supply domain; AVCC0/AVCC1 separately decoupled for analog subsystem stability. |
| XTAL / EXTAL | Main clock oscillator terminals | Supports 8–24 MHz crystal resonator for precise system timing and IEEE 1588 synchronization reference. |
| ETH_MDC / ETH_MDIO | MDIO management interface | Enables configuration and status monitoring of external PHY devices via IEEE 802.3 clause 22. |
| ETH_TXD0–3 / ETH_RXD0–3 | Ethernet data lanes | 4-bit transmit/receive data bus for MII mode; supports RMII with reduced pin count when configured accordingly. |
| USB_VBUS / USB_DP / USB_DM | USB 2.0 physical interface | Integrated transceiver with VBUS sensing - eliminates need for external USB PHY and enables battery charging detection. |
| AD00–AD28 | Analog input channels | 29 total A/D inputs distributed across two S12ADC units - supports simultaneous sampling of multi-sensor industrial feedback signals. |
Key Features
| Feature | Design Value |
|---|---|
| IEEE 1588 Hardware Timestamping | Integrated EPTPC block synchronizes Ethernet frame timestamps to sub-microsecond accuracy - essential for TSN and PROFINET IRT implementations. |
| IEC60730 Safety Support | On-chip oscillation-stop detection, CRC calculation unit, IWDT with window function, and A/D self-diagnostic - reduces external safety component count for Class B certification. |
| Secure Cryptographic Engine | Optional AES-128/192/256, DES/T-DES, and SHA-1/224/256 acceleration - enables secure boot, firmware signing, and encrypted communication without software overhead. |
| Event Link Controller (ELC) | 119 internal event signals routed without CPU intervention - allows autonomous peripheral chaining (e.g., timer-triggered ADC capture → DMA transfer → interrupt). |
| SD Host Interface (SDHI) | 1-channel SD/SDIO controller supporting 4-bit bus, high-speed mode (15 MB/s), and CRC7/CRC16 error checking - enables local firmware updates and data logging on removable media. |
Applications
| Industrial Ethernet Gateway | Smart Energy Metering Hub |
|---|---|
|
Use Scenario: Aggregating Modbus TCP, EtherNet/IP, and PROFINET traffic between field devices and cloud SCADA systems. IC Role / Device Role / Timing Role: Dual Ethernet MAC with IEEE 1588 PTP serves as time-synchronized protocol bridge; USBA enables USB-based configuration and firmware updates. Use Value: Hardware-accelerated timestamping and deterministic packet forwarding eliminate jitter in time-critical industrial networks. |
Use Scenario: Multi-tariff electricity meter with grid synchronization, tamper detection, and remote firmware upgrade over cellular backhaul. IC Role / Device Role / Timing Role: RTC with battery backup maintains accurate billing time; 12-bit A/D converters digitize current/voltage sensors; SDHI stores usage logs. Use Value: Integrated ECC RAM and IEC60730 diagnostics ensure long-term reliability and regulatory compliance in unattended deployments. |
| Automotive Diagnostic Tool | Factory Automation PLC Controller |
|
Use Scenario: Handheld OBD-II scanner supporting CAN FD, UDS, and DoIP protocols with USB-C host interface. IC Role / Device Role / Timing Role: Triple CAN modules handle diagnostic, infotainment, and powertrain buses simultaneously; USBA powers and communicates with PC/laptop. Use Value: 32-mailbox per CAN channel enables concurrent message filtering and prioritization without CPU load. |
Use Scenario: Compact PLC running ladder logic with analog I/O expansion, motion control outputs, and EtherCAT slave interface. IC Role / Device Role / Timing Role: MTU3a and GPTA generate synchronized PWM waveforms for servo drives; parallel data capture unit interfaces with vision sensors. Use Value: On-chip 512 KB SRAM buffers real-time I/O data while 4 MB flash hosts runtime engine and user program. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEDDFC#V1 | Same RX65N Group, 176-pin LQFP, but adds TrustZone-based secure boot and enhanced crypto (AES-GCM, RSA), no IEEE 1588 PTP block. | Better suited for secure IoT edge nodes requiring certified secure boot; lacks hardware timestamping needed for industrial Ethernet master roles. | Select when security certification (e.g., PSA Level 2) outweighs precision timing; not drop-in for PTP-dependent designs. |
| R7FA6M2AF3CFP#AA0 | RX72M Group, 176-pin LQFP, 240 MHz CPU, single Ethernet MAC, no USBA (only USBb), adds 3D graphics accelerator. | Higher performance for HMI rendering; limited networking capability - only one Ethernet port and no battery charging USB. | Choose for display-rich HMIs with basic connectivity; insufficient for dual-Ethernet gateway use cases. |
Compared with R5F564MLCGFC#V1, R5F565NEDDFC#V1 trades IEEE 1588 PTP for advanced security features, while R7FA6M2AF3CFP#AA0 increases CPU speed and adds graphics but reduces Ethernet and USB capabilities - making R5F564MLCGFC#V1 uniquely balanced for time-sensitive industrial gateways requiring both dual Ethernet and USB charging.
Availability
R5F564MLCGFC#V1 is available at Aetrix Electronics and suitable for industrial Ethernet gateways, smart energy meters, automotive diagnostic tools, and factory automation PLC controllers requiring stable component supply, long lifecycle assurance, and full technical documentation support.
Supply support for R5F564MLCGFC#V1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a Japanese semiconductor manufacturer specializing in microcontrollers, analog, and power management ICs for industrial, automotive, and infrastructure markets.
The RX64M Group, including R5F564MLCGFC#V1, was designed for high-performance industrial connectivity applications demanding real-time Ethernet, functional safety, and secure firmware execution in extended temperature environments.
FAQ
What is the maximum operating frequency and CPU performance of the R5F564MLCGFC#V1?
The R5F564MLCGFC#V1 operates at a maximum frequency of 120 MHz and delivers 240 DMIPS of processing performance using the RXv2 CPU core. Its 5-stage pipeline, single-cycle 32-bit multiplier, and floating-point unit enable deterministic real-time execution - critical for industrial control loops and protocol stacks running on the R5F564MLCGFC#V1.
Does the R5F564MLCGFC#V1 support IEEE 1588 Precision Time Protocol?
Yes, the R5F564MLCGFC#V1 includes a dedicated EPTPC (Ethernet PTP Controller) block compliant with IEEE 1588-2008, enabling hardware timestamping of Ethernet frames with sub-microsecond accuracy. This feature is integral to the dual ETHERC modules and is fully supported in the R5F564MLCGFC#V1's silicon - essential for TSN, PROFINET IRT, and other time-sensitive industrial networks.
What package type and pin count does the R5F564MLCGFC#V1 use?
The R5F564MLCGFC#V1 uses the PLQP0176KB-A package: a 176-pin LQFP measuring 24 × 24 mm with 0.5 mm pitch. This package supports all 127 general-purpose I/O pins, dual Ethernet interfaces, USB, CAN, and high-speed serial peripherals - matching the full feature set documented in Renesas R01DS0173EJ0120 Rev.1.20 for the 176-pin RX64M variant.
How much on-chip memory does the R5F564MLCGFC#V1 include?
The R5F564MLCGFC#V1 integrates 4 MB of code flash memory (zero-wait-state at 120 MHz), 512 KB of general SRAM, 32 KB of ECC-protected RAM (SEC-DED), and 8 KB of battery-backed standby RAM. These memory resources are physically mapped and verified in the device's memory map - enabling robust firmware execution, real-time data buffering, and fail-safe state retention in the R5F564MLCGFC#V1.
Is the R5F564MLCGFC#V1 qualified for automotive or industrial temperature ranges?
Yes, the R5F564MLCGFC#V1 is the G-version part, rated for operation from –40°C to +105°C - qualified for under-hood automotive ECUs, motor drives, and industrial control panels exposed to elevated ambient temperatures. This rating is specified in Table 1.2 of R01DS0173EJ0120 Rev.1.20 and applies directly to the R5F564MLCGFC#V1 device marking.
R5F564MLCGFC#V1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 176-LQFP
- Series:
- RX
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, SCI, SPI, SSI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 127
- Program Memory Size:
- 4MB (4M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 64K x 8
- RAM Size:
- 512K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F564MLCGFC#V1 FAQ
1.How can I place an order for R5F564MLCGFC#V1 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F564MLCGFC#V1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F564MLCGFC#V1 reliable?
The price and inventory of R5F564MLCGFC#V1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F564MLCGFC#V1 is usually 5 days.
3.What payment methods are accepted for R5F564MLCGFC#V1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F564MLCGFC#V1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F564MLCGFC#V1?
R5F564MLCGFC#V1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F564MLCGFC#V1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F564MLCGFC#V1?
For technical support, including R5F564MLCGFC#V1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F564MLCGFC#V1 requirements.
6.How does Aetrix verify that R5F564MLCGFC#V1 is sourced from the original manufacturer or authorized distributors?
All R5F564MLCGFC#V1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F564MLCGFC#V1 meets industry standards.
7.What is the process for return or replacement of R5F564MLCGFC#V1?
All R5F564MLCGFC#V1 units undergo pre-shipment inspection (PSI). If there is an issue with R5F564MLCGFC#V1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F564MLCGFC#V1 part is unused and in its original packaging.
Return procedure for R5F564MLCGFC#V1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F564MLCGFC#V1 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

