Renesas R5F564MLDGFP#V1
- Part No.:
- R5F564MLDGFP#V1
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F564MLDGFP#V1.pdf
- Description:
- IC MCU 32BIT 4MB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,873
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Product details
Overview
R5F564MLDGFP#V1 from Renesas is a 120-MHz 32-bit RXv2 MCU with integrated FPU, 4-MB code flash, 512-KB SRAM, IEEE 1588-compliant dual Ethernet MAC, full-speed USB 2.0 with battery charging, CAN (3 channels), and 12-bit A/D (29 total channels). It serves as the main application processor in industrial gateways requiring real-time networking, secure firmware updates, and analog sensor interfacing.
For engineers reviewing the R5F564MLDGFP#V1 datasheet, R5F564MLDGFP#V1 pinout, R5F564MLDGFP#V1 application, or R5F564MLDGFP#V1 equivalent, key selection criteria include its 176-pin LFBGA package (PLQP0176KB-A), dual Ethernet + PTP timing capability, on-chip AES/SHA encryption, and support for IEC60730 functional safety diagnostics - all verified in Rev.1.20 of R01DS0173EJ0120.
Technical Context
The R5F564MLDGFP#V1 implements the RXv2 CPU core with CISC Harvard architecture, 5-stage pipeline, and variable-length instructions enabling ultra-compact code density. It integrates dual independent Ethernet controllers (ETHERC) with dedicated EPTPC hardware for IEEE 1588 timestamping and EDMAC DMA channels optimized for zero-copy frame handling.
Its clock system supports simultaneous operation at multiple domains: ICLK up to 120 MHz for CPU execution, PCLKA up to 120 MHz for Ethernet/USB/AES, and PCLKB up to 60 MHz for timers and ADCs. The device includes three independent A/D units (S12AD0: 8ch, S12AD1: 21ch), each with configurable sample-and-hold, self-diagnostic voltage generation, and digital comparison logic tied to ELC event linking.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit, 120 MHz max, 240 DMIPS, IEEE-754 single-precision FPU |
| Memory | 4 MB code flash (no wait states @120 MHz), 64 KB data flash (100k erase cycles), 512 KB SRAM (no wait), 32 KB ECC RAM |
| Connectivity | Dual IEEE 1588 Ethernet MAC + EPTPC, USB 2.0 FS with battery charging, 3× CAN (ISO11898-1), 9× SCI, 4× SCIFA, 2× RIIC, QSPI, SDHI |
| Analog | Two 12-bit A/D converters (8 + 21 channels), 2× 12-bit D/A outputs, on-die temperature sensor (±1°C) |
| Security | Optional AES-128/192/256, DES/TDES, SHA-1/224/256, HMAC, trusted memory protection for flash blocks 8–9 |
| Package | 176-pin LFBGA (PLQP0176KB-A), 24 × 24 mm, 0.5-mm pitch, –40°C to +105°C (G-version) |
| Power & Safety | 2.7–3.6 V supply, 0.3 mA/MHz typical active current, four low-power modes, IEC60730 compliance features including oscillation-stop detection and CRC |
Pinout & Package
Package: PLQP0176KB-A - 176-pin Low-Profile Fine-Pitch Ball Grid Array, 24 mm × 24 mm, 0.5-mm ball pitch, RoHS-compliant, lead-free, moisture sensitivity level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, AVCC0, AVCC1 | Core & analog power supplies | Separate 2.7–3.6 V domains for digital logic and analog peripherals; AVCC1 powers A/D and D/A converters |
| VBATT | Battery backup supply | Enables RTC operation during main power loss; connects to coin-cell or supercapacitor |
| XTAL/EXTAL | Main crystal oscillator inputs | Supports 8–24 MHz external crystal for precise system clock and Ethernet timing reference |
| ETH_MDC/MDIO | IEEE 802.3 management interface | Provides PHY register access for auto-negotiation, link status, and error monitoring |
| ETXD0–7 / ERXD0–7 | Ethernet transmit/receive data bus | 8-bit parallel MII interface per channel; supports RMII via pin multiplexing |
| USBDP/USBDM | USB 2.0 full-speed differential pair | Integrated transceiver eliminates need for external PHY; supports battery charging detection (BC1.2) |
| CANH/CANL | CAN physical layer differential signals | Three independent CAN channels; each requires external termination and isolated transceiver |
| SD0DAT0–3 / SD0CMD / SD0CLK | SD host interface signals | 4-bit SD bus supporting SD memory and SDIO cards up to 15 MB/s (high-speed mode) |
Key Features
| Feature | Design Value |
|---|---|
| IEEE 1588 Precision Time Protocol Hardware | Dedicated EPTPC block synchronizes time stamps to sub-microsecond accuracy across dual Ethernet ports without CPU overhead |
| Background Operation (BGO) | Simultaneous flash programming/erasing while executing code from other memory regions - critical for OTA firmware updates |
| Event Link Controller (ELC) | 119 internal event signals routed without CPU intervention - enables deterministic timer-triggered ADC sampling or PWM dead-time insertion |
| IEC60730 Safety Support | Hardware CRC engine, oscillation-stop detection, A/D self-test voltages, register write protection - reduces certification effort for Class B appliances |
| Flexible Clock Domain Partitioning | Independent ICLK, PCLKA/B/C/D, FCLK, BCLK domains allow optimal power/performance trade-offs per peripheral subsystem |
Applications
| Industrial Ethernet Gateway | Secure PLC Communication Module |
|---|---|
Use Scenario: Aggregating Modbus TCP, EtherNet/IP, and PROFINET traffic between field devices and cloud SCADA systems. IC Role / Device Role / Timing Role: Primary application processor running real-time OS; dual Ethernet MACs handle concurrent protocol stacks with IEEE 1588 synchronization for deterministic cycle times. Use Value: Eliminates external PHY and timing ICs; PTP hardware ensures <1 µs timestamp jitter across both ports for synchronized control loops. | Use Scenario: Field-upgradable communication module for legacy PLCs adding TLS-secured MQTT or HTTPS connectivity. IC Role / Device Role / Timing Role: Secure co-processor managing encrypted firmware updates, certificate validation, and secure boot using on-chip AES/SHA engines. Use Value: Prevents unauthorized firmware injection; trusted memory protects bootloader and crypto keys from read-out attacks. |
| Smart Energy Meter Hub | Automated Test Equipment (ATE) Controller |
Use Scenario: Multi-tenant energy metering gateway collecting data from 32+ smart meters via RS485 (SCI) and LoRaWAN (via USB-connected modem). IC Role / Device Role / Timing Role: Central controller managing time-synchronized data logging, tariff switching, and remote firmware updates over cellular backhaul. Use Value: Integrated RTC with battery backup maintains accurate billing timestamps during grid outages; SDHI interface stores 30+ days of meter logs locally. | Use Scenario: High-precision calibration controller acquiring analog sensor outputs (thermocouples, strain gauges) and generating stimulus waveforms. IC Role / Device Role / Timing Role: Mixed-signal acquisition engine using dual 12-bit A/D converters with programmable sample-and-hold and 2× 12-bit D/A for closed-loop feedback. Use Value: On-chip temperature sensor compensates ADC gain/offset drift; ELC-linked TPU triggers synchronous sampling across 29 channels. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEHDFP#V1 | Same RX64M family, 176-pin LFBGA, but 2.5 MB flash, no USB battery charging, single Ethernet MAC | Lacks dual Ethernet and USBA battery charging; suitable for cost-sensitive gateways without redundant networking | Select when dual Ethernet and BC1.2 are not required and flash >2.5 MB is sufficient |
| R7FA6M2AF3CFP#AA0 | RX72M family, 176-pin LQFP, 120 MHz, 2 MB flash, single Ethernet, no PTP hardware, enhanced security (TRNG, secure boot ROM) | Higher security certification readiness (PSA Level 2), but lacks IEEE 1588 hardware acceleration and dual MAC | Prefer for new designs prioritizing PSA-certified security over precision time sync |
Compared with R5F564MLDGFP#V1, R5F565NEHDFP#V1 reduces cost by removing one Ethernet MAC and battery charging, while R7FA6M2AF3CFP#AA0 shifts focus to certified security at the expense of deterministic PTP timing - making R5F564MLDGFP#V1 uniquely suited for time-critical industrial networking where sub-microsecond synchronization is non-negotiable.
Availability
R5F564MLDGFP#V1 is available at Aetrix Electronics and suitable for industrial gateways, secure PLC modules, smart energy hubs, and automated test equipment requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F564MLDGFP#V1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader headquartered in Tokyo, Japan, specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RX64M Group - including R5F564MLDGFP#V1 - was designed specifically for high-performance industrial networking applications demanding deterministic real-time response, multi-protocol connectivity, and functional safety compliance.
FAQ
What is the maximum operating frequency and CPU architecture of the R5F564MLDGFP#V1?
The R5F564MLDGFP#V1 operates at a maximum frequency of 120 MHz using the 32-bit RXv2 CPU core with CISC Harvard architecture, 5-stage pipeline, and variable-length instructions. It delivers 240 DMIPS and includes a single-precision IEEE-754 floating-point unit. This performance level is confirmed in Section 1.1 of the R01DS0173EJ0120 datasheet Rev.1.20, which specifies the core's instruction set, register layout, and timing characteristics for the R5F564MLDGFP#V1 variant.
Does the R5F564MLDGFP#V1 support IEEE 1588 Precision Time Protocol, and how is it implemented?
Yes, the R5F564MLDGFP#V1 supports IEEE 1588 through dedicated hardware: the EPTPC (PTP Controller for Ethernet Controller) block tightly coupled to both Ethernet MACs. It provides hardware timestamping of ingress/egress frames with sub-microsecond resolution, independent of CPU load. This implementation is documented in Section 1.1 and Figure 1.1 of R01DS0173EJ0120 Rev.1.20, confirming full PTP profile compatibility for industrial time-sensitive networking applications.
What are the flash and RAM capacities of the R5F564MLDGFP#V1, and are they accessible without wait states?
The R5F564MLDGFP#V1 integrates 4 MB of on-chip code flash memory and 512 KB of SRAM, both accessible at 120 MHz with zero wait states. It also includes 64 KB of reprogrammable data flash (100,000 erase cycles) and 32 KB of ECC-protected RAM. These values are explicitly listed in Table 1.1 (Pages 2–3) of R01DS0173EJ0120 Rev.1.20, and the "no wait states" behavior is guaranteed under rated voltage and temperature conditions for the R5F564MLDGFP#V1 package variant.
Which communication interfaces does the R5F564MLDGFP#V1 support for industrial connectivity?
The R5F564MLDGFP#V1 supports dual IEEE 802.3 Ethernet (10/100 Mbps, MII/RMII), full-speed USB 2.0 with battery charging (USBA), three ISO11898-1 CAN channels, nine SCI/SCIg/SCIh serial interfaces, four SCIFA UARTs with 16-byte FIFOs, two I2C buses (up to 1 Mbps), QSPI, SD host interface, and RSPI. All are confirmed for the 176-pin LFBGA package in Tables 1.1–1.2 of R01DS0173EJ0120 Rev.1.20, with Ethernet and USB battery charging exclusive to this pin count.
Is the R5F564MLDGFP#V1 qualified for functional safety standards like IEC60730?
Yes, the R5F564MLDGFP#V1 includes hardware features required for Class B compliance per IEC60730: oscillation-stop detection, built-in CRC calculation unit, self-diagnostic A/D converter with internal reference voltages, independent watchdog timer (IWDTa) with window function, and register write protection. These capabilities are detailed in Section 1.1 "Useful functions for IEC60730 compliance" of R01DS0173EJ0120 Rev.1.20, specifically validated for the R5F564MLDGFP#V1 G-version (-40°C to +105°C).
R5F564MLDGFP#V1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, SCI, SPI, SSI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 78
- Program Memory Size:
- 4MB (4M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 64K x 8
- RAM Size:
- 512K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F564MLDGFP#V1 FAQ
1.How can I place an order for R5F564MLDGFP#V1 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F564MLDGFP#V1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F564MLDGFP#V1 reliable?
The price and inventory of R5F564MLDGFP#V1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F564MLDGFP#V1 is usually 5 days.
3.What payment methods are accepted for R5F564MLDGFP#V1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F564MLDGFP#V1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F564MLDGFP#V1?
R5F564MLDGFP#V1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F564MLDGFP#V1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F564MLDGFP#V1?
For technical support, including R5F564MLDGFP#V1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F564MLDGFP#V1 requirements.
6.How does Aetrix verify that R5F564MLDGFP#V1 is sourced from the original manufacturer or authorized distributors?
All R5F564MLDGFP#V1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F564MLDGFP#V1 meets industry standards.
7.What is the process for return or replacement of R5F564MLDGFP#V1?
All R5F564MLDGFP#V1 units undergo pre-shipment inspection (PSI). If there is an issue with R5F564MLDGFP#V1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F564MLDGFP#V1 part is unused and in its original packaging.
Return procedure for R5F564MLDGFP#V1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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