Renesas R5F564MLGDFP#11
- Part No.:
- R5F564MLGDFP#11
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F564MLGDFP#11.pdf
- Description:
- IC MCU 32BIT 4MB FLASH 100LFQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,028
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Product details
Overview
R5F564MLGDFP#11 from Renesas is a 120-MHz 32-bit RXv2 microcontroller with integrated FPU, 4 MB code flash, 512 KB SRAM, IEEE 1588-compliant dual Ethernet MAC, full-speed USB 2.0 with battery charging, CAN (3 channels), and 12-bit A/D (29 total channels). It targets industrial automation gateways requiring real-time networking, secure firmware updates, and deterministic I/O control.
For engineers reviewing the R5F564MLGDFP#11 datasheet, R5F564MLGDFP#11 pinout, R5F564MLGDFP#11 application, or R5F564MLGDFP#11 equivalent, key selection criteria include its 176-pin LFBGA package, dual Ethernet + PTP support, on-chip AES/SHA encryption, 4-MB flash with background programming, and -40°C to +105°C operation.
Technical Context
The R5F564MLGDFP#11 implements the RXv2 CPU core with 240 DMIPS at 120 MHz, single-precision IEEE-754 FPU, and dual multiply-accumulate units. Its memory subsystem includes 4 MB zero-wait-state code flash, 64 KB reprogrammable data flash (100k cycles), and 512 KB SRAM with 32 KB ECC-protected RAM.
Peripherals are clocked across four domains: ICLK (up to 120 MHz for CPU), PCLKA (120 MHz for Ethernet/USB/AES), PCLKB (60 MHz for timers/ADC), and PCLKC/PCLKD (60 MHz for ADC units 0/1). It supports IEEE 1588 timestamping via EPTPC linked to ETHERC, and features event-linking (ELC) for hardware-triggered peripheral coordination without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit, 120 MHz max, 240 DMIPS, IEEE-754 FPU, 5-stage pipeline |
| Memory | 4 MB code flash (no wait states), 64 KB data flash (100k erase cycles), 512 KB SRAM, 32 KB ECC RAM |
| Operating Temp | –40°C to +105°C (G-version), single 2.7–3.6 V supply |
| Connectivity | Dual IEEE 1588 Ethernet MAC, USB 2.0 FS with battery charging, 3× CAN, 9× SCI, 4× SCIFA, 2× RIIC, QSPI, SDHI |
| Analog | Two 12-bit S12ADC units (8 + 21 channels), 2× 12-bit R12DA, on-chip temperature sensor (±1°C) |
| Security | AES-128/192/256, DES/TDES, SHA-1/224/256, HMAC, CRC, self-diagnostic A/D, register write protection |
| Timers & DMA | 29 timers including MTU3a (9 ch), GPTA (4 ch), TPUa (6 ch), plus DMAC (8 ch), EXDMAC (2 ch), EDMAC (3 ch for Ethernet) |
Pinout & Package
Package: PLQP0176KB-A - 176-pin LFBGA, 24 × 24 mm, 0.5-mm pitch, RoHS compliant, moisture sensitivity level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Power supply inputs | Separate digital/analog rails; AVCC0/AVCC1 power analog peripherals and ADC/DAC; all require 2.7–3.6 V |
| VBATT | Battery backup supply | Enables RTC operation during main power loss; connects to coin cell or backup source |
| XTAL / EXTAL | Main crystal oscillator terminals | Supports 8–24 MHz external crystal for precise system clock generation and IEEE 1588 timebase |
| ETXD0–ETXD3 / ETXEN / ETXER / ERXD0–ERXD3 / ERXDV / ERXER | Ethernet PHY interface pins | Two independent MII/RMII-capable 10/100 Mbps Ethernet physical layer interfaces |
| USBDP / USBDM | USB 2.0 differential data lines | Full-speed (12 Mbps) USB transceiver with integrated PHY; supports host/function/OTG with battery charging |
| TXD0 / RXD0 / RTS0 / CTS0 | SCIFA0 serial interface | Asynchronous/clock-synchronous UART with 16-byte TX/RX FIFOs; used for debug, configuration, or host comms |
| AD00–AD28 | Analog input channels | 29 total ADC inputs distributed across two 12-bit units; AD00–AD07 (unit 0), AD10–AD30 (unit 1, 21 ch) |
| DA00 / DA01 | Digital-to-analog outputs | 2× 12-bit voltage outputs; selectable amplifier or direct output; 0.2 V to AVCC1 – 0.2 V range |
Key Features
| Feature | Design Value |
|---|---|
| IEEE 1588 Precision Time Protocol | EPTPC block tightly coupled to dual ETHERC; enables sub-microsecond timestamping for industrial time-sensitive networking |
| Background Programming | Code/data flash supports BGO-firmware updates while application runs, critical for zero-downtime field upgrades |
| Event Link Controller (ELC) | 119 internal event signals routed without CPU; e.g., timer overflow triggers ADC conversion or PWM edge triggers GPIO toggle |
| Secure Boot & Encryption | Trusted Memory (TM) blocks 8–9 protected from read-out; AES/SHA engines accelerate secure boot, OTA, and data-at-rest protection |
| Industrial I/O Robustness | 127 GPIO with 5-V tolerance (19 pins), open-drain, pull-up, switchable drive strength; meets IEC 60730 Class B requirements |
| Low-Power Operation | Four modes including deep software standby (8 KB RAM retention); 0.3 mA/MHz typical active current at 120 MHz |
Applications
| Industrial Ethernet Gateway | Smart Energy Metering Hub |
|---|---|
Use Scenario: Aggregating Modbus TCP, CANopen, and BACnet MS/TP traffic into a unified IEEE 1588-synchronized time-stamped Ethernet backbone. IC Role / Device Role / Timing Role: Primary network controller executing protocol translation, real-time packet timestamping via EPTPC, and deterministic scheduling using MTU3/GPT timers. Use Value: Dual Ethernet + PTP eliminates need for external timing ICs; 4 MB flash stores multiple protocol stacks; ECC RAM ensures data integrity in noisy environments. |
Use Scenario: Multi-tariff electricity meter with tamper detection, remote firmware update, and secure HAN (Home Area Network) communication over PLC or RF. IC Role / Device Role / Timing Role: System-on-chip managing metrology ADC sampling, secure crypto operations, RTC-based billing intervals, and SDHI-based firmware rollback storage. Use Value: On-chip AES/SHA enables FIPS-compliant firmware signing; 64 KB data flash retains calibration and usage logs across 100k cycles; temperature sensor validates meter accuracy drift. |
| Programmable Logic Controller (PLC) CPU Module | Factory Automation HMI Controller |
Use Scenario: Compact DIN-rail PLC executing ladder logic with motion control, safety monitoring, and EtherCAT slave offload (via external bridge). IC Role / Device Role / Timing Role: Real-time deterministic controller using GPTA for PWM motor drives, TPUa for encoder capture, and ELC for synchronized I/O scanning. Use Value: 29 timers + 127 GPIO enable multi-axis motion control; 512 KB SRAM buffers I/O images and logic state; CAN + USB support diagnostics and programming. |
Use Scenario: Touch-enabled HMI panel with local web server, video overlay, and alarm logging for machine monitoring. IC Role / Device Role / Timing Role: Application processor running FreeRTOS, driving parallel LCD via GPIO, streaming audio via SSI/SRC, and serving HTTP pages via Ethernet. Use Value: Dual Ethernet allows isolated control and service networks; SSI + SRC support voice alerts and audio feedback; SDHI enables local firmware and log storage. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-performance industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEHDFP#11 | Same RX65N Group; 2 MB flash, 1.5 MB SRAM, no Ethernet MAC, adds TrustZone, higher crypto throughput | Better suited for security-first edge nodes without real-time Ethernet; lacks PTP/Ethernet but adds ARM TrustZone isolation | Select when cryptographic acceleration and secure enclave outweigh need for dual Ethernet and deterministic timing |
| R7FA6M2AF3CFP#AA0 | RX72M Group; 200 MHz, 1 MB flash, 384 KB SRAM, single Ethernet + PTP, enhanced FPU, lower power | Higher CPU performance and better FPU for motion control math, but only one Ethernet channel and smaller memory | Select when computational load exceeds RX64M capacity but dual Ethernet is unnecessary; ideal for servo drive controllers |
Compared with R5F564MLGDFP#11, R5F565NEHDFP#11 trades Ethernet and larger flash for stronger security primitives and TrustZone, while R7FA6M2AF3CFP#AA0 delivers higher clock speed and FPU performance at the cost of reduced memory and single-Ethernet capability-making R5F564MLGDFP#11 optimal for dual-network industrial gateways needing balanced compute, memory, and connectivity.
Availability
R5F564MLGDFP#11 is available at Aetrix Electronics and suitable for industrial automation gateways, smart energy metering hubs, programmable logic controller CPU modules, and factory automation HMI controllers requiring stable component supply, long lifecycle assurance, and automotive-grade reliability.
Supply support for R5F564MLGDFP#11 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and enterprise applications.
The RX64M Group-including R5F564MLGDFP#11-is designed for high-reliability industrial networking applications demanding real-time Ethernet, deterministic I/O, functional safety compliance (IEC 60730), and secure firmware execution.
FAQ
What is the maximum operating frequency and CPU architecture of the R5F564MLGDFP#11?
The R5F564MLGDFP#11 operates at a maximum frequency of 120 MHz using the 32-bit RXv2 CPU core. It delivers 240 DMIPS performance and includes a single-precision IEEE-754 floating-point unit, dual MAC units, and a 5-stage pipeline. This architecture enables deterministic real-time execution required for industrial control and networking tasks handled by the R5F564MLGDFP#11.
Does the R5F564MLGDFP#11 support IEEE 1588 Precision Time Protocol, and how is it implemented?
Yes, the R5F564MLGDFP#11 supports IEEE 1588 via its integrated EPTPC (PTP Controller for Ethernet) block, which is directly connected to both Ethernet MAC channels. It provides hardware timestamping of ingress/egress frames with sub-microsecond resolution, enabling precise time synchronization in industrial Ethernet applications such as motion control and distributed I/O-core functionality of the R5F564MLGDFP#11.
What are the flash and RAM capacities of the R5F564MLGDFP#11, and do they support background operations?
The R5F564MLGDFP#11 integrates 4 MB of code flash memory and 64 KB of data flash memory, both supporting background programming and erasing (BGO). It also includes 512 KB of general-purpose SRAM, 32 KB of ECC-protected RAM, and 8 KB of standby RAM. These memory resources allow concurrent application execution and firmware updates-a defining capability of the R5F564MLGDFP#11 in mission-critical systems.
Which communication interfaces are available on the R5F564MLGDFP#11, and does it include USB with battery charging?
The R5F564MLGDFP#11 includes dual IEEE 1588 Ethernet MACs, USB 2.0 Full-Speed with integrated battery charging capability (USBA module), 3× CAN channels, 9× SCI, 4× SCIFA, 2× I2C, QSPI, SDHI, and RSPI. The USBA module supports OTG and includes 8.5 KB of dedicated RAM-making the R5F564MLGDFP#11 uniquely suited for host/device roles in portable industrial tools and field-programmable devices.
What is the operating temperature range and power supply requirement for the R5F564MLGDFP#11?
The R5F564MLGDFP#11 is rated for industrial operation from –40°C to +105°C (G-version) and requires a single 2.7 V to 3.6 V supply across VCC, AVCC0, and AVCC1. Its low-power design achieves 0.3 mA/MHz typical active current and supports four low-power modes-including deep software standby with 8 KB RAM retention-ensuring robust operation in harsh thermal environments typical for the R5F564MLGDFP#11's target applications.
R5F564MLGDFP#11 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX64M
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RXv2
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, SCI, SPI, SSI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 78
- Program Memory Size:
- 4MB (4M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 64K x 8
- RAM Size:
- 512K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 8x12b, 14x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F564MLGDFP#11 FAQ
1.How can I place an order for R5F564MLGDFP#11 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F564MLGDFP#11 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F564MLGDFP#11 reliable?
The price and inventory of R5F564MLGDFP#11 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F564MLGDFP#11 is usually 5 days.
3.What payment methods are accepted for R5F564MLGDFP#11?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F564MLGDFP#11 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F564MLGDFP#11?
R5F564MLGDFP#11 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F564MLGDFP#11 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F564MLGDFP#11?
For technical support, including R5F564MLGDFP#11 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F564MLGDFP#11 requirements.
6.How does Aetrix verify that R5F564MLGDFP#11 is sourced from the original manufacturer or authorized distributors?
All R5F564MLGDFP#11 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F564MLGDFP#11 meets industry standards.
7.What is the process for return or replacement of R5F564MLGDFP#11?
All R5F564MLGDFP#11 units undergo pre-shipment inspection (PSI). If there is an issue with R5F564MLGDFP#11, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F564MLGDFP#11 part is unused and in its original packaging.
Return procedure for R5F564MLGDFP#11:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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