Renesas R5F56517AGFP#10
- Part No.:
- R5F56517AGFP#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F56517AGFP#10.pdf
- Description:
- IC MCU 32BIT 768KB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:4,070
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Product details
Overview
R5F56517AGFP#10 from Renesas is a 32-bit RXv2 microcontroller with 120 MHz max operating frequency, 240 DMIPS performance, single-precision IEEE-754 FPU, 2 MB on-chip code flash memory (dual-bank), and 640 KB SRAM - designed for industrial HMI, networked gateway, and secure IoT edge node applications requiring Ethernet MAC, USB FS host/function, CAN, SDIO, and hardware encryption.
For engineers reviewing the R5F56517AGFP#10 datasheet, R5F56517AGFP#10 pinout, R5F56517AGFP#10 application, or R5F56517AGFP#10 equivalent, this MCU delivers deterministic real-time control with integrated GLCDC, DRW2D graphics acceleration, dual 12-bit ADCs (29 total channels), 2-channel 12-bit DAC, and TSIP-based AES-128/192/256 for IEC60730-compliant safety-critical firmware.
Technical Context
The R5F56517AGFP#10 implements the RXv2 CPU core with CISC Harvard architecture, 5-stage pipeline, and variable-length instructions enabling ultra-compact code density. It integrates a dedicated 120-MHz system clock (ICLK), independent peripheral clocks (PCLKA up to 120 MHz for ETHERC/DRW2D/GLCDC, PCLKB up to 60 MHz for timers/ADC/DAC), and event-linking controller (ELC) for hardware-triggered peripheral coordination without CPU intervention.
Its memory subsystem includes dual-bank 2-MB flash supporting background programming and bank-swapping at reset, 32-KB data flash rated for 100,000 erase/write cycles, 640-KB SRAM (256 KB main + 384 KB expansion), and 8-KB standby RAM backed by VBATT. Security features include MPU (8 regions), Trusted Memory (TM) protection, register write lock, CRCA, and TSIP for key management and encrypted boot.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC core with 5-stage pipeline, 240 DMIPS @ 120 MHz |
| Max Operating Frequency | 120 MHz system clock (ICLK); PCLKA up to 120 MHz for Ethernet/graphics, PCLKB up to 60 MHz for analog/timers |
| Memory | 2 MB dual-bank code flash (BGO, bank-swap), 32 KB data flash (100k cycles), 640 KB SRAM (no wait states) |
| Analog Peripherals | Dual 12-bit S12AD (8 + 21 channels), 2-channel 12-bit R12DA, on-die temperature sensor (±1°C) |
| Connectivity | Ethernet MAC (10/100 Mbps, MII/RMII), USB 2.0 FS host/function/OTG, 2× CAN (ISO11898-1), 3× RSPI, 1× QSPI, 3× RIIC, 13× SCI |
| Graphics & Media | GLCDC (3-plane overlay), DRW2D (vector/bit-blit), PDC (CMOS camera interface), SDHI/SDSI/MMCIF (1-/4-/8-bit) |
| Security | TSIP (AES-128/192/256), MPU (8 regions), Trusted Memory (TM), CRCA, IWDT with window function |
Pinout & Package
Package: PLQP0176KB-A (176-pin LQFP, 24 × 24 mm, 0.5-mm pitch, -40°C to +85°C operating range).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Power supply inputs | Separate digital/analog domains; AVCC1 powers ADC/DAC/temperature sensor; all require 2.7–3.6 V |
| VBATT | Battery backup supply | Enables RTC operation during main power loss; connects to coin cell or supercap |
| RES# | Active-low reset input | Asynchronous hardware reset; internal POR/LVD also available |
| EXTAL / XTAL | External crystal oscillator terminals | Supports 8–24 MHz crystal for high-accuracy system clock; optional PLL multiplication |
| MD0 / MD1 | Mode setting pins | Configure boot mode (SCI/USB/FINE) and single-chip vs. extended mode at power-on reset |
| ETXD0–ETXD3 / ETXCK / ERXD0–ERXD3 / ERXCK | Ethernet PHY interface | MII mode signals; RMII supported via pin multiplexing (requires external PHY in RMII configuration) |
| USBDP / USBDM | USB 2.0 full-speed differential pair | Integrated transceiver; no external termination resistors required |
| TXDn / RXDn (SCI) | Serial communication I/O | Up to 13 SCI channels support UART, SPI, I²C, smart card, and LIN protocols via software configuration |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash with BGO | Enables firmware updates without halting execution; supports safe over-the-air (OTA) patching and fail-safe rollback |
| Event Link Controller (ELC) | Hardware interconnect between 83 internal peripherals eliminates CPU polling/interrupt latency for time-critical sequences (e.g., ADC trigger → DMA transfer → PWM update) |
| GLCDC + DRW2D | Offloads GUI rendering from CPU: GLCDC handles layer composition; DRW2D accelerates vector drawing, bit-blit, rotation, and texture mapping for 16-/32-bpp displays |
| TSIP cryptographic engine | Dedicated hardware for AES encryption/decryption, key wrapping, and secure boot verification - meets IEC60730 Class B functional safety requirements |
| IEC60730 safety functions | Includes oscillation-stop detection, CRC calculator (CRCA), self-diagnostic ADC, IWDT windowing, and register write protection for certified appliance control |
Applications
| Industrial HMI Panel | Secure Gateway Device |
|---|---|
Use Scenario: Touch-enabled factory display with real-time process visualization, alarm logging, and local PLC communication. IC Role / Device Role / Timing Role: Primary application processor running FreeRTOS with GLCDC driving 800×480 RGB TFT, DRW2D rendering dynamic gauges, and dual ADC monitoring analog sensor inputs. Use Value: Integrated graphics engine reduces BOM cost versus external GPU; dual-bank flash enables seamless UI firmware updates during operation. | Use Scenario: Edge gateway aggregating Modbus RTU, CAN bus, and Ethernet/IP traffic for cloud telemetry in building automation. IC Role / Device Role / Timing Role: Central protocol translator with Ethernet MAC handling TCP/IP stack, dual CAN controllers interfacing field devices, and TSIP securing TLS handshake keys. Use Value: Hardware-accelerated crypto offloads TLS processing from CPU; ELC synchronizes CAN message reception with Ethernet frame transmission for deterministic latency. |
| Medical Patient Monitor | Smart Energy Meter |
Use Scenario: Portable vital sign monitor capturing ECG, SpO₂, and temperature with local display and Bluetooth LE upload. IC Role / Device Role / Timing Role: Real-time signal acquisition controller using dual 12-bit ADCs (S12AD) with programmable sampling, temperature sensor for calibration, and USB FS for PC sync. Use Value: On-chip ADC self-diagnostic and MPU-enforced memory isolation satisfy IEC62304 Class C software safety requirements. | Use Scenario: DIN-rail mounted electricity meter with tariff switching, tamper detection, and remote firmware update via power-line communication. IC Role / Device Role / Timing Role: Secure metering SoC executing metrology algorithms, managing EEPROM-backed billing data, and validating signed firmware images via TSIP. Use Value: Dual-bank flash and Trusted Memory prevent unauthorized firmware modification; 100k-cycle data flash stores lifetime energy logs reliably. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F5651EDFP#30 | Same RX65N Group; 1.5 MB flash, 256 KB SRAM, 144-pin LQFP (PLQP0144KA-B), operates to +105°C | Lower memory capacity; suited for cost-sensitive designs without graphics or large OTA payloads | Select when thermal margin >85°C is required and GLCDC/DRW2D are unused. |
| R5F566TEADFP#30 | RX66T Group; 160 MHz, FPU, 1 MB flash, 256 KB SRAM, optimized for motor control (3× MTU3, 3× CMTW, 12-bit ADC with 1.0 µs conversion) | Focused on servo/inverter control; lacks Ethernet, SDIO, GLCDC, and TSIP | Choose for high-performance motor drives where networking and graphics are secondary. |
Compared with R5F56517AGFP#10, the R5F5651EDFP#30 offers higher temperature rating but reduced memory and no graphics acceleration, while the R5F566TEADFP#30 delivers superior motor control timing precision at the expense of connectivity and security features - making R5F56517AGFP#10 optimal for secure, connected HMI and gateway use cases.
Availability
R5F56517AGFP#10 is available at Aetrix Electronics and suitable for industrial HMI panels, secure gateways, medical monitors, and smart energy meters requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F56517AGFP#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering microcontrollers, analog, power, and SoC solutions for automotive, industrial, infrastructure, and IoT markets.
The RX65N Group - including R5F56517AGFP#10 - was engineered for secure, connected embedded systems demanding rich graphics, real-time networking, and functional safety compliance in harsh environments.
FAQ
What is the maximum operating frequency and core architecture of the R5F56517AGFP#10?
The R5F56517AGFP#10 operates at a maximum frequency of 120 MHz using the 32-bit RXv2 CPU core with CISC Harvard architecture, 5-stage pipeline, and variable-length instructions. It achieves 240 DMIPS performance and includes single-precision IEEE-754 floating-point unit (FPU), two multiply-accumulate units, and 32-bit multiplier with one-cycle execution. This architecture enables high code density and deterministic real-time response critical for industrial control applications.
Does the R5F56517AGFP#10 support hardware-accelerated graphics and display control?
Yes, the R5F56517AGFP#10 integrates both a Graphic-LCD Controller (GLCDC) and a 2D Drawing Engine (DRW2D). The GLCDC supports 3-plane overlay (background, graphic 1, graphic 2) and multiple pixel formats (1/4/8/16/32 bpp). The DRW2D accelerates vector operations (lines, triangles, circles) and bit-blit functions (copy, stretch, rotate) with bus-master access to frame buffers. Together, they enable responsive GUI rendering without burdening the RXv2 CPU - a key capability confirmed in the R01DS0276EJ0240 datasheet for the R5F56517AGFP#10.
What security features does the R5F56517AGFP#10 provide for IEC60730 compliance?
The R5F56517AGFP#10 includes multiple hardware features for IEC60730 Class B compliance: memory protection unit (MPU) with eight configurable regions, Trusted Secure IP (TSIP) for AES-128/192/256 encryption and secure key storage, CRC calculator (CRCA) with selectable polynomials, independent watchdog timer (IWDT) with windowing function, oscillation-stop detection, and register write protection. These are explicitly documented in the R01DS0276EJ0240 datasheet as part of the R5F56517AGFP#10's safety-ready design.
How many analog-to-digital converter (ADC) channels does the R5F56517AGFP#10 support, and what resolution options are available?
The R5F56517AGFP#10 integrates two independent 12-bit A/D converter units: S12AD0 with 8 input channels and S12AD1 with 21 input channels - totaling 29 configurable analog inputs. Each unit supports selectable resolution of 8-, 10-, or 12-bit modes. Conversion time is 0.48 µs per channel at 12-bit resolution. Both units include sample-and-hold circuits, digital comparison functions, self-diagnostic capability, and disconnection detection - all verified in the official Renesas R01DS0276EJ0240 datasheet for the R5F56517AGFP#10.
What package type and pin count does the R5F56517AGFP#10 use, and what is its operating temperature range?
The R5F56517AGFP#10 uses the PLQP0176KB-A package: a 176-pin LQFP measuring 24 × 24 mm with 0.5-mm pitch. It is rated for industrial temperature operation from –40°C to +85°C (D-version). This package provides 136 general-purpose I/O pins with 5-V tolerance on 19 pins, programmable pull-up resistors, and open-drain outputs - as specified in Table 1.2 of the R01DS0276EJ0240 datasheet for the R5F56517AGFP#10.
R5F56517AGFP#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX651
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, QSPI, SCI, SPI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 78
- Program Memory Size:
- 768KB (768K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 22x12b; D/A 1x12b
- Oscillator Type:
- External
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F56517AGFP#10 FAQ
1.How can I place an order for R5F56517AGFP#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F56517AGFP#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F56517AGFP#10 reliable?
The price and inventory of R5F56517AGFP#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F56517AGFP#10 is usually 5 days.
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Once your R5F56517AGFP#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F56517AGFP#10?
For technical support, including R5F56517AGFP#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F56517AGFP#10 requirements.
6.How does Aetrix verify that R5F56517AGFP#10 is sourced from the original manufacturer or authorized distributors?
All R5F56517AGFP#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F56517AGFP#10 meets industry standards.
7.What is the process for return or replacement of R5F56517AGFP#10?
All R5F56517AGFP#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F56517AGFP#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F56517AGFP#10 part is unused and in its original packaging.
Return procedure for R5F56517AGFP#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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