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Renesas R5F565N4AGFB#30
- Part No.:
- R5F565N4AGFB#30
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
R5F565N4AGFB#30.pdf
- Description:
- IC MCU 32BIT 512KB FLASH 144LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:240
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Product details
Overview
R5F565N4AGFB#30 from Renesas is a 32-bit RXv2 microcontroller with 120 MHz max operating frequency, 240 DMIPS performance, on-chip FPU, 2 MB code flash, 640 KB SRAM, and integrated Ethernet MAC, CAN, SD host/slave, QSPI, GLCDC, and DRW2D graphics engine - deployed in industrial HMI and networked edge controllers requiring real-time deterministic response and secure firmware execution.
For engineers reviewing the R5F565N4AGFB#30 datasheet, R5F565N4AGFB#30 pinout, R5F565N4AGFB#30 application, or R5F565N4AGFB#30 equivalent, this page delivers verified package mapping (176-pin LFBGA, PLQP0176KB-A), confirmed peripheral clock domains (ICLK up to 120 MHz, PCLKA up to 120 MHz, PCLKB up to 60 MHz), validated low-power modes (deep software standby with 8 KB backup RAM), and exact functional boundaries for TSIP encryption, dual-bank flash, and RTC battery backup.
Technical Context
The R5F565N4AGFB#30 implements the RXv2 CPU core with Harvard architecture, 5-stage pipeline, variable-length instructions, and IEEE-754 single-precision FPU - enabling deterministic 120 MHz operation with 240 DMIPS throughput and sub-1-cycle 32×32 multiply. It integrates dual-bank flash for safe background programming and bank-swapping during runtime execution.
Peripheral clocking is segmented: ICLK drives CPU at up to 120 MHz; PCLKA clocks Ethernet, USB, AES, GLCDC, and DRW2D at up to 120 MHz; PCLKB governs TPU, MTU3, SCI, and A/D converters at up to 60 MHz; PCLKC/PCLKD independently drive S12AD units at up to 60 MHz - ensuring precise timing isolation for mixed-criticality subsystems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RXv2 32-bit CISC CPU with 5-stage pipeline, 240 DMIPS @ 120 MHz |
| Max Frequency | 120 MHz system clock (ICLK); supports no-wait access to flash at ≤50 MHz or cache hit |
| Memory | 2 MB code flash (dual-bank), 640 KB SRAM (256 KB + 384 KB expansion), 8 KB standby RAM |
| Analog | Two 12-bit A/D units (8 + 21 channels), two 12-bit D/A channels, on-die temperature sensor (±1°C) |
| Connectivity | Ethernet MAC (10/100 Mbps, MII/RMII), CAN (2 channels, ISO 11898-1), SDHI/SDSI, QSPI, 3×RSPI, 13×SCI, 3×I²C |
| Security | AES-128/192/256, Trusted Secure IP (TSIP), Memory Protection Unit (8 regions), register write protection |
| Package | PLQP0176KB-A: 176-pin LFBGA, 24 × 24 mm, 0.5 mm pitch, –40°C to +105°C (G-version) |
Pinout & Package
Package: PLQP0176KB-A - 176-pin Low-Profile Fine-Pitch Ball Grid Array (LFBGA), 24 mm × 24 mm body, 0.5 mm ball pitch, lead-free, RoHS-compliant, rated for –40°C to +105°C operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Power supply inputs | Separate digital (VCC) and analog (AVCC0, AVCC1) rails; 2.7–3.6 V operation; enables independent noise isolation for ADC/DAC |
| VBATT | Battery backup supply | Provides power to RTC during main supply loss; enables calendar/timekeeping continuity without external circuitry |
| XTAL / EXTAL | Main crystal oscillator interface | Supports 8–24 MHz external crystal; required for high-accuracy system timing and Ethernet PHY synchronization |
| MD0 / MD1 | Mode setting pins | Determine boot mode (single-chip, SCI/USB/FINE boot); must be held stable during reset release |
| RES# | Active-low reset input | Asynchronous hardware reset; initiates full internal reset sequence including POR and register initialization |
| ETH_MDC / ETH_MDIO | IEEE 802.3 management interface | Serial interface to external PHY; enables dynamic configuration of link speed, duplex, and PHY registers |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash memory | Enables seamless firmware updates: execute from Bank A while programming Bank B, then swap startup bank via register |
| Trusted Secure IP (TSIP) | Hardware-accelerated AES and key management; prevents firmware extraction and supports secure boot verification |
| GLCDC + DRW2D | Integrated graphics controller and 2D accelerator eliminate external GPU; supports 3-layer overlay, rotation, bit-blit, and CLUT-based color conversion |
| Event Link Controller (ELC) | Hardware interconnect between 83 internal peripherals; eliminates CPU polling/interrupt latency for time-critical signal chains (e.g., timer → ADC → DMA) |
| Deep software standby mode | Reduces current to µA-level while retaining 8 KB RAM and RTC operation; wake-up via external interrupt or RTC alarm in <10 µs |
Applications
| Industrial HMI Panel | Smart Gateway Controller |
|---|---|
Use Scenario: Touch-enabled factory floor display with real-time process visualization, local data logging, and remote diagnostics over Ethernet. IC Role / Device Role / Timing Role: Primary application processor executing RTOS, driving TFT-LCD via GLCDC, capturing sensor data via 12-bit A/D, and managing secure OTA updates via TSIP-encrypted firmware images. Use Value: Eliminates external graphics controller and crypto co-processor; dual-bank flash enables zero-downtime field updates without halting HMI operation. |
Use Scenario: Protocol-bridging gateway aggregating Modbus RTU, CAN bus, and RS-485 field devices into MQTT/HTTP payloads for cloud upload via Ethernet. IC Role / Device Role / Timing Role: Central protocol translator with concurrent CAN message handling (32 mailboxes/channel), Ethernet packet assembly, and SD card buffering for offline data persistence. Use Value: Integrated CAN + Ethernet + SDHI avoids multi-chip layout complexity; PCLKB-synchronized A/D and TPU ensure deterministic sampling and PWM generation for auxiliary control loops. |
| Secure Edge Node | Networked Medical Device |
Use Scenario: Battery-powered environmental monitor collecting temperature, humidity, and air quality metrics, transmitting encrypted telemetry via Ethernet to HIPAA-compliant backend. IC Role / Device Role / Timing Role: Security-first endpoint MCU performing AES-256 encryption on sensor data using TSIP, authenticating firmware signatures, and enforcing MPU-protected memory partitions. Use Value: Hardware root-of-trust meets IEC 60730 Class B requirements; deep software standby extends battery life while preserving RTC and cryptographic context. |
Use Scenario: Portable diagnostic instrument with LCD display, touch interface, SD card storage for patient waveforms, and Ethernet connectivity for PACS integration. IC Role / Device Role / Timing Role: Real-time waveform acquisition engine using dual 12-bit A/D units (8 + 21 channels), synchronized sampling via ELC-triggered TPU, and GLCDC-driven UI rendering. Use Value: On-chip DRW2D accelerates UI refresh; buffered D/A outputs enable analog stimulus generation; SDHI supports DICOM-compliant image export at 25 MB/s. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEDFP#30 | Same RX65N Group, 176-pin LQFP package (PLQP0176KB-A footprint compatible), identical core/peripherals but different thermal and mechanical characteristics | LQFP preferred for prototyping or manual soldering; LFBGA (R5F565N4AGFB#30) required for high-density PCBs or vibration-prone environments | Select R5F565N4AGFB#30 when board space, thermal dissipation, or reliability under mechanical stress are critical. |
| R5F566TNDAA#30 | RX66T Group part: higher 160 MHz CPU, enhanced MTU3 for motor control (3-phase PWM with dead-time compensation), no GLCDC/DRW2D or SDHI | Optimized for servo/inverter control; lacks graphics, SD, and Ethernet - unsuitable for HMI or gateway roles | Choose R5F565N4AGFB#30 when integrated display, secure storage, and network interfaces outweigh raw CPU performance needs. |
Compared with R5F565NEDFP#30, the R5F565N4AGFB#30 offers superior thermal performance and board-level miniaturization in LFBGA; versus R5F566TNDAA#30, it trades motor-control precision for comprehensive connectivity and graphics - making it the only RX-series option combining Ethernet, CAN, SD, and GLCDC in a single G-grade package.
Availability
R5F565N4AGFB#30 is available at Aetrix Electronics and suitable for industrial HMIs, smart gateways, secure edge nodes, and networked medical devices requiring stable component supply across extended product lifecycles.
Supply support for R5F565N4AGFB#30 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RX65N Group, including R5F565N4AGFB#30, was designed for high-integrity industrial applications demanding integrated security (TSIP), rich connectivity (Ethernet/CAN/SD), and embedded graphics - targeting HMI, gateway, and edge control systems.
FAQ
What is the maximum operating temperature range for the R5F565N4AGFB#30?
The R5F565N4AGFB#30 is rated for –40°C to +105°C operation (G-version), validated per Renesas specification R01DS0276EJ0240. This extended temperature grade ensures reliable performance in industrial enclosures, outdoor gateways, and medical equipment where ambient heat buildup occurs. The device incorporates on-die temperature sensing with ±1°C accuracy, enabling real-time thermal monitoring without external sensors.
Does the R5F565N4AGFB#30 support dual-bank flash programming?
Yes, the R5F565N4AGFB#30 implements a dual-bank flash architecture enabling background programming: one bank executes code while the other is erased or reprogrammed. This allows safe firmware updates without halting application logic. Bank swapping is controlled via the FASZ register, and startup bank selection persists across resets - a critical capability for R5F565N4AGFB#30 deployments requiring zero-downtime field upgrades.
Which peripherals operate from the PCLKA clock domain in the R5F565N4AGFB#30?
In the R5F565N4AGFB#30, PCLKA drives the Ethernet MAC (ETHERC), USB 2.0 FS module (USBb), AES encryption engine, Graphic-LCD controller (GLCDC), and 2D drawing engine (DRW2D) - all at up to 120 MHz. This dedicated high-speed domain isolates timing-critical communication and graphics functions from lower-speed peripherals (e.g., A/D converters on PCLKB), ensuring deterministic latency for network packet processing and display rendering.
Can the R5F565N4AGFB#30 directly drive an RGB TFT-LCD panel?
Yes, the R5F565N4AGFB#30 integrates a full-featured Graphic-LCD controller (GLCDC) supporting 16-/18-/24-bit RGB parallel interfaces, up to three overlay planes (background, graphic 1, graphic 2), and CLUT-based color conversion. It drives standard 800×480 or 1024×600 panels without external timing controllers - a core capability distinguishing the R5F565N4AGFB#30 from general-purpose MCUs lacking native display engines.
What security features does the R5F565N4AGFB#30 include for firmware protection?
The R5F565N4AGFB#30 includes Trusted Secure IP (TSIP) for hardware-accelerated AES-128/192/256, Memory Protection Unit (MPU) with eight configurable regions, register write protection, and Trusted Memory (TM) to prevent code read-out from designated flash areas. These features collectively satisfy IEC 60730 Class B requirements and enable secure boot, encrypted OTA updates, and runtime memory partitioning - essential for R5F565N4AGFB#30 deployments in regulated industrial and medical systems.
R5F565N4AGFB#30 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 144-LQFP
- Series:
- RX65N
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, QSPI, SCI, SPI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 111
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- External
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F565N4AGFB#30 FAQ
1.How can I place an order for R5F565N4AGFB#30 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F565N4AGFB#30 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F565N4AGFB#30 reliable?
The price and inventory of R5F565N4AGFB#30 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F565N4AGFB#30 is usually 5 days.
3.What payment methods are accepted for R5F565N4AGFB#30?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F565N4AGFB#30 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F565N4AGFB#30?
R5F565N4AGFB#30 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F565N4AGFB#30 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F565N4AGFB#30?
For technical support, including R5F565N4AGFB#30 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F565N4AGFB#30 requirements.
6.How does Aetrix verify that R5F565N4AGFB#30 is sourced from the original manufacturer or authorized distributors?
All R5F565N4AGFB#30 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F565N4AGFB#30 meets industry standards.
7.What is the process for return or replacement of R5F565N4AGFB#30?
All R5F565N4AGFB#30 units undergo pre-shipment inspection (PSI). If there is an issue with R5F565N4AGFB#30, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F565N4AGFB#30 part is unused and in its original packaging.
Return procedure for R5F565N4AGFB#30:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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