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Renesas R5F565N7FGFP#10
- Part No.:
- R5F565N7FGFP#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F565N7FGFP#10.pdf
- Description:
- IC MCU 32BIT 768KB FLASH 100LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:3,425
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Product details
Overview
R5F565N7FGFP#10 from Renesas is a 120-MHz 32-bit RXv2 microcontroller with on-chip FPU, 240 DMIPS performance, 2 MB code flash (dual-bank), 640 KB SRAM, Ethernet MAC, CAN, SD host/slave, QSPI, and hardware AES-128/192/256 encryption - deployed in industrial HMI, networked gateways, and secure IoT edge controllers.
For engineers reviewing the R5F565N7FGFP#10 datasheet, R5F565N7FGFP#10 pinout, R5F565N7FGFP#10 application, or R5F565N7FGFP#10 equivalent, key selection criteria include its 176-pin LFBGA package (PLQP0176KB-A), -40°C to +105°C G-grade operation, integrated GLCDC + DRW2D for embedded graphics, and IEC60730-compliant safety features including CRC, IWDT, and register write protection.
Technical Context
The R5F565N7FGFP#10 implements the RXv2 CPU core with Harvard architecture, 5-stage pipeline, and variable-length instructions enabling ultra-compact code density. It integrates dual-clock domain operation: ICLK up to 120 MHz for CPU and PCLKA-synchronized peripherals (ETHERC, GLCDC, DRW2D), and PCLKB up to 60 MHz for most other modules including S12AD units and MTU3 timers.
Its memory subsystem includes 2 MB dual-bank code flash (0-wait at ≤50 MHz, 1-wait at ≤100 MHz), 32 KB data flash (100,000 erase cycles), 640 KB SRAM (256 KB main + 384 KB expansion), and 8 KB standby RAM. Security is enforced via MPU (8 regions), Trusted Memory (TM) for code protection, TSIP, and hardware-accelerated AES.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC with 5-stage pipeline, 240 DMIPS @ 120 MHz |
| Max Operating Frequency | 120 MHz system clock (ICLK); PCLKA up to 120 MHz, PCLKB up to 60 MHz |
| Memory | 2 MB dual-bank code flash, 32 KB data flash, 640 KB SRAM, 8 KB standby RAM |
| Analog Peripherals | Two 12-bit A/D converters (8 + 21 channels), two 12-bit D/A channels, on-die temperature sensor (±1°C) |
| Connectivity | Ethernet MAC (10/100 Mbps), CAN (2 channels, 32 mailboxes each), USB 2.0 FS host/function/OTG, SDHI/SDSI/MMCIF, QSPI, 3× RSPI, 13× SCI, 3× RIIC |
| Graphics & Imaging | Graphic-LCD controller (GLCDC) supporting 3-plane overlay, 2D drawing engine (DRW2D) with vector/bit-blit acceleration |
| Security & Safety | AES-128/192/256, TSIP, MPU (8 regions), CRC calculator (8/32-bit), IWDT with window function, register write protection |
Pinout & Package
Package: PLQP0176KB-A - 176-pin Low-Profile Quad Flat Package (LFBGA), 24 × 24 mm, 0.5-mm pitch, -40°C to +105°C operating range (G-version).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Power supply inputs | Core/analog power domains; AVCC0/AVCC1 support independent analog reference stability |
| VBATT | Battery backup supply | Enables RTC operation during main power loss; connects to external coin cell or capacitor |
| RES# | Active-low reset input | Hardware reset assertion; synchronous release with internal POR/LVD logic |
| CLKIN / CLKOUT | External crystal interface | Supports 8–24 MHz crystal/resonator for main clock oscillator; optional PLL multiplication |
| ETH_MDC / ETH_MDIO / ETH_TXD[0:3] / ETH_RXD[0:3] | Ethernet PHY interface | MII/RMII-compliant signals; requires external PHY unless using integrated PHY variant (not applicable to R5F565N7FGFP#10) |
| SD0_* / SD1_* | SD host/slave interface | Dedicated pins for 1-/4-bit SD bus; supports high-speed mode (25 MB/s) and SDIO v3.0 |
| QSPI_IO[0:3] / QSPI_CLK / QSPI_CS# | Quad SPI interface | Direct connection to serial NOR/NAND flash; supports single/dual/quad I/O modes with configurable clock phase/polarity |
| GLCD_* / DRW2D_* | Graphics controller outputs | Parallel RGB/TFT interface pins (up to 24-bit), sync signals (HSYNC/VSYNC), and DRW2D frame buffer access control |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash architecture | Enables background programming/erasing while executing from alternate bank - critical for field firmware updates without service interruption |
| Integrated GLCDC + DRW2D | Eliminates external graphics controller; supports 3-layer composition, alpha blending, and hardware-accelerated 2D primitives for responsive HMI rendering |
| IEC60730 Class B compliance support | Includes oscillation-stop detection, CRC calculation, IWDT with windowing, self-diagnostic A/D, and register write protection - reduces certification effort for safety-critical appliances |
| Event Link Controller (ELC) | Hardware interconnect for 83 internal events - enables timer-triggered ADC sampling, PWM-triggered DAC updates, or GPIO-state changes without CPU intervention |
| Flexible clock domain partitioning | Independent ICLK, PCLKA, PCLKB, PCLKC, PCLKD, FCLK, BCLK domains allow precise power/performance tuning per peripheral group |
Applications
| Industrial HMI Panel | Secure Gateway Controller |
|---|---|
Use Scenario: Touch-enabled operator interface for PLC-controlled machinery with real-time status visualization and alarm logging. IC Role / Device Role / Timing Role: Main application processor running RTOS, driving TFT LCD via GLCDC/DRW2D, managing CAN/Ethernet communication, and executing AES-encrypted firmware updates. Use Value: Integrated graphics engine eliminates external GPU; dual-bank flash enables seamless OTA updates; 120 MHz CPU handles multitasking with deterministic response under IEC60730 constraints. | Use Scenario: Edge gateway aggregating Modbus RTU, CAN bus, and BLE sensor data into encrypted MQTT payloads for cloud transmission. IC Role / Device Role / Timing Role: Central protocol translator and security enforcer - performs TLS offload via TSIP, packet routing between industrial buses and Ethernet/Wi-Fi, and secure boot verification. Use Value: Hardware AES and TSIP accelerate crypto operations; multiple high-speed interfaces (CAN ×2, Ethernet, SDHI) enable concurrent protocol bridging; 640 KB SRAM buffers large message queues. |
| Networked Energy Meter | Medical Device Controller |
Use Scenario: DIN-rail mounted smart meter with pulse counting, tariff switching, remote firmware update, and tamper detection. IC Role / Device Role / Timing Role: System-on-chip managing metrology ADC interface, RTC-based billing cycles, SD card data logging, and secure HTTP/FTP communication over Ethernet. Use Value: On-chip 12-bit A/D with self-diagnostic ensures measurement integrity; battery-backed RTC maintains time across outages; dual-bank flash allows validated firmware rollback after failed update. | Use Scenario: Portable diagnostic device requiring FDA-compliant firmware execution, patient data encryption, low-power sleep modes, and graphical waveform display. IC Role / Device Role / Timing Role: Safety-certified controller handling sensor acquisition, real-time signal processing, encrypted storage, and GUI rendering on monochrome OLED/LCD. Use Value: MPU and TM protect critical code regions; IWDT with windowing prevents runaway code; temperature sensor monitors die thermal state for safe operation limits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEDFP#30 | Same RX65N Group, 144-pin LFQFP package (PLQP0144KA-B), 1 MB flash, 256 KB SRAM, identical peripheral set except reduced I/O count (111 vs. 136) | Suitable for space-constrained designs where full 176-pin I/O is unnecessary and lower memory suffices | Select when footprint size and cost optimization outweigh need for maximum flash/SRAM and I/O count |
| R5F566T7HDFP#30 | RX66T Group part; higher 160 MHz CPU, enhanced MTU3 for motor control (3-phase PWM with dead-time compensation), no GLCDC/DRW2D, same 176-pin LFBGA | Targeted at real-time motor drives rather than graphics-rich HMI; lacks integrated LCD controller but adds advanced timing precision | Select for servo/inverter control where deterministic PWM timing dominates over display capability |
Compared with R5F565N7FGFP#10, R5F565NEDFP#30 offers reduced memory and I/O in a smaller package for cost-sensitive applications, while R5F566T7HDFP#30 trades graphics acceleration for superior motor-control timing - making R5F565N7FGFP#10 optimal for secure, graphics-intensive industrial edge nodes.
Availability
R5F565N7FGFP#10 is available at Aetrix Electronics and suitable for industrial HMI, secure gateways, and networked energy meters requiring stable component supply, long-term lifecycle assurance, and automotive-grade temperature resilience.
Supply support for R5F565N7FGFP#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering trusted microcontrollers, analog, power, and SoC solutions for automotive, industrial, infrastructure, and IoT markets.
The RX65N Group, which includes R5F565N7FGFP#10, was designed specifically for secure, graphics-capable industrial edge devices - integrating safety features, rich connectivity, and embedded graphics acceleration into a single high-performance MCU platform.
FAQ
What is the operating temperature range for R5F565N7FGFP#10?
The R5F565N7FGFP#10 is rated for industrial operation from –40°C to +105°C (G-grade). This extended range supports deployment in harsh environments such as factory automation cabinets, outdoor gateways, and energy metering enclosures where ambient temperatures exceed standard commercial limits. The device's on-die temperature sensor provides real-time monitoring with ±1°C relative precision.
Does R5F565N7FGFP#10 include an integrated Ethernet PHY?
No, the R5F565N7FGFP#10 integrates only the Ethernet MAC (ETHERC) and associated EDMAC controller - it requires an external PHY chip for physical layer signaling. Its MII/RMII interface pins (ETH_MDC, ETH_MDIO, ETH_TXD[0:3], ETH_RXD[0:3]) are fully compliant with IEEE 802.3u and support 10/100 Mbps operation in full- or half-duplex mode. This separation enables flexible PHY selection based on noise immunity, power, or cost requirements.
How does the dual-bank flash architecture benefit firmware updates on R5F565N7FGFP#10?
The R5F565N7FGFP#10's dual-bank flash allows one bank to remain active for program execution while the other is reprogrammed - enabling truly seamless over-the-air (OTA) or field firmware updates without system downtime. Background programming/erasing (BGO) is supported, and bank swapping is controlled via the FASR register. This architecture meets IEC60730 Class B requirements for fail-safe update recovery and is essential for unattended industrial deployments.
Can R5F565N7FGFP#10 drive a high-resolution color LCD without external components?
Yes - the R5F565N7FGFP#10 integrates a full Graphic-LCD Controller (GLCDC) supporting up to 24-bit RGB output, HSYNC/VSYNC timing, and three independent display layers (background, graphic 1, graphic 2) with alpha blending. Combined with the DRW2D 2D drawing engine for hardware-accelerated bit-blitting and vector rendering, it drives WXGA (1280×800) panels directly. No external video RAM or graphics accelerator is required for typical industrial HMI implementations.
What security features does R5F565N7FGFP#10 provide for firmware protection?
R5F565N7FGFP#10 delivers multi-layer security: Trusted Memory (TM) prevents read-out of protected code flash regions; Memory Protection Unit (MPU) enforces eight configurable memory access zones; register write protection blocks unauthorized modification of critical control registers; and TSIP provides hardware-accelerated AES-128/192/256 encryption. These features collectively satisfy IEC60730 Class B functional safety and support secure boot, encrypted firmware updates, and tamper-resistant data storage in the R5F565N7FGFP#10.
R5F565N7FGFP#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX65N
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, QSPI, SCI, SPI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 78
- Program Memory Size:
- 768KB (768K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 22x12b; D/A 1x12b
- Oscillator Type:
- External
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F565N7FGFP#10 FAQ
1.How can I place an order for R5F565N7FGFP#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F565N7FGFP#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F565N7FGFP#10 reliable?
The price and inventory of R5F565N7FGFP#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F565N7FGFP#10 is usually 5 days.
3.What payment methods are accepted for R5F565N7FGFP#10?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F565N7FGFP#10 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F565N7FGFP#10?
R5F565N7FGFP#10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F565N7FGFP#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F565N7FGFP#10?
For technical support, including R5F565N7FGFP#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F565N7FGFP#10 requirements.
6.How does Aetrix verify that R5F565N7FGFP#10 is sourced from the original manufacturer or authorized distributors?
All R5F565N7FGFP#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F565N7FGFP#10 meets industry standards.
7.What is the process for return or replacement of R5F565N7FGFP#10?
All R5F565N7FGFP#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F565N7FGFP#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F565N7FGFP#10 part is unused and in its original packaging.
Return procedure for R5F565N7FGFP#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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