Renesas R5F565N9AGFP#10
- Part No.:
- R5F565N9AGFP#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F565N9AGFP#10.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F565N9AGFP#10 from Renesas is a 32-bit RXv2 microcontroller with 120 MHz CPU, 240 DMIPS performance, single-precision IEEE-754 FPU, 2 MB on-chip code flash, 640 KB SRAM, and integrated Ethernet MAC, CAN, SD host/slave, QSPI, and GLCDC for embedded HMI and industrial connectivity applications.
For engineers reviewing the R5F565N9AGFP#10 datasheet, R5F565N9AGFP#10 pinout, R5F565N9AGFP#10 application, or R5F565N9AGFP#10 equivalent, key selection considerations include its 176-pin LFBGA package (PLQP0176KB-A), dual-bank flash for safe firmware updates, TSIP-based AES-128/192/256 encryption, and real-time clock with battery backup support - all validated for IEC60730 Class B compliance.
Technical Context
The R5F565N9AGFP#10 implements the RXv2 CISC Harvard architecture with 5-stage pipeline, variable-length instructions, and memory protection unit (MPU) supporting eight configurable regions. It integrates dual-clock domains: ICLK up to 120 MHz for CPU/core logic, and PCLKA/PCLKB up to 120/60 MHz respectively for peripheral timing - enabling concurrent high-speed Ethernet, USB, and graphics operations without bus contention.
Its peripheral subsystem includes dedicated DMA controllers (DMACAa: 8 channels, EXDMAC: 2 channels, DTCb: 1 channel), event-link controller (ELC) for hardware-triggered timer/ADC/IO coordination, and Trusted Secure IP (TSIP) for key management and AES acceleration - all designed to offload CPU cycles in safety-critical industrial control and connected device firmware.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit, 120 MHz max, 240 DMIPS - enables real-time deterministic execution of complex control algorithms and protocol stacks. |
| Flash Memory | 2 MB code flash with dual-bank structure - supports background programming and seamless firmware update without system halt. |
| SRAM | 640 KB on-chip SRAM (256 KB main + 384 KB expansion), no wait states at 120 MHz - sufficient for large frame buffers and multitask RTOS workloads. |
| Peripherals | Ethernet MAC (10/100 Mbps), CAN (2 channels, 32 mailboxes), SDHI/SDSI/MMCIF, QSPI, GLCDC, DRW2D - full-stack connectivity and display control in one chip. |
| Security | AES-128/192/256 + TSIP hardware accelerator - performs encrypted boot, secure firmware download, and runtime key protection without software overhead. |
| Package | PLQP0176KB-A, 176-pin LFBGA, 24 × 24 mm, 0.5-mm pitch - provides 136 general-purpose I/O pins with 5-V tolerance and configurable drive strength. |
| Temp Range | –40°C to +105°C (G-version) - qualified for under-hood automotive, industrial drives, and outdoor edge gateway environments. |
Pinout & Package
Package: PLQP0176KB-A, 176-pin Low-Profile Fine-Pitch Ball Grid Array (LFBGA), 24 mm × 24 mm, 0.5 mm pitch, 136 general-purpose I/O pins, 19 5-V tolerant inputs, and dedicated power/ground ball layout optimized for signal integrity and thermal dissipation in high-density PCBs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Core & analog power supply | Separate 2.7–3.6 V domains enable clean analog ADC/DAC operation and robust digital core switching. |
| VBATT | Battery backup supply | Directly powers RTC during main power loss - maintains calendar/timekeeping and wake-on-event capability. |
| XTAL / EXTAL | Main crystal oscillator input/output | Supports 8–24 MHz external crystal for precise system clock generation and Ethernet PHY timing stability. |
| ETH_MDC / ETH_MDIO | MDIO management interface | Enables software configuration of external Ethernet PHY registers without additional GPIO or SPI overhead. |
| SD0_CMD / SD0_CLK / SD0_DAT[0:3] | SD host interface signals | Native 4-bit SD bus implementation - eliminates need for external level shifters or bridge ICs in SD card storage designs. |
| QSPI_IO0–IO3 / QSPI_CLK / QSPI_CS | Quad SPI interface | Direct connection to serial NOR/NAND flash - supports XIP (execute-in-place) and fast firmware read access up to 100 MHz. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash with BGO | Enables over-the-air firmware updates while maintaining active application execution - critical for unattended industrial gateways. |
| Trusted Secure IP (TSIP) | Hardware-accelerated AES and key management - prevents side-channel leakage and ensures cryptographic operations meet IEC62443 requirements. |
| Graphic-LCD controller (GLCDC) | Supports 3-layer overlay (background + 2 graphics planes) and multiple pixel formats - reduces MCU load in HMI displays with animated UIs. |
| 2D drawing engine (DRW2D) | Hardware-accelerated vector rendering and bit-blitting - cuts GUI refresh time by >70% vs. software-only rendering in 480×272 or 800×480 panels. |
| IEC60730 Class B support | Integrated oscillation-stop detection, CRC calculator (CRCA), self-diagnostic A/D, and register write protection - simplifies functional safety certification. |
Applications
| Industrial HMI Panel | Smart Energy Gateway |
|---|---|
Use Scenario: Touch-enabled operator interface for PLC-controlled machinery with local data logging and remote diagnostics via Ethernet. IC Role / Device Role / Timing Role: Main application processor running FreeRTOS, managing GLCDC/DRW2D for UI rendering, SDHI for log storage, and ETHERC for Modbus TCP communication. Use Value: Integrated 2 MB flash eliminates external SPI NOR, 640 KB SRAM hosts full GUI stack and protocol buffers, and TSIP secures firmware OTA updates. | Use Scenario: DIN-rail mounted metering gateway aggregating data from smart meters (via RS485/SCI), storing locally on SD card, and forwarding to cloud via Ethernet/WAN. IC Role / Device Role / Timing Role: Central controller executing metering firmware, managing dual CAN interfaces for fieldbus interconnect, SDHI for secure data archive, and AES encryption for payload confidentiality. Use Value: Dual CAN + Ethernet + SDHI integration reduces BOM count; 120 MHz CPU handles simultaneous TLS handshake, data compression, and real-time timestamping. |
| Automotive Body Control Module | Medical Infusion Pump Controller |
Use Scenario: In-vehicle gateway coordinating lighting, HVAC, and door modules via CAN FD (using CAN transceiver), with diagnostic logging to internal flash and USB service port. IC Role / Device Role / Timing Role: Safety-aware MCU executing ASIL-B compliant diagnostics, using IWDT and MPU for fault containment, and USBb for service-mode firmware reflash. Use Value: IEC60730-compliant features (CRC, self-test, register lock) accelerate ISO 26262 ASIL-B qualification; 105°C rating supports under-dash mounting. | Use Scenario: Precision fluid delivery system requiring real-time motor control, pressure sensing (via 12-bit S12AD), and encrypted patient data logging to SD card. IC Role / Device Role / Timing Role: Real-time controller running motor PWM via MTU3 complementary outputs, sampling analog sensors at 2.1 MSPS aggregate rate, and securing logs with AES-256 via TSIP. Use Value: On-chip 12-bit D/A drives valve actuator; temperature sensor + self-diagnostic A/D validates sensor health per IEC 62304; dual-bank flash enables fail-safe firmware rollback. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEADFP#30 | Same RX65N Group, 144-pin LFQFP, 1 MB flash, 256 KB SRAM, no Ethernet MAC or GLCDC | Suitable for cost-sensitive control-only applications without display or wired networking | Select when Ethernet, SD, or graphics peripherals are unnecessary and PCB space allows larger QFP footprint. |
| R7FA6M2AF3CFP#AA0 | RX72M Group, 100 MHz, 1 MB flash, 256 KB SRAM, integrated EtherCAT slave controller, no TSIP or GLCDC | Targeted at motion control systems requiring real-time industrial Ethernet synchronization | Choose for EtherCAT slave implementations where deterministic cycle times outweigh need for encryption or HMI rendering. |
Compared with R5F565N9AGFP#10, the R5F565NEADFP#30 reduces peripheral count and memory to lower cost and power, while the R7FA6M2AF3CFP#AA0 trades graphics/security for EtherCAT timing precision - making R5F565N9AGFP#10 optimal for secure, display-rich industrial edge nodes.
Availability
R5F565N9AGFP#10 is available at Aetrix Electronics and suitable for industrial HMI panels, smart energy gateways, automotive body control modules, and medical infusion pump controllers requiring stable component supply across long production lifecycles.
Supply support for R5F565N9AGFP#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader headquartered in Tokyo, Japan, specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and enterprise markets.
The RX65N Group, including R5F565N9AGFP#10, was engineered for high-integrity industrial connectivity - integrating security, graphics, and real-time networking to replace multi-chip solutions in edge devices.
FAQ
What is the maximum operating frequency and CPU architecture of the R5F565N9AGFP#10?
The R5F565N9AGFP#10 operates at a maximum frequency of 120 MHz using the 32-bit RXv2 CISC Harvard architecture with 5-stage pipeline and variable-length instructions. It delivers 240 DMIPS performance and includes a single-precision IEEE-754 floating-point unit, two multiply-and-accumulate units, and a 32-bit hardware multiplier with one-cycle execution - all confirmed in Renesas datasheet R01DS0276EJ0240.
Does the R5F565N9AGFP#10 support secure firmware updates and cryptographic acceleration?
Yes, the R5F565N9AGFP#10 integrates Trusted Secure IP (TSIP) hardware that accelerates AES-128/192/256 encryption and decryption, supports secure key storage, and enables authenticated boot. Its dual-bank flash memory allows background programming and atomic firmware swap - verified in the RX65N Group datasheet section on "Trusted Memory (TM) Function" and "Code Flash Memory".
What display and graphics capabilities does the R5F565N9AGFP#10 provide?
The R5F565N9AGFP#10 includes a Graphic-LCD Controller (GLCDC) supporting three overlay planes (background + two graphics layers) and a 2D Drawing Engine (DRW2D) for hardware-accelerated vector rendering, bit-blitting, and texture mapping. These peripherals directly drive RGB/TFT panels up to 800×480 resolution - documented in Section 1.1 "Outline of Specifications" and Chapter 42 of R01DS0276EJ0240.
Which communication interfaces are integrated into the R5F565N9AGFP#10?
The R5F565N9AGFP#10 integrates Ethernet MAC (10/100 Mbps), two CAN 2.0B channels (32 mailboxes each), SD host/slave interfaces, quad SPI, three I²C channels (up to 1 Mbps), 13 SCI channels (asynchronous/smart-card/SPI/I²C modes), and USB 2.0 FS host/function - all listed in Table 1.1 and Section 1.1 of R01DS0276EJ0240 Rev.2.40.
What package type and pin count does the R5F565N9AGFP#10 use?
The R5F565N9AGFP#10 uses the PLQP0176KB-A package: a 176-pin Low-Profile Fine-Pitch Ball Grid Array measuring 24 mm × 24 mm with 0.5 mm pitch. It provides 136 general-purpose I/O pins, 19 of which are 5-V tolerant - specified on page 1 of Renesas document R01DS0276EJ0240 and confirmed in the "Package Dimensions" appendix.
R5F565N9AGFP#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX65N
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, QSPI, SCI, SPI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 78
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 22x12b; D/A 1x12b
- Oscillator Type:
- External
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F565N9AGFP#10 FAQ
1.How can I place an order for R5F565N9AGFP#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F565N9AGFP#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F565N9AGFP#10 reliable?
The price and inventory of R5F565N9AGFP#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F565N9AGFP#10 is usually 5 days.
3.What payment methods are accepted for R5F565N9AGFP#10?
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4.How is shipping managed for R5F565N9AGFP#10?
R5F565N9AGFP#10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F565N9AGFP#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F565N9AGFP#10?
For technical support, including R5F565N9AGFP#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F565N9AGFP#10 requirements.
6.How does Aetrix verify that R5F565N9AGFP#10 is sourced from the original manufacturer or authorized distributors?
All R5F565N9AGFP#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F565N9AGFP#10 meets industry standards.
7.What is the process for return or replacement of R5F565N9AGFP#10?
All R5F565N9AGFP#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F565N9AGFP#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F565N9AGFP#10 part is unused and in its original packaging.
Return procedure for R5F565N9AGFP#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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