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Renesas R5F565N9EDFB#10
- Part No.:
- R5F565N9EDFB#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
R5F565N9EDFB#10.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 144LFQFP
- Quantity:
- Payment:
- Shipping:
Inventory:1,557
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Product details
Overview
R5F565N9EDFB#10 from Renesas is a 120-MHz 32-bit RXv2 core MCU with single-precision IEEE-754 FPU, 240 DMIPS performance, 2 Mbyte on-chip code flash (dual-bank), 640 Kbyte SRAM, and integrated Ethernet MAC, CAN, SD host/slave, QSPI, GLCDC, DRW2D, and TSIP encryption. It targets industrial HMI, networked gateways, and secure IoT edge controllers requiring real-time control, graphics, and connectivity.
For engineers reviewing the R5F565N9EDFB#10 datasheet, R5F565N9EDFB#10 pinout, R5F565N9EDFB#10 application, or R5F565N9EDFB#10 equivalent, key selection criteria include its 176-pin LFBGA package, -40°C to +85°C operating range, 12-bit dual A/D converters (29 total channels), 2-channel 12-bit D/A, and hardware-accelerated AES/TSIP for firmware integrity and secure boot.
Technical Context
The R5F565N9EDFB#10 implements the RXv2 CPU core with Harvard architecture, 5-stage pipeline, and variable-length instructions enabling ultra-compact code. It integrates a memory protection unit (MPU), Trusted Memory (TM) for code protection, and register write-protection to support IEC60730 Class B compliance.
Its clock system combines external crystal oscillators (8–24 MHz), internal PLL, and multiple on-chip oscillators (LOCO, HOCO, IWDT-dedicated 120-kHz). Peripheral clocks are independently configurable: PCLKA up to 120 MHz (for ETHERC, DRW2D), PCLKB up to 60 MHz (for TMR, CMT, S12AD unit 0), and PCLKD up to 60 MHz (for S12AD unit 1).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC Harvard, 120 MHz max, 240 DMIPS, IEEE-754 FPU, 72-bit accumulators |
| Memory | 2 Mbyte dual-bank code flash (0-wait ≤50 MHz), 640 Kbyte SRAM (no wait states), 32 Kbyte data flash (100k erase cycles) |
| Analog Peripherals | Two 12-bit A/D units (8 + 21 channels, 0.48 µs/ch), two 12-bit D/A channels, on-die temperature sensor (±1°C) |
| Connectivity | Ethernet MAC (10/100 Mbps, MII/RMII), CAN (2 channels, 32 mailboxes each), USB 2.0 FS host/function/OTG, SDHI/SDSI/MMCIF |
| Graphics & Timing | GLCDC (3-plane overlay), DRW2D (vector/bit-blit), 25+ timers including MTU3a (9-channel), TPUa (6-channel), CMTW (2×32-bit) |
| Security & Safety | TSIP encryption engine (AES-128/192/256), CRC calculator (8/32-bit), MPU (8 regions), IWDT with window function, IEC60730 support |
| Package & Environment | LFBGA-176 (13 × 13 mm, 0.8-mm pitch), industrial grade (–40°C to +85°C), 2.7–3.6 V supply |
Pinout & Package
Package: PLBG0176GA-A, 176-pin LFBGA, 13 × 13 mm, 0.8-mm pitch, exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, AVCC0, AVCC1 | Power supply inputs | Separate digital (VCC) and analog (AVCC0/AVCC1) rails; AVCC1 powers A/D and D/A converters |
| VSS, AVSS0, AVSS1 | Ground terminals | Digital ground (VSS), analog grounds (AVSS0/AVSS1); isolation critical for 12-bit analog accuracy |
| XTAL, EXTAL | Main clock oscillator pins | Support 8–24 MHz crystal/resonator for high-accuracy system timing and Ethernet PHY synchronization |
| MD0–MD3 | Mode setting pins | Determine boot mode (SCI/USB/FINE) and operating mode (single-chip/ROM-enabled extended) at reset release |
| ETH_MDC, ETH_MDIO, ETH_TXD[0:3], ETH_RXD[0:3], ETH_TX_EN, ETH_RX_ER | Ethernet physical interface | Direct MII/RMII connection to external PHY; no external magnetics required for RMII layout |
| SD0_CMD, SD0_CLK, SD0_DAT[0:3], SD0_CD, SD0_WP | SD host interface signals | Full 4-bit SD bus with card detect (CD) and write protect (WP) sensing; supports high-speed mode (25 MB/s) |
| CAN0_TX, CAN0_RX, CAN1_TX, CAN1_RX | CAN transceiver interfaces | Differential signaling per ISO11898-1; each channel supports standard/extended frames and 32 mailboxes |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash architecture | Enables background programming and seamless bank switching for OTA firmware updates without runtime interruption |
| Trusted Secure IP (TSIP) | Hardware-accelerated AES and secure key storage prevent firmware extraction and enable authenticated boot |
| Graphic-LCD controller (GLCDC) | Supports 3-layer overlay (background + 2 graphics planes), 32/16 bpp, CLUT formats - eliminates external frame buffer RAM |
| 2D drawing engine (DRW2D) | Offloads CPU for vector rendering (lines, circles), bit-blitting (copy/stretch/rotate), and texture mapping with run-length encoding |
| Event Link Controller (ELC) | 83 internal event sources linked without CPU intervention - e.g., TPU PWM trigger → A/D conversion start → DMA transfer |
| IEC60730 safety functions | Oscillation-stop detection, CRC calculator, IWDT windowing, self-diagnostic A/D, and register write protection meet Class B requirements |
Applications
| Industrial HMI Panel | Secure Edge Gateway |
|---|---|
Use Scenario: Touch-enabled operator interface for PLC-controlled machinery with local graphics rendering and remote diagnostics. IC Role / Device Role / Timing Role: Main application processor executing RTOS, driving TFT LCD via GLCDC/DRW2D, managing Ethernet/USB/SDI for firmware updates and data logging. Use Value: Integrated graphics engine reduces BOM cost vs. external GPU; dual-bank flash enables fail-safe field updates; TSIP secures remote access credentials. |
Use Scenario: Protocol-bridging device aggregating Modbus RTU, CAN bus, and sensor data into encrypted MQTT packets over Ethernet/WiFi. IC Role / Device Role / Timing Role: Central protocol translator with CAN/Ethernet/USB interfaces, AES-encrypted payload generation, and real-time timestamping via RTC with battery backup. Use Value: Hardware crypto acceleration ensures <10 ms latency for TLS handshake; 29-channel A/D monitors analog sensor inputs; SDHI stores logs locally during network outages. |
| Networked Energy Meter | Medical Data Logger |
Use Scenario: DIN-rail mounted smart meter with Ethernet backhaul, tamper detection, and harmonic analysis of AC waveforms. IC Role / Device Role / Timing Role: High-precision measurement controller using 12-bit A/D with sample-and-hold, FFT processing on FPU, and time-synchronized Ethernet reporting. Use Value: 0.48 µs A/D conversion enables >200 kSps sampling for Class 0.2 metering; MPU isolates metering firmware from communication stack; RTC maintains accurate billing timestamps. |
Use Scenario: Portable patient monitor recording ECG, SpO₂, and temperature with local display, SD card storage, and USB export. IC Role / Device Role / Timing Role: Signal acquisition hub with analog front-end conditioning, 12-bit D/A for calibration references, GLCDC-driven OLED display, and SDHI for HIPAA-compliant data archiving. Use Value: On-die temperature sensor calibrates analog path drift; dual A/D units allow simultaneous ECG (unit 0) and SpO₂ ADC (unit 1); TSIP encrypts stored PHI before SD write. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEHDFB#10 | Same RX65N Group, identical 176-pin LFBGA package, but 1.5 Mbyte flash and 256 Kbyte SRAM (vs. 2 Mbyte/640 Kbyte) | Suitable for cost-sensitive designs where full graphics or large OTA image storage is unnecessary | Select when firmware size <1.5 Mbyte and DRW2D/GLCDC usage is light; retains same peripheral set and pinout |
| R5F566TEHDFB#10 | RX66T Group part: higher 160 MHz CPU, enhanced MTU3 for motor control (3-phase PWM with dead-time), no GLCDC/DRW2D | Optimized for servo drives and inverters requiring precise PWM timing and encoder interfacing | Choose for motion control over HMI; lacks graphics subsystem but adds advanced timer features and faster FPU |
Compared with R5F565N9EDFB#10, R5F565NEHDFB#10 reduces memory capacity while maintaining identical footprint and peripherals, whereas R5F566TEHDFB#10 trades graphics capability for superior motor-control timing and computational throughput - neither is pin-compatible, but both share toolchain and ecosystem alignment.
Availability
R5F565N9EDFB#10 is available at Aetrix Electronics and suitable for industrial HMI, secure edge gateways, and networked energy meters requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F565N9EDFB#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and enterprise applications.
The RX65N Group, which includes R5F565N9EDFB#10, was designed for industrial human-machine interfaces and secure IoT edge devices requiring integrated graphics, connectivity, and functional safety certification.
FAQ
What is the maximum operating frequency and core type of the R5F565N9EDFB#10?
The R5F565N9EDFB#10 operates at a maximum frequency of 120 MHz using the 32-bit RXv2 CPU core. This core delivers 240 DMIPS performance and includes a single-precision IEEE-754 floating-point unit, 5-stage pipeline, and variable-length instruction set for compact code density. Its architecture supports real-time deterministic execution essential for industrial control tasks within the R5F565N9EDFB#10.
Does the R5F565N9EDFB#10 support dual-bank flash and background programming?
Yes, the R5F565N9EDFB#10 includes a dual-bank flash memory structure supporting background programming (BGO). This allows one bank to be executed while the other is being reprogrammed - enabling seamless over-the-air (OTA) firmware updates without halting application code. The R5F565N9EDFB#10's 2 Mbyte flash is partitioned to permit bank swapping at startup, critical for fail-safe field upgrades.
What graphics capabilities does the R5F565N9EDFB#10 provide?
The R5F565N9EDFB#10 integrates a Graphic-LCD Controller (GLCDC) supporting 3-plane overlay (background + two graphics layers), multiple pixel formats (32/16 bpp, CLUT), and a dedicated 2D Drawing Engine (DRW2D) for vector rendering and bit-blitting. These features eliminate the need for external frame buffer RAM and offload GUI rendering from the CPU - a key differentiator of the R5F565N9EDFB#10 in HMI applications.
How does the R5F565N9EDFB#10 ensure security and functional safety compliance?
The R5F565N9EDFB#10 incorporates Trusted Secure IP (TSIP) for hardware AES encryption, a memory protection unit (MPU), register write protection, and IEC60730-certified safety functions including oscillation-stop detection, CRC calculation, and independent watchdog timer (IWDT) with windowing. These features collectively enable secure boot, firmware integrity verification, and Class B compliance - core requirements addressed by the R5F565N9EDFB#10 design.
What is the package type and pin count of the R5F565N9EDFB#10?
The R5F565N9EDFB#10 uses a PLBG0176GA-A package: a 176-pin LFBGA with 13 × 13 mm body size and 0.8-mm pitch. It provides 136 general-purpose I/O pins (19 with 5-V tolerance), dedicated Ethernet, CAN, SD, USB, and QSPI interfaces, and thermal pad for enhanced power dissipation - matching the mechanical and routing requirements specified for the R5F565N9EDFB#10 in industrial PCB layouts.
R5F565N9EDFB#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 144-LQFP
- Series:
- RX65N
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RXv2
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, QSPI, SCI, SPI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 111
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F565N9EDFB#10 FAQ
1.How can I place an order for R5F565N9EDFB#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F565N9EDFB#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F565N9EDFB#10 reliable?
The price and inventory of R5F565N9EDFB#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F565N9EDFB#10 is usually 5 days.
3.What payment methods are accepted for R5F565N9EDFB#10?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F565N9EDFB#10 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F565N9EDFB#10?
R5F565N9EDFB#10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F565N9EDFB#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F565N9EDFB#10?
For technical support, including R5F565N9EDFB#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F565N9EDFB#10 requirements.
6.How does Aetrix verify that R5F565N9EDFB#10 is sourced from the original manufacturer or authorized distributors?
All R5F565N9EDFB#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F565N9EDFB#10 meets industry standards.
7.What is the process for return or replacement of R5F565N9EDFB#10?
All R5F565N9EDFB#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F565N9EDFB#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F565N9EDFB#10 part is unused and in its original packaging.
Return procedure for R5F565N9EDFB#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F565N9EDFB#10 Tags
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