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Renesas R5F565N9EGFB#30
- Part No.:
- R5F565N9EGFB#30
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
R5F565N9EGFB#30.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 144LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:180
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Product details
Overview
R5F565N9EGFB#30 from Renesas is a 32-bit RXv2 microcontroller with 120 MHz CPU, 2 MB on-chip flash, 640 KB SRAM, integrated Ethernet MAC, dual CAN channels, SD host/slave interfaces, and hardware AES/TSIP encryption. It operates from 2.7–3.6 V and supports –40°C to +105°C (G-version), targeting industrial HMI, networked gateways, and secure edge controllers.
For engineers reviewing the R5F565N9EGFB#30 datasheet, R5F565N9EGFB#30 pinout, R5F565N9EGFB#30 application, or R5F565N9EGFB#30 equivalent, key selection criteria include its 176-pin LFBGA package, dual-bank flash for safe firmware updates, 12-bit A/D with self-diagnostic capability, real-time clock with battery backup, and IEC60730-compliant safety features including CRC, IWDT, and register write protection.
Technical Context
The R5F565N9EGFB#30 implements the RXv2 CPU core with IEEE-754 single-precision FPU, 240 DMIPS performance, and CISC Harvard architecture with 5-stage pipeline. It integrates dedicated clocks for peripheral domains (PCLKA up to 120 MHz for ETHERC/DRW2D; PCLKB up to 60 MHz for timers/A/D), enabling concurrent high-speed and low-power operation.
Its memory subsystem includes 2 MB dual-bank code flash (with background programming), 32 KB data flash (100,000 erase cycles), 640 KB SRAM (256 KB main + 384 KB expansion), and 8 KB standby RAM. Peripheral interconnect uses Event Link Controller (ELC) to trigger timer, A/D, and DMA operations without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit, 120 MHz max, 240 DMIPS, IEEE-754 FPU, 5-stage pipeline |
| Memory | 2 MB dual-bank code flash (no-wait ≤50 MHz), 32 KB reprogrammable data flash, 640 KB SRAM (no-wait at 120 MHz) |
| Operating Range | –40°C to +105°C (G-version), 2.7–3.6 V supply, 0.19 mA/MHz typical active current |
| Connectivity | Ethernet MAC (10/100 Mbps, MII/RMII), 2× CAN (ISO11898-1, 32 mailboxes/channel), SDHI/SDSI/MMCIF, QSPI, 3× RSPI, 13× SCI, 3× I²C |
| Analog Peripherals | Two 12-bit A/D units (8 + 21 channels, 0.48 µs conversion), 2× 12-bit D/A, on-die temperature sensor (±1°C) |
| Security & Safety | AES-128/192/256, Trusted Secure IP (TSIP), MPU (8 regions), CRCA, IWDT with window function, register write protection |
| Package | LFBGA-176 (PLQP0176KB-A), 24 × 24 mm, 0.5 mm pitch, 136 general-purpose I/O pins (5-V tolerant on 19 pins) |
Pinout & Package
Package: PLQP0176KB-A - 176-pin Low-Profile Fine-Pitch Ball Grid Array, 24 mm × 24 mm body, 0.5 mm ball pitch, RoHS-compliant, lead-free solder compatible.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Power supply inputs | Separate analog/digital domains; AVCC1 powers A/D and D/A converters; all require 2.7–3.6 V |
| VBATT | Battery backup supply | Enables RTC operation during main power loss; connects to coin-cell or supercapacitor |
| XTAL / EXTAL | Main crystal oscillator terminals | Supports 8–24 MHz external crystal for precise system timing and Ethernet clock derivation |
| MD0 / MD1 | Mode setting pins | Determine boot mode (SCI/USB/FINE) and operating mode at reset release |
| ETH_MDC / ETH_MDIO | PHY management interface | IEEE 802.3-compliant MDIO bus for configuring external Ethernet PHY |
| ETXD0–ETXD3 / ERXD0–ERXD3 | Ethernet MAC data lines | MII interface signals; RMII mode uses subset (ETXD0, ERXD0, EREFCLK) |
| CAN0TX / CAN0RX / CAN1TX / CAN1RX | CAN transceiver I/O | Differential signal pairs per channel; require external CAN transceivers for physical layer |
| SD0CMD / SD0CLK / SD0DAT0–3 | SD host interface signals | 4-bit SD bus supporting high-speed mode (25 MB/s); compatible with SD/SDIO Ver. 3.01 |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash architecture | Enables seamless firmware updates: one bank executes while the other is reprogrammed in background |
| Event Link Controller (ELC) | Hardware-triggered peripheral chaining (e.g., TPU output → A/D start → DMA transfer) eliminates CPU polling overhead |
| IEC60730-compliant safety suite | Includes oscillation-stop detection, CRC calculator (8/32-bit), IWDT with configurable window, and A/D self-diagnostic voltage generation |
| Integrated graphics acceleration | GLCDC + DRW2D supports layered LCD display (3 planes) and hardware-accelerated 2D drawing (lines, circles, bit blit with rotation) |
| Secure boot & runtime protection | Trusted Memory (TM) prevents code read-out from flash; MPU enforces memory access permissions across 8 configurable regions |
Applications
| Industrial HMI Gateway | Secure Network Edge Node |
|---|---|
Use Scenario: Embedded controller in factory-floor HMIs connecting legacy PLCs via CAN and modern cloud infrastructure via Ethernet. IC Role / Device Role / Timing Role: Central MCU managing protocol translation, real-time data aggregation, and encrypted TLS offload using TSIP. Use Value: Dual CAN channels handle multiple fieldbus networks simultaneously; 2 MB flash stores dual firmware images for fail-safe OTA updates. | Use Scenario: Smart building node aggregating sensor data from BACnet MS/TP and Modbus RTU networks, forwarding to IP backbone. IC Role / Device Role / Timing Role: Secure edge processor executing IEC60730 Class B diagnostics, AES-encrypted data packaging, and time-stamped event logging via RTC. Use Value: Hardware CRC and IWDT ensure runtime integrity; 12-bit A/D with disconnection detection validates analog sensor health autonomously. |
| Medical Data Logger | Automated Test Equipment |
Use Scenario: Portable diagnostic device acquiring biopotential signals (ECG/EMG) and storing timestamped waveforms to SD card. IC Role / Device Role / Timing Role: Signal acquisition controller synchronizing 12-bit A/D sampling, DRW2D-based waveform rendering, and SDHI high-speed writes. Use Value: On-chip 640 KB SRAM buffers multi-second raw waveforms; SDHI supports 25 MB/s transfers for rapid data dump. | Use Scenario: Rack-mounted test instrument performing automated calibration of analog sensors using precision D/A stimulus and A/D measurement. IC Role / Device Role / Timing Role: Precision timing controller generating synchronized PWM (MTU3), analog stimulus (R12DA), and capture triggers (TPU → S12AD). Use Value: MTU3 complementary PWM with dead-time compensation drives H-bridge actuators; 0.48 µs A/D conversion enables kHz-rate closed-loop control. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEGFB#30 | Same RX65N Group, identical 176-pin LFBGA package, but with 1 MB code flash and 256 KB SRAM instead of 2 MB/640 KB | Suitable for cost-sensitive designs where firmware size and RAM footprint are constrained; lacks expansion RAM for large frame buffers or deep protocol stacks | Select when application firmware fits within 1 MB and does not require DRW2D/GLCDC frame buffer headroom beyond 256 KB |
| R5F566NHGFB#30 | RX66N Group successor: higher 160 MHz CPU, 4 MB flash, enhanced TSIP-Lite, but different pinout and no SD slave interface | Targets next-gen designs needing higher compute throughput and larger secure storage; incompatible PCB due to non-pin-compatible LFBGA-176 variant | Choose for new designs prioritizing future-proofing and cryptographic agility; not a drop-in replacement for R5F565N9EGFB#30 |
Compared with R5F565NEGFB#30, the R5F565N9EGFB#30 provides double flash and 2.5× more SRAM for complex GUI or protocol stack deployment; versus R5F566NHGFB#30, it offers proven pinout compatibility and SD slave support for legacy host-peripheral bridging roles.
Availability
R5F565N9EGFB#30 is available at Aetrix Electronics and suitable for industrial HMI, secure edge gateways, medical data loggers, and automated test equipment requiring stable component supply across extended temperature and long product lifecycles.
Supply support for R5F565N9EGFB#30 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader headquartered in Tokyo, Japan, specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and enterprise markets.
The RX65N Group, which includes the R5F565N9EGFB#30, was designed specifically for industrial automation and human-machine interface applications demanding real-time performance, functional safety compliance (IEC60730), and rich connectivity including Ethernet, CAN, and SD interfaces.
FAQ
What is the maximum operating frequency and CPU architecture of the R5F565N9EGFB#30?
The R5F565N9EGFB#30 features a 32-bit RXv2 CPU core with a maximum operating frequency of 120 MHz, delivering 240 DMIPS performance. It includes a single-precision IEEE-754 floating-point unit, 5-stage pipeline, and CISC Harvard architecture with variable-length instructions. This architecture enables deterministic real-time execution critical for industrial control loops and protocol stacks running on the R5F565N9EGFB#30.
Does the R5F565N9EGFB#30 support secure boot and runtime security features?
Yes, the R5F565N9EGFB#30 includes Trusted Memory (TM) to prevent unauthorized read-out of code flash, a Memory Protection Unit (MPU) with eight configurable regions, hardware AES-128/192/256 encryption, and Trusted Secure IP (TSIP) for key management and secure boot. These features collectively enable secure firmware authentication and runtime integrity verification required for IEC60730 Class B certification in safety-critical applications using the R5F565N9EGFB#30.
What are the supported communication interfaces on the R5F565N9EGFB#30?
The R5F565N9EGFB#30 integrates Ethernet MAC (10/100 Mbps, MII/RMII), two CAN 2.0B channels (32 mailboxes each), SD host and slave interfaces (SDHI/SDSI), quad SPI, three RSPI, 13 serial channels (SCIg/h/i), three I²C buses (up to 1 Mbps), USB 2.0 FS host/function, and MMCIF. This comprehensive set supports heterogeneous network bridging-such as CAN-to-Ethernet gateway functionality-without external bridge ICs, directly leveraging the R5F565N9EGFB#30's integrated peripherals.
How much on-chip memory does the R5F565N9EGFB#30 provide, and what are its characteristics?
The R5F565N9EGFB#30 includes 2 MB dual-bank code flash (enabling background programming and safe firmware updates), 32 KB data flash rated for 100,000 erase cycles, 640 KB SRAM (256 KB main + 384 KB expansion, no-wait at 120 MHz), and 8 KB standby RAM backed by VBATT. The dual-bank flash architecture allows the R5F565N9EGFB#30 to execute from one bank while reprogramming the other-essential for zero-downtime field updates in deployed systems.
What is the operating temperature range and package type of the R5F565N9EGFB#30?
The R5F565N9EGFB#30 is rated for –40°C to +105°C (G-version) and housed in a 176-pin LFBGA package (PLQP0176KB-A), measuring 24 mm × 24 mm with 0.5 mm ball pitch. This package supports 136 general-purpose I/O pins-including 19 with 5-V tolerance-and is optimized for thermal dissipation in industrial enclosures where the R5F565N9EGFB#30 operates under sustained load.
R5F565N9EGFB#30 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 144-LQFP
- Series:
- RX65N
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, QSPI, SCI, SPI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 111
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- External
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F565N9EGFB#30 FAQ
1.How can I place an order for R5F565N9EGFB#30 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F565N9EGFB#30 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F565N9EGFB#30 reliable?
The price and inventory of R5F565N9EGFB#30 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F565N9EGFB#30 is usually 5 days.
3.What payment methods are accepted for R5F565N9EGFB#30?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F565N9EGFB#30 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F565N9EGFB#30?
R5F565N9EGFB#30 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F565N9EGFB#30 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F565N9EGFB#30?
For technical support, including R5F565N9EGFB#30 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F565N9EGFB#30 requirements.
6.How does Aetrix verify that R5F565N9EGFB#30 is sourced from the original manufacturer or authorized distributors?
All R5F565N9EGFB#30 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F565N9EGFB#30 meets industry standards.
7.What is the process for return or replacement of R5F565N9EGFB#30?
All R5F565N9EGFB#30 units undergo pre-shipment inspection (PSI). If there is an issue with R5F565N9EGFB#30, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F565N9EGFB#30 part is unused and in its original packaging.
Return procedure for R5F565N9EGFB#30:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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