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Renesas R5F565N9EGLK#20
- Part No.:
- R5F565N9EGLK#20
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 145-TFLGA
- Datasheet:
-
R5F565N9EGLK#20.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 145TFLGA
- Quantity:
- Payment:
- Shipping:
Inventory:416
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Product details
Overview
R5F565N9EGLK#20 from Renesas is a 120-MHz 32-bit RXv2 microcontroller with integrated FPU, 240 DMIPS performance, 2 MB on-chip code flash, 640 KB SRAM, Ethernet MAC, dual CAN, SD host/slave, QSPI, and hardware AES-128/192/256 encryption - designed for industrial HMI, networked gateways, and secure edge controllers.
For engineers reviewing the R5F565N9EGLK#20 datasheet, R5F565N9EGLK#20 pinout, R5F565N9EGLK#20 application, or R5F565N9EGLK#20 equivalent, this MCU delivers deterministic real-time control, IEC60730-compliant safety features, dual-bank flash for safe firmware updates, and full-speed USB 2.0 host/function support - critical for certified embedded systems requiring field-upgradable connectivity and cryptographic integrity.
Technical Context
The R5F565N9EGLK#20 implements the RXv2 CISC Harvard architecture with 5-stage pipeline, single-cycle 32×32 multiplier, two MAC units, and IEEE-754-compliant FPU - enabling high-precision motor control and sensor fusion at 120 MHz. Its clock system integrates PLL, HOCO (16/18/20 MHz), LOCO (240 kHz), and IWDT-dedicated oscillator for independent timing domains.
It supports four low-power modes (sleep, all-module stop, software standby, deep software standby), battery-backed RTC with time-capture, and MPU-enforced memory protection across eight regions. Peripheral clocks are independently configurable: PCLKA up to 120 MHz (for ETHERC, DRW2D), PCLKB up to 60 MHz (for TMR, CMT, S12AD unit 0), and PCLKD up to 60 MHz (for S12AD unit 1).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC with 5-stage pipeline, 240 DMIPS @ 120 MHz - enables real-time deterministic execution of complex control algorithms. |
| Flash Memory | 2 MB dual-bank code flash - allows background programming and seamless bank switching for zero-downtime firmware updates. |
| SRAM | 640 KB on-chip SRAM (256 KB + 384 KB expansion) - supports large frame buffers for GLCDC and DRW2D graphics rendering without external memory. |
| Connectivity | Ethernet MAC (10/100 Mbps MII/RMII), 2× CAN (ISO 11898-1), 3× RSPI, 1× QSPI, 3× I²C (1 Mbps), 13× SCI - meets requirements for industrial protocol bridging and multi-interface edge nodes. |
| Analog Peripherals | Two 12-bit A/D converters (8 + 21 channels), 2× 12-bit D/A, on-die temperature sensor (±1°C) - supports precision analog monitoring and closed-loop feedback in motor drives and power supplies. |
| Security | AES-128/192/256 engine + Trusted Secure IP (TSIP) - provides hardware-accelerated encryption for secure boot, OTA updates, and data-at-rest protection. |
| Package | LFBGA-176 (PLQP0176KB-A, 24 × 24 mm, 0.5 mm pitch) - supports high I/O count (136 GPIOs, 19× 5-V tolerant) and thermal management for industrial ambient operation. |
Pinout & Package
LFBGA-176 package (PLQP0176KB-A, 24 × 24 mm, 0.5 mm pitch) with 136 general-purpose I/O pins, 19 of which are 5-V tolerant, plus dedicated power, ground, clock, reset, debug (JTAG/FINE), and peripheral function pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Core & analog power supply | Separate 2.7–3.6 V domains for digital logic and ADC/DAC reference stability; AVCC1 powers S12AD unit 1 and R12DA. |
| VSS / AVSS1 | Digital & analog ground | Independent grounding reduces noise coupling between high-speed digital and sensitive analog circuits. |
| XTAL / EXTAL | Main crystal oscillator input/output | Supports 8–24 MHz external crystal for precise system clock generation and Ethernet timing compliance. |
| RES# | Active-low reset input | Asynchronous hardware reset with internal pull-up; initiates full system initialization including flash and peripheral state recovery. |
| TMS / TCK / TDI / TDO | JTAG debug interface | Enables full boundary-scan testing, real-time debugging, and flash programming via standard JTAG tools. |
| MD0 / MD1 | Mode selection pins | Determine boot source (on-chip ROM, SCI, USB, or FINE) and operating mode at power-on reset. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash architecture | Enables concurrent read-while-write and atomic bank swap - eliminates firmware update downtime in mission-critical systems. |
| IEC60730-compliant safety functions | Oscillation-stop detection, CRC calculator (CRCA), self-diagnostic A/D, register write protection - satisfies Class B functional safety requirements without external components. |
| Graphics subsystem | Integrated GLCDC + DRW2D - renders layered GUIs (3 planes), performs vector drawing and bit-blitting in hardware, reducing CPU load by >70% vs. software rendering. |
| Event Link Controller (ELC) | 83 internal event signals routed without CPU intervention - enables deterministic, low-latency peripheral chaining (e.g., timer-triggered ADC capture → DMA transfer → interrupt). |
| SD host/slave + MMCIF | Single-chip support for SD memory, SDIO peripherals, and eMMC - simplifies storage architecture in HMI and data-logging applications. |
Applications
| Industrial HMI Controller | Secure IoT Gateway |
|---|---|
Use Scenario: Touch-based human-machine interface for PLC-controlled machinery with local graphics rendering and remote diagnostics. IC Role / Device Role / Timing Role: Primary application processor managing GLCDC display output, DRW2D graphics acceleration, touch controller SPI interface, and Ethernet/USB communication stack. Use Value: 640 KB SRAM hosts full framebuffer and GUI assets; dual-bank flash enables silent OTA updates; TSIP secures firmware integrity against tampering. |
Use Scenario: Edge gateway aggregating Modbus RTU, CAN bus, and sensor data for cloud upload via TLS-secured Ethernet or USB tethering. IC Role / Device Role / Timing Role: Protocol translation hub with real-time scheduling (RXv2 interrupt latency < 0.1 µs), hardware AES for TLS offload, and dual CAN for fieldbus bridging. Use Value: 2 MB flash stores multiple protocol stacks; 136 GPIOs interface diverse sensors and actuators; IEC60730 features satisfy industrial cybersecurity certification. |
| Networked Motor Drive | Medical Data Logger |
Use Scenario: Closed-loop servo drive with position feedback, current sensing, and EtherCAT or custom Ethernet-based motion control. IC Role / Device Role / Timing Role: Real-time motion controller executing PID loops at 20 kHz using MTU3 PWM outputs, S12AD sampling, and FPU-based trajectory calculation. Use Value: 120 MHz CPU + FPU delivers sub-microsecond loop times; complementary PWM with dead-time insertion ensures safe IGBT switching; ELC synchronizes ADC capture to PWM edges. |
Use Scenario: Portable diagnostic device acquiring ECG, temperature, and SpO₂ signals, storing encrypted logs to SD card, and uploading via USB to clinical systems. IC Role / Device Role / Timing Role: Sensor fusion hub with simultaneous 12-bit A/D conversion (21-channel S12AD unit 1), on-die temperature compensation, and AES-256 encryption before SD write. Use Value: Dual A/D units allow concurrent acquisition; 8 KB standby RAM preserves session state during battery swaps; TSIP meets HIPAA-aligned data-at-rest requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEGFLK#20 | Same RX65N core, identical 2 MB flash and 640 KB SRAM, but in 144-pin LFQFP (PLQP0144KA-B) - 25 fewer GPIOs, no Ethernet PHY, no SD slave interface. | Suitable for cost-sensitive, space-constrained designs where Ethernet and SDIO peripheral integration are not required. | Select when board layout favors QFP, lower I/O count suffices, and external PHY/SD controller acceptable. |
| R5F566TEGFLK#20 | RX66T group part: higher 160 MHz CPU, enhanced MTU3 for 3-phase motor control, no Ethernet MAC or SD interfaces, 1.5 MB flash, 512 KB SRAM. | Optimized for high-performance motor control (e.g., inverters, robotics) rather than networking or HMI. | Choose for servo drives needing faster PWM resolution and advanced encoder interfaces - not for connectivity-centric roles. |
Compared with R5F565NEGFLK#20, the R5F565N9EGLK#20 adds Ethernet PHY, SD slave, and 20 extra GPIOs in LFBGA; versus R5F566TEGFLK#20, it trades motor-control enhancements for comprehensive connectivity and graphics - making it uniquely suited for secure, display-rich industrial edge nodes.
Availability
R5F565N9EGLK#20 is available at Aetrix Electronics and suitable for industrial HMI, secure IoT gateways, networked motor drives, and medical data loggers requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F565N9EGLK#20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and enterprise markets.
The RX65N Group, including R5F565N9EGLK#20, was designed for secure, connected industrial equipment - integrating real-time control, rich graphics, and hardware security to replace multi-chip solutions in HMI, gateway, and edge intelligence applications.
FAQ
What is the maximum operating frequency and core architecture of the R5F565N9EGLK#20?
The R5F565N9EGLK#20 operates at a maximum frequency of 120 MHz using the 32-bit RXv2 CPU core with 5-stage pipeline, CISC Harvard architecture, and IEEE-754-compliant single-precision FPU. It delivers 240 DMIPS performance and supports variable-length instructions for ultra-compact code density - essential for memory-constrained industrial firmware.
Does the R5F565N9EGLK#20 include hardware encryption and safety features for certified applications?
Yes, the R5F565N9EGLK#20 integrates AES-128/192/256 encryption engines and Trusted Secure IP (TSIP) for secure boot and data protection. It also includes IEC60730-compliant features: oscillation-stop detection, CRC calculator (CRCA), self-diagnostic A/D, register write protection, and memory protection unit (MPU) - enabling Class B certification without external components.
What package type and pin count does the R5F565N9EGLK#20 use, and how many GPIOs are available?
The R5F565N9EGLK#20 uses a 176-pin LFBGA package (PLQP0176KB-A, 24 × 24 mm, 0.5 mm pitch) and provides 136 general-purpose I/O pins. Of these, 19 pins are 5-V tolerant, all support pull-up resistors and open-drain output - ideal for interfacing with legacy industrial sensors and actuators.
Can the R5F565N9EGLK#20 support both SD memory cards and SDIO peripherals?
Yes, the R5F565N9EGLK#20 integrates a full SD host interface (SDHI) compliant with SD Physical Layer Spec v3.01 and SDIO Spec v3.00, supporting 1-/4-bit buses and high-speed mode (25 MB/s). It also includes an SD slave interface (SDSI) compliant with SDIO Card Spec v2.00 - enabling dual-role storage and peripheral expansion (e.g., Wi-Fi modules).
What are the key graphics and display capabilities of the R5F565N9EGLK#20?
The R5F565N9EGLK#20 features a dedicated Graphic-LCD Controller (GLCDC) supporting 3-layer superposition (background, graphic 1, graphic 2) and a 2D Drawing Engine (DRW2D) for hardware-accelerated vector drawing, bit-blitting, rotation, and scaling. With 640 KB SRAM, it handles full-color framebuffers for QVGA/WVGA displays without external memory.
R5F565N9EGLK#20 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 145-TFLGA
- Series:
- RX65N
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, QSPI, SCI, SPI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 111
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- External
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F565N9EGLK#20 FAQ
1.How can I place an order for R5F565N9EGLK#20 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F565N9EGLK#20 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F565N9EGLK#20 reliable?
The price and inventory of R5F565N9EGLK#20 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F565N9EGLK#20 is usually 5 days.
3.What payment methods are accepted for R5F565N9EGLK#20?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F565N9EGLK#20 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F565N9EGLK#20?
R5F565N9EGLK#20 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F565N9EGLK#20 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F565N9EGLK#20?
For technical support, including R5F565N9EGLK#20 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F565N9EGLK#20 requirements.
6.How does Aetrix verify that R5F565N9EGLK#20 is sourced from the original manufacturer or authorized distributors?
All R5F565N9EGLK#20 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F565N9EGLK#20 meets industry standards.
7.What is the process for return or replacement of R5F565N9EGLK#20?
All R5F565N9EGLK#20 units undergo pre-shipment inspection (PSI). If there is an issue with R5F565N9EGLK#20, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F565N9EGLK#20 part is unused and in its original packaging.
Return procedure for R5F565N9EGLK#20:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F565N9EGLK#20 Tags
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