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Renesas R5F565N9FGFB#30
- Part No.:
- R5F565N9FGFB#30
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
R5F565N9FGFB#30.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 144LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:180
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Product details
Overview
R5F565N9FGFB#30 from Renesas is a 32-bit RXv2 microcontroller with 120 MHz CPU, 2 MB on-chip code flash, 640 KB SRAM, integrated Ethernet MAC, dual CAN channels, SD host/slave interfaces, and hardware AES-128/192/256 encryption - deployed in industrial HMI, networked gateway, and secure IoT edge controllers.
For engineers reviewing the R5F565N9FGFB#30 datasheet, R5F565N9FGFB#30 pinout, R5F565N9FGFB#30 application, or R5F565N9FGFB#30 equivalent, key selection criteria include its 176-pin LFBGA package (PLQP0176KB-A), 120 MHz real-time performance with FPU, dual-bank flash for safe firmware updates, 2-channel CAN with 32 mailboxes per channel, and IEC60730-compliant safety features including CRC, IWDT, and register write protection.
Technical Context
The R5F565N9FGFB#30 implements the RXv2 CISC Harvard architecture with 5-stage pipeline, supporting IEEE-754 single-precision floating-point operations and two multiply-accumulate units. Its clock system integrates PLL, HOCO (16/18/20 MHz), LOCO (240 kHz), and dedicated IWDT oscillator (120 kHz).
Peripheral subsystems operate on independent clocks: PCLKA (up to 120 MHz) drives ETHERC, EDMAC, AES, GLCDC, and DRW2D; PCLKB (up to 60 MHz) serves TMR, CMT, S12AD unit 0, and most I/O; PCLKC/D (up to 60 MHz) feed S12AD units separately. The ELC enables zero-CPU-intervention event linking across 83 internal signals.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit, 120 MHz max, 240 DMIPS, IEEE-754 FPU, 5-stage pipeline |
| Memory | 2 MB dual-bank code flash (no-wait ≤50 MHz), 640 KB SRAM (no-wait at 120 MHz), 32 KB data flash (100k erase cycles) |
| Connectivity | Ethernet MAC + RMII/MII, 2× CAN (ISO11898-1, 32 mailboxes/channel), 3× RSPI, 1× QSPI, 3× RIIC (1 Mbps), 13× SCI |
| Analog | Two 12-bit A/D units (8 + 21 ch), 2× 12-bit D/A, on-die temperature sensor (±1°C), self-diagnostic A/D |
| Security & Safety | AES-128/192/256, TSIP, MPU (8 regions), Trusted Memory (TM), CRCA, IWDT with window function, register write protection |
| Package | PLQP0176KB-A: 176-pin LFBGA, 24 × 24 mm, 0.5 mm pitch, –40°C to +105°C (G-version) |
| I/O & Timers | 136 general-purpose I/O pins (5-V tolerant, open-drain, pull-up), 25+ timers including MTU3a (9 ch), TPUa (6 ch), CMTW (2×32-bit) |
Pinout & Package
Package: PLQP0176KB-A - 176-pin Low-Profile Fine-Pitch Ball Grid Array (LFBGA), 24 mm × 24 mm, 0.5 mm ball pitch, lead-free, RoHS compliant, rated for –40°C to +105°C operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, AVCC0, AVCC1 | Power supply inputs | Core (VCC), analog unit 0 (AVCC0), analog unit 1 (AVCC1) - all require 2.7–3.6 V; separate domains enable noise isolation |
| VBATT | Battery backup supply | Provides power to RTC during main supply loss; enables calendar/timekeeping in deep software standby mode |
| XTAL/EXTAL | Main crystal oscillator interface | Supports 8–24 MHz external crystal; used for high-accuracy system clock and RTC reference |
| MD0–MD2 | Mode setting pins | Determine boot mode (SCI/USB/FINE) and operating mode (single-chip/extended) at reset release |
| ETH_MDC/ETH_MDIO | IEEE 802.3 management interface | Enables PHY configuration and status readback via SMI; required for RMII/MII Ethernet initialization |
| CAN0_TX/CAN0_RX | Channel 0 CAN transceiver I/O | Differential signaling pair compliant with ISO11898-1; supports standard/extended frames at up to 1 Mbps |
| SD0_CLK/SD0_CMD/SD0_DAT0–3 | SD host interface signals | 4-bit SD bus supporting high-speed mode (25 MB/s); includes card detection and write-protect sensing |
| QSPI_IO0–3/QSPI_CLK/QSPI_SSL | Quad SPI interface | Direct connection to serial NOR flash; supports single/dual/quad I/O modes with programmable clock phase/polarity |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash architecture | Enables background programming and seamless bank switching - critical for OTA firmware updates without runtime interruption |
| IEC60730 Class B compliance support | Integrated oscillation-stop detection, CRC calculator (CRCA), IWDT with windowing, A/D self-test, and register lock - reduces external safety component count |
| Event Link Controller (ELC) | Hardware routing of 83 internal events (e.g., timer overflow → A/D trigger → DMA request) eliminates CPU polling and interrupt latency |
| Graphic-LCD + DRW2D subsystem | On-chip GLCDC with 3-plane overlay and DRW2D engine (vector draw, bit blit, rotation) offloads GUI rendering from CPU |
| Secure boot & memory protection | Trusted Memory (TM) prevents code readout from designated flash regions; MPU enforces access permissions across 8 configurable memory areas |
Applications
| Industrial HMI Panel | Smart Gateway Controller |
|---|---|
Use Scenario: Touch-enabled factory floor display with real-time process visualization, alarm logging, and local PLC communication. IC Role / Device Role / Timing Role: Main application processor running RTOS, driving 480×272 LCD via GLCDC, sampling analog sensors via S12AD, and communicating over CAN/RSPI. Use Value: Integrated DRW2D accelerates UI rendering; dual-bank flash allows silent firmware patching; 136 GPIOs support direct button/LED control without external expanders. | Use Scenario: Edge node aggregating Modbus RTU, CAN bus, and BLE sensor data, then forwarding to cloud via Ethernet or USB host. IC Role / Device Role / Timing Role: Central protocol translator and security anchor - terminates field buses, encrypts payloads with AES, and manages TLS handshake via USB-hosted modem. Use Value: Dual CAN + Ethernet + USB FS host eliminates need for bridge ICs; TSIP and TM protect firmware keys; SDHI enables local log storage on removable media. |
| Secure IoT Edge Node | Networked Energy Meter |
Use Scenario: Tamper-resistant smart meter with encrypted firmware, remote firmware update, and cryptographic signing of consumption reports. IC Role / Device Role / Timing Role: Root-of-trust MCU executing signed bootloader, performing AES-GCM encryption of telemetry, and validating firmware signatures using TSIP. Use Value: Hardware-accelerated AES and secure key storage prevent side-channel attacks; register write protection blocks accidental corruption of security-critical registers. | Use Scenario: DIN-rail mounted electricity meter with pulse counting, harmonic analysis, and DLMS/COSEM over TCP/IP. IC Role / Device Role / Timing Role: Real-time measurement controller - synchronizes 12-bit A/D sampling to line cycle via MTU3 capture, computes RMS/harmonics in FPU, and serves web UI via Ethernet MAC. Use Value: 120 MHz FPU delivers 50-cycle RMS calculation per half-cycle; PCLKC-synchronized S12AD ensures precise timing; RTC with battery backup maintains billing timestamps during outages. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEBDFB#30 | Same RX65N Group, identical 176-pin LFBGA package, but 1 MB code flash and 256 KB SRAM (vs. 2 MB/640 KB) | Suitable for cost-sensitive designs where full memory capacity is unnecessary; lacks dual-bank flash for atomic updates | Select when firmware size < 1 MB and background programming is not required. |
| R5F566TEBDFB#30 | RX66T Group part: higher 160 MHz CPU, enhanced PWM (3-phase complementary with dead-time control), no Ethernet or SD interfaces | Optimized for motor control (inverters, servo drives); lacks connectivity peripherals needed for gateway/HMI roles | Choose for real-time motor control where Ethernet/SD/IoT security are secondary. |
Compared with R5F565N9FGFB#30, the R5F565NEBDFB#30 offers reduced memory and no dual-bank capability but lower cost, while the R5F566TEBDFB#30 trades connectivity for superior motor-control timing precision - making R5F565N9FGFB#30 uniquely balanced for secure, connected industrial edge devices requiring both rich I/O and cryptographic integrity.
Availability
R5F565N9FGFB#30 is available at Aetrix Electronics and suitable for industrial HMI, smart gateway, and secure IoT edge applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F565N9FGFB#30 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering trusted embedded solutions for automotive, industrial, infrastructure, and IoT markets.
The RX65N Group - including R5F565N9FGFB#30 - was designed for high-integrity, connected industrial applications demanding real-time performance, functional safety (IEC60730), and hardware security (AES/TSIP) in a single chip.
FAQ
What is the maximum operating frequency and core type of the R5F565N9FGFB#30?
The R5F565N9FGFB#30 features a 32-bit RXv2 CPU core with a maximum operating frequency of 120 MHz, delivering 240 DMIPS performance. It includes single-precision IEEE-754 floating-point support, two multiply-accumulate units, and a 5-stage pipeline - enabling deterministic real-time execution for industrial control and HMI applications. This specification is confirmed in the official R01DS0276EJ0240 datasheet Rev.2.40.
Does the R5F565N9FGFB#30 support dual-bank flash for safe firmware updates?
Yes, the R5F565N9FGFB#30 supports dual-bank flash architecture, allowing background programming of one bank while executing code from the other. This enables atomic firmware updates without system interruption - essential for secure over-the-air (OTA) deployment in industrial gateways and IoT edge nodes. The feature is documented in Section 1.1 of the R01DS0276EJ0240 datasheet.
What package type and pin count does the R5F565N9FGFB#30 use?
The R5F565N9FGFB#30 uses the PLQP0176KB-A package: a 176-pin Low-Profile Fine-Pitch Ball Grid Array (LFBGA) measuring 24 mm × 24 mm with 0.5 mm ball pitch. It is rated for –40°C to +105°C operation (G-version) and supports 136 general-purpose I/O pins. This mechanical specification is defined in the Renesas RX65N Group datasheet R01DS0276EJ0240.
Which communication interfaces are integrated into the R5F565N9FGFB#30?
The R5F565N9FGFB#30 integrates Ethernet MAC (MII/RMII), 2-channel CAN (ISO11898-1, 32 mailboxes/channel), SD host/slave interfaces, quad SPI, 3× RSPI, 3× I2C (RIIC), 13× SCI, USB 2.0 FS host/function, and MMCIF. These interfaces enable comprehensive connectivity for industrial gateways, HMIs, and secure edge devices - all confirmed in Table 1.1 of the R01DS0276EJ0240 datasheet.
How does the R5F565N9FGFB#30 meet IEC60730 Class B requirements?
The R5F565N9FGFB#30 meets IEC60730 Class B requirements through integrated hardware safety features: oscillation-stop detection, CRC calculator (CRCA), independent watchdog timer (IWDT) with windowing, A/D converter self-diagnostic function, and register write protection. These reduce external component count and simplify certification - detailed in Section 1.1 "Useful functions for IEC60730 compliance" of the R01DS0276EJ0240 datasheet.
R5F565N9FGFB#30 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 144-LQFP
- Series:
- RX65N
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, QSPI, SCI, SPI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 111
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- External
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F565N9FGFB#30 FAQ
1.How can I place an order for R5F565N9FGFB#30 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F565N9FGFB#30 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F565N9FGFB#30 reliable?
The price and inventory of R5F565N9FGFB#30 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F565N9FGFB#30 is usually 5 days.
3.What payment methods are accepted for R5F565N9FGFB#30?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F565N9FGFB#30 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F565N9FGFB#30?
R5F565N9FGFB#30 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F565N9FGFB#30 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F565N9FGFB#30?
For technical support, including R5F565N9FGFB#30 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F565N9FGFB#30 requirements.
6.How does Aetrix verify that R5F565N9FGFB#30 is sourced from the original manufacturer or authorized distributors?
All R5F565N9FGFB#30 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F565N9FGFB#30 meets industry standards.
7.What is the process for return or replacement of R5F565N9FGFB#30?
All R5F565N9FGFB#30 units undergo pre-shipment inspection (PSI). If there is an issue with R5F565N9FGFB#30, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F565N9FGFB#30 part is unused and in its original packaging.
Return procedure for R5F565N9FGFB#30:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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