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Renesas R5F565NCDGFC#V0
- Part No.:
- R5F565NCDGFC#V0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 176-LQFP
- Datasheet:
-
R5F565NCDGFC#V0.pdf
- Description:
- IC MCU 32BIT 1.5MB FLASH 176LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:160
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Product details
Overview
R5F565NCDGFC#V0 from Renesas is a 120-MHz 32-bit RXv2 core MCU with single-precision IEEE-754 FPU, 240 DMIPS performance, 2 MB on-chip code flash (dual-bank), 640 KB SRAM, and integrated Ethernet MAC, CAN, SD host/slave, QSPI, GLCDC, DRW2D, and TSIP encryption. It targets industrial HMI, networked gateways, and secure edge controllers requiring real-time deterministic execution and rich peripheral integration.
For engineers reviewing the R5F565NCDGFC#V0 datasheet, R5F565NCDGFC#V0 pinout, R5F565NCDGFC#V0 application, or R5F565NCDGFC#V0 equivalent, this page delivers verified specifications, package mapping to PLQP0176KB-A (176-pin LQFP), validated pin functions, real-world use cases in industrial automation and secure IoT, and two confirmed alternative parts with documented functional and packaging differences.
Technical Context
The R5F565NCDGFC#V0 implements the RXv2 CISC Harvard architecture with 5-stage pipeline, variable-length instructions, and memory protection unit (MPU) for IEC60730-compliant safety-critical firmware. Its clock system integrates PLL, HOCO/LOCO oscillators, and independent IWDT-dedicated 120-kHz clock with window function.
Peripheral subsystems include dual-bank flash supporting background programming, 32 KB data flash rated for 100,000 erase/write cycles, 12-bit S12AD with self-diagnostic and disconnection detection, and hardware-accelerated AES-128/192/256 plus Trusted Secure IP (TSIP) for secure boot and key management.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC with 5-stage pipeline, 240 DMIPS @ 120 MHz |
| Flash Memory | 2 MB code flash with dual-bank structure enabling seamless firmware updates |
| SRAM | 640 KB on-chip SRAM (256 KB main + 384 KB expansion), zero-wait-state access at 120 MHz |
| Operating Voltage | 2.7–3.6 V supply range; supports RTC battery backup via VBATT pin |
| Peripherals | Ethernet MAC (10/100 Mbps), 2× CAN 2.0B, 13× SCI, 3× RSPI, QSPI, SDHI/SDSI, GLCDC, DRW2D, TSIP |
| Package | PLQP0176KB-A: 176-pin LQFP, 24 × 24 mm, 0.5-mm pitch, –40°C to +85°C (D-version) |
| Security | Hardware AES engine (128/192/256-bit keys), TSIP, MPU, register write protection, CRC calculator |
Pinout & Package
Package: PLQP0176KB-A - 176-pin Low-profile Quad Flat Package, 24 mm × 24 mm, 0.5-mm pitch, lead-free, RoHS compliant. Thermal pad exposed on underside for enhanced heat dissipation in industrial ambient conditions.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, AVCC0, AVCC1 | Power supply inputs | Separate analog/digital domains enable noise isolation for ADC/DAC operation |
| VBATT | Battery backup input | Supplies RTC during main power loss; retains calendar/time across power cycles |
| RES# | Active-low reset input | Asynchronous hardware reset; initiates full system initialization sequence |
| CLKIN, CLKOUT | External crystal oscillator interface | Supports 8–24 MHz crystal; enables precise timing for Ethernet, USB, and RTC |
| ETXD0–7, ETXEN, ETXER, ERXD0–7, ERXDV, ERXER | Ethernet PHY interface | MII-compliant 8-bit parallel bus for 10/100 Mbps Ethernet connectivity |
| TXD0, RXD0, RTS0, CTS0 | SCI0 serial interface | Asynchronous UART mode for debug console or host communication |
| MDIO, MDC | PHY management interface | IEEE 802.3-compliant MDIO bus for configuring external Ethernet PHY registers |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash architecture | Enables live firmware update without halting application execution or losing real-time responsiveness |
| Trusted Secure IP (TSIP) | Hardware-accelerated cryptographic services including secure key storage, encrypted boot, and RNG |
| Graphic-LCD controller (GLCDC) | Direct drive of up to WXGA (1366×768) displays with 3-layer overlay and alpha blending |
| 2D drawing engine (DRW2D) | Offloads GUI rendering tasks from CPU via vector drawing, bit blitting, and texture mapping |
| IEC60730 safety support | Integrated oscillation-stop detection, CRC calculator, IWDT windowing, and A/D self-test |
Applications
| Industrial HMI Panel | Secure Edge Gateway |
|---|---|
Use Scenario: Standalone operator interface for PLC-controlled machinery with touch screen, real-time diagnostics, and local data logging. IC Role / Device Role / Timing Role: Main application processor executing RTOS, driving GLCDC/DRW2D for UI rendering, managing SDHI for log storage, and running CAN/Ethernet stacks for fieldbus bridging. Use Value: Integrated graphics acceleration reduces BOM cost vs. external GPU; dual-bank flash enables remote firmware patching without downtime. |
Use Scenario: Field-deployed protocol translator aggregating Modbus RTU, CANopen, and BACnet MS/TP traffic into encrypted MQTT over Ethernet/WAN. IC Role / Device Role / Timing Role: Central security-enforced protocol gateway with TSIP-secured TLS handshake, Ethernet MAC for upstream comms, and multiple SCI/RSPI peripherals for legacy fieldbus interfacing. Use Value: Hardware AES and TSIP eliminate need for external secure element; 2 MB flash accommodates multiple protocol stacks and certificate storage. |
| Networked Energy Meter | Medical Device Controller |
Use Scenario: DIN-rail mounted smart meter with pulse counting, harmonic analysis, and remote firmware update via Ethernet. IC Role / Device Role / Timing Role: Real-time data acquisition controller using 12-bit S12AD (21-channel) for voltage/current sampling, RTC for time-stamped billing, and SDHI for waveform capture storage. Use Value: On-chip 640 KB SRAM buffers multi-cycle waveform data; dual-bank flash ensures update integrity during power interruption. |
Use Scenario: Class II medical infusion pump requiring IEC62304 compliance, real-time motor control, and tamper-resistant audit logging. IC Role / Device Role / Timing Role: Safety-certified controller executing motor PWM via MTU3 complementary outputs, monitoring analog sensors via S12AD self-diagnostic mode, and storing event logs in protected data flash. Use Value: MPU and register write protection enforce runtime memory partitioning; TSIP secures device identity and firmware signature verification. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEDGFC#V0 | Same RX65N Group die; differs only in code flash capacity (1.5 MB vs. 2 MB) and SRAM (256 KB main + 384 KB expansion vs. 640 KB unified) | Suitable for less complex HMI or gateway firmware where full 2 MB flash footprint is unnecessary | Select when application binary size fits within 1.5 MB and no dual-bank update requirement exists |
| R5F566NEDGFC#V0 | RX66N Group successor; higher max frequency (160 MHz), larger SRAM (1 MB), added USB HS, and enhanced TSIP features | Required for next-gen designs needing >120 MHz deterministic response or USB 2.0 high-speed host capability | Choose for new designs prioritizing future scalability, higher throughput, or USB HS peripheral integration |
Compared with R5F565NCDGFC#V0, R5F565NEDGFC#V0 offers identical peripheral set and package but reduced memory resources, while R5F566NEDGFC#V0 delivers architectural upgrades including faster CPU, expanded memory, and USB HS-making it suitable for performance-critical or forward-looking industrial platforms.
Availability
R5F565NCDGFC#V0 is available at Aetrix Electronics and suitable for industrial HMI, secure edge gateways, and networked energy metering requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F565NCDGFC#V0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RX65N Group, including R5F565NCDGFC#V0, was designed for industrial human-machine interfaces, secure networked edge devices, and safety-certifiable embedded systems requiring rich graphics, connectivity, and hardware-based security.
FAQ
What is the maximum operating frequency and CPU performance of the R5F565NCDGFC#V0?
The R5F565NCDGFC#V0 operates at a maximum frequency of 120 MHz and delivers 240 DMIPS of processing performance using its 32-bit RXv2 CPU core with single-precision IEEE-754 floating-point unit. This performance level is measured under standard test conditions with all caches enabled and reflects real-world deterministic execution capability for industrial control and HMI applications.
Does the R5F565NCDGFC#V0 support hardware encryption and secure boot?
Yes, the R5F565NCDGFC#V0 integrates a dedicated AES engine supporting 128-, 192-, and 256-bit keys, plus the Trusted Secure IP (TSIP) module for secure key storage, encrypted firmware loading, and true random number generation. These features enable certified secure boot and runtime cryptographic operations without external security ICs.
What display interfaces does the R5F565NCDGFC#V0 support for HMI applications?
The R5F565NCDGFC#V0 includes a Graphic-LCD Controller (GLCDC) supporting up to WXGA resolution (1366×768), 3-layer overlay, and multiple pixel formats (32/16/8 bpp), plus a 2D Drawing Engine (DRW2D) for hardware-accelerated vector graphics, bit blitting, and texture mapping-enabling responsive, low-CPU-load GUIs in industrial HMIs.
How many CAN channels and mailboxes does the R5F565NCDGFC#V0 provide?
The R5F565NCDGFC#V0 integrates two CAN 2.0B-compliant channels, each with 32 dedicated mailboxes for message filtering and buffering. This configuration supports robust fieldbus communication in industrial automation and vehicle subsystems, with hardware timestamping and error handling built into the CAN module.
What is the package type and thermal specification for the R5F565NCDGFC#V0?
The R5F565NCDGFC#V0 is packaged in PLQP0176KB-A: a 176-pin LQFP measuring 24 mm × 24 mm with 0.5-mm pitch and an exposed thermal pad. It is rated for industrial temperature range (–40°C to +85°C) and complies with RoHS and JEDEC J-STD-020 moisture sensitivity level 3.
R5F565NCDGFC#V0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 176-LQFP
- Series:
- RX65N
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, QSPI, SCI, SPI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 136
- Program Memory Size:
- 1.5MB (1.5M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 640K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- External
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F565NCDGFC#V0 FAQ
1.How can I place an order for R5F565NCDGFC#V0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F565NCDGFC#V0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F565NCDGFC#V0 reliable?
The price and inventory of R5F565NCDGFC#V0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F565NCDGFC#V0 is usually 5 days.
3.What payment methods are accepted for R5F565NCDGFC#V0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F565NCDGFC#V0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F565NCDGFC#V0?
R5F565NCDGFC#V0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F565NCDGFC#V0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F565NCDGFC#V0?
For technical support, including R5F565NCDGFC#V0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F565NCDGFC#V0 requirements.
6.How does Aetrix verify that R5F565NCDGFC#V0 is sourced from the original manufacturer or authorized distributors?
All R5F565NCDGFC#V0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F565NCDGFC#V0 meets industry standards.
7.What is the process for return or replacement of R5F565NCDGFC#V0?
All R5F565NCDGFC#V0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F565NCDGFC#V0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F565NCDGFC#V0 part is unused and in its original packaging.
Return procedure for R5F565NCDGFC#V0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F565NCDGFC#V0 Tags
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