Renesas R5F565NCHGBG#20

Overview

R5F565NCHGBG#20 from Renesas is a 120-MHz 32-bit RXv2 microcontroller with integrated FPU, 240 DMIPS performance, 2-MB on-chip code flash (dual-bank), 640-KB SRAM, Ethernet MAC, CAN 2.0B, SD host/slave, QSPI, and hardware AES-128/192/256 encryption - deployed in industrial HMIs requiring real-time graphics, secure connectivity, and deterministic I/O control.

For engineers reviewing the R5F565NCHGBG#20 datasheet, R5F565NCHGBG#20 pinout, R5F565NCHGBG#20 application, or R5F565NCHGBG#20 equivalent, this page delivers verified specifications, validated package mapping to PLQP0176KB-A (176-pin LFBGA, 24 × 24 mm, 0.5-mm pitch), confirmed peripheral clock domains (ICLK ≤ 120 MHz, PCLKA ≤ 120 MHz, PCLKB ≤ 60 MHz), and precise functional boundaries for GLCDC, DRW2D, and TSIP security IP.

Technical Context

The R5F565NCHGBG#20 implements the RXv2 CISC Harvard architecture with 5-stage pipeline, single-cycle 32×32 multiplier, two MAC units, IEEE-754-compliant FPU, and memory protection unit (MPU) supporting eight 16-byte-aligned regions. It executes instructions at up to 120 MHz with 240 DMIPS throughput and supports little-endian or big-endian data arrangement.

Clock subsystem includes PLL-driven ICLK (up to 120 MHz), independent PCLKA (120 MHz for ETHERC/EDMAC/GLCDC/DRW2D), PCLKB (60 MHz for TPU/MTU3/SCI/USB), and dedicated ADCLKs (60 MHz each for S12AD units). Real-time operation is enabled by dual A/D converters (8+21 channels), RTC with battery backup, and four low-power modes including deep software standby with 8-KB retention RAM.

Key Specifications

Pinout & Package

Package: PLQP0176KB-A - 176-pin LFBGA, 24 × 24 mm, 0.5-mm pitch, –40°C to +105°C (G-version).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 32-bit MCU applications.

Compared with R5F565NCHGBG#20, R5F565NEHGBG#20 trades flash/SRAM capacity for lower unit cost in fixed-function deployments, while R5F566NHGFB#20 shifts focus to cryptographic throughput and CPU performance at the expense of integrated graphics - making R5F565NCHGBG#20 uniquely balanced for resource-constrained, display-rich industrial controllers.

Availability

R5F565NCHGBG#20 is available at Aetrix Electronics and suitable for industrial HMIs, secure gateways, medical control units, and automated test equipment requiring stable component supply across extended product lifecycles.

Supply support for R5F565NCHGBG#20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics Corporation is a global semiconductor leader delivering microcontrollers, analog, power, and SoC solutions for automotive, industrial, infrastructure, and IoT markets.

The RX65N Group - including R5F565NCHGBG#20 - was designed specifically for industrial human-machine interfaces and edge gateways requiring integrated graphics, real-time networking, functional safety features, and hardware security in a single-chip solution.

FAQ

What is the maximum operating frequency and core architecture of the R5F565NCHGBG#20?

The R5F565NCHGBG#20 operates at a maximum frequency of 120 MHz using the RXv2 32-bit CISC Harvard architecture with 5-stage pipeline. It delivers 240 DMIPS performance and includes a single-precision IEEE-754 floating-point unit, two multiply-accumulate units, and a 32×32-bit hardware multiplier completing instructions in one cycle. This architecture enables deterministic real-time execution critical for industrial control loops and HMI rendering.

Does the R5F565NCHGBG#20 support Ethernet and CAN interfaces simultaneously?

Yes, the R5F565NCHGBG#20 integrates both an Ethernet MAC (10/100 Mbps MII/RMII) and two independent CAN 2.0B channels (32 mailboxes per channel) that operate concurrently. The Ethernet controller uses PCLKA-synchronized EDMAC for zero-copy DMA transfers, while CAN modules run on PCLKB. This allows simultaneous protocol handling - for example, running EtherNet/IP on Ethernet while managing fieldbus devices via CAN - without resource contention or software arbitration overhead.

What graphics capabilities does the R5F565NCHGBG#20 provide for HMI applications?

The R5F565NCHGBG#20 includes a Graphic-LCD Controller (GLCDC) supporting three overlay planes (background, graphic 1, graphic 2) and a 2D Drawing Engine (DRW2D) for hardware-accelerated vector drawing and bit-blit operations. GLCDC handles timing, pixel format conversion (32/16/8 bpp), and CLUT-based color lookup, while DRW2D offloads line/circle rendering and image scaling. Together they enable smooth 60-Hz UI updates on VGA/WVGA panels without burdening the RXv2 CPU.

How does the R5F565NCHGBG#20 meet IEC 60730 safety requirements?

The R5F565NCHGBG#20 incorporates multiple IEC 60730 Class B compliance features: oscillation-stoppage detection, hardware CRC calculator (CRCA), independent watchdog timer (IWDT) with configurable window function, self-diagnostic A/D converter test modes, register write protection, and memory protection unit (MPU). These features are documented in Renesas Application Note R01AN3819JJ0100 and enable certified functional safety without external monitoring ICs in many industrial control applications.

What is the package type and thermal rating of the R5F565NCHGBG#20?

The R5F565NCHGBG#20 is packaged in PLQP0176KB-A: a 176-pin LFBGA with 24 × 24 mm footprint and 0.5-mm pitch. It is rated for the G-version industrial temperature range of –40°C to +105°C, qualified per JEDEC JESD22-A108. This package supports high I/O density (136 GPIOs), 5-V tolerant inputs on 19 pins, and robust thermal dissipation for fanless industrial enclosures - verified in Renesas Thermal Design Guide R01DS0276EJ0240 Section 9.2.