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Renesas R5F565NCHGFB#30
- Part No.:
- R5F565NCHGFB#30
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
R5F565NCHGFB#30.pdf
- Description:
- IC MCU 32BIT 1.5MB FLSH 144LFQFP
- Quantity:
- Payment:
- Shipping:
Inventory:180
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Product details
Overview
R5F565NCHGFB#30 from Renesas is a 32-bit RXv2 microcontroller with 120 MHz max operating frequency, 240 DMIPS performance, on-chip FPU compliant with IEEE-754 single-precision, 2 MB code flash memory (dual-bank), and 640 KB SRAM - designed for industrial HMI, networked gateway, and secure IoT edge node applications requiring Ethernet MAC, USB FS host/function, CAN, SD host/slave, and GLCDC.
For engineers reviewing the R5F565NCHGFB#30 datasheet, R5F565NCHGFB#30 pinout, R5F565NCHGFB#30 application, or R5F565NCHGFB#30 equivalent, key selection considerations include its 176-pin LFBGA package (PLQP0176KB-A), -40°C to +105°C G-grade temperature range, integrated TSIP encryption engine, dual 12-bit A/D converters (29 total channels), and real-time clock with battery backup support.
Technical Context
The R5F565NCHGFB#30 implements the RXv2 CPU core with Harvard architecture, 5-stage pipeline, and variable-length instructions enabling ultra-compact code density. It integrates a dedicated 120-kHz IWDT oscillator, memory protection unit (MPU) supporting eight 16-byte granular regions, and Trusted Memory (TM) functionality restricting instruction fetch-only access to protected code flash areas.
Its peripheral subsystem includes an Ethernet MAC controller compliant with IEEE 802.3 at 10/100 Mbps (MII/RMII), dual-channel CAN per ISO 11898-1 with 32 mailboxes per channel, and a full-featured graphic-LCD controller (GLCDC) supporting three overlay planes and 32-/16-bpp graphics - all synchronized to independent clock domains (PCLKA up to 120 MHz, PCLKB up to 60 MHz).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC core with 5-stage pipeline, 240 DMIPS @ 120 MHz, IEEE-754 FPU, and 72-bit accumulators |
| Memory | 2 MB dual-bank code flash (no-wait ≤50 MHz), 32 KB data flash (100k erase cycles), 640 KB SRAM (no-wait @ 120 MHz) |
| Operating Temp | -40°C to +105°C (G-version), supported by on-chip temperature sensor (±1°C relative precision) |
| Digital I/O | 136 general-purpose pins with 5-V tolerance (19 pins), open-drain capability, pull-up resistors, and programmable drive strength |
| Analog Peripherals | Dual 12-bit S12AD converters (8 + 21 channels), 2-channel 12-bit R12DA, and on-chip temperature sensor interfaced to S12AD unit 1 |
| Security | Hardware AES engine (128/192/256-bit keys), Trusted Secure IP (TSIP), CRC calculator (8/32-bit polynomials), and register write protection |
| Package | 176-pin LFBGA (PLQP0176KB-A), 24 × 24 mm, 0.5-mm pitch, RoHS-compliant |
Pinout & Package
Package: PLQP0176KB-A - 176-pin Low-Profile Fine-Pitch Ball Grid Array, 24 mm × 24 mm body, 0.5 mm ball pitch, lead-free, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Power supply inputs | Core (VCC), analog unit 0 (AVCC0), and analog unit 1 (AVCC1) supplies - all rated 2.7–3.6 V; separate domains enable noise isolation for ADC/DAC |
| VBATT | Battery backup input | Supplies RTC during main power loss; enables calendar/clock operation without external battery circuitry |
| RES# | Active-low reset input | Asynchronous hardware reset; low pulse ≥100 ns triggers full system reset including peripherals and clocks |
| CLKIN / CLKOUT | External crystal interface | Supports 8–24 MHz crystal/resonator; CLKOUT provides buffered output of main clock for trace/debug or system synchronization |
| ETXD0–ETXD3 / ETXEN / ETXER / ERXD0–ERXD3 / ERXDV / ERXER | Ethernet PHY interface | MII mode signals - direct connection to external 10/100 Mbps PHY without level-shifting; supports RMII via pin multiplexing |
| USB_DP / USB_DM | USB 2.0 Full-Speed differential pair | Integrated transceiver supports host/function/OTG; no external termination resistors required; 1.5 kΩ pull-up selectable via register |
| SD0_CMD / SD0_CLK / SD0_DAT0–SD0_DAT3 | SD host interface signals | 4-bit SD bus supporting high-speed mode (25 MB/s); includes card detection (SD0_CD) and write protect (SD0_WP) inputs |
Key Features
| Feature | Design Value |
|---|---|
| Trusted Secure IP (TSIP) | Hardware-accelerated cryptographic operations including key generation, encryption/decryption, and secure boot verification - eliminates software-only crypto bottlenecks in OTA update systems |
| Graphic-LCD Controller (GLCDC) | Supports 3-layer overlay (background + 2 graphics), 32-/16-bpp formats, and CLUT-based color mapping - enables rich UI rendering without external frame buffer RAM |
| Dual-Bank Flash Architecture | Enables background programming while executing from alternate bank - critical for fail-safe firmware updates in industrial gateways and medical devices |
| Event Link Controller (ELC) | 83 internal event sources routed without CPU intervention - e.g., TPU capture triggers A/D conversion, MTU3 PWM edges initiate DMA transfers - reduces latency and ISR overhead |
| SD Host/Slave + MMCIF | Single-chip support for SD memory cards, SDIO peripherals (Wi-Fi/BT modules), and eMMC storage - simplifies design of field-upgradable embedded storage subsystems |
Applications
| Industrial HMI Gateway | Secure Edge Node |
|---|---|
Use Scenario: Local control panel with Ethernet backhaul, touch-screen LCD, and CAN-connected PLCs in factory automation. IC Role / Device Role / Timing Role: Central application processor managing GLCDC display, Ethernet MAC for cloud telemetry, CAN for fieldbus communication, and SDHI for local log storage. Use Value: Integrated 2D drawing engine (DRW2D) accelerates UI rendering; TSIP secures firmware updates; dual-bank flash enables zero-downtime patching. |
Use Scenario: Battery-powered smart meter with tamper detection, encrypted data logging, and remote firmware upgrade over cellular modem. IC Role / Device Role / Timing Role: Main MCU handling metrology sampling (S12AD), secure storage (data flash + TSIP), RTC time-stamping, and USB/SD-based field service provisioning. Use Value: Standby RAM (8 KB) retains state during deep sleep; IWDT with window function prevents malicious reset attacks; AES-256 encrypts stored consumption data. |
| Networked Medical Device | Automotive Diagnostic Tool |
Use Scenario: Portable patient monitor with ECG waveform display, Wi-Fi upload, and USB host for flash drive export. IC Role / Device Role / Timing Role: Real-time signal acquisition (12-bit S12AD), GLCDC-driven TFT display, USB host for mass storage, and Ethernet for hospital LAN integration. Use Value: 120 MHz CPU handles FFT-based filtering in real time; 640 KB SRAM buffers multi-channel waveforms; IEC60730 self-test functions satisfy Class B safety requirements. |
Use Scenario: Handheld OBD-II scanner with CAN bus interface, Bluetooth connectivity, and graphical diagnostics UI. IC Role / Device Role / Timing Role: Dual CAN controller (2×32 mailboxes) communicates with vehicle ECUs; SCIi UARTs manage Bluetooth module; GLCDC drives color display. Use Value: CAN FD-ready timing flexibility supports legacy and next-gen protocols; 5-V tolerant I/O interfaces directly with automotive-level sensors; compact code size reduces flash footprint for certified diagnostic stacks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEHGFB#30 | Same RX65N Group, identical 176-pin LFBGA package and 2 MB flash, but D-grade (-40°C to +85°C) instead of G-grade | Suitable for commercial/industrial environments without extended temperature requirements | Select when ambient operating temperature remains ≤85°C and cost optimization is prioritized over extended thermal margin |
| R5F566NHGFB#30 | RX66N Group successor: higher 160 MHz CPU, enhanced TSIP-Lite, additional CAN FD support, same 176-pin LFBGA footprint | Required for CAN FD protocol compliance, higher throughput data processing, or future-proofing against obsolescence | Choose when new designs demand CAN FD, >240 DMIPS, or longer product lifecycle - note software migration effort from RX65N to RX66N toolchain |
Compared with R5F565NCHGFB#30, the R5F565NEHGFB#30 offers identical functionality at lower thermal rating, while the R5F566NHGFB#30 delivers architectural upgrades including CAN FD and higher clock speed - making it suitable for next-generation designs where protocol evolution or compute headroom is critical.
Availability
R5F565NCHGFB#30 is available at Aetrix Electronics and suitable for industrial HMI, secure edge node, and networked medical device applications requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant manufacturing.
Supply support for R5F565NCHGFB#30 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and enterprise markets.
The RX65N Group, which includes the R5F565NCHGFB#30, was engineered for high-integrity industrial applications demanding integrated security, rich graphics, and multi-protocol connectivity - particularly targeting HMI, gateway, and edge intelligence nodes.
FAQ
What is the maximum operating frequency and CPU architecture of the R5F565NCHGFB#30?
The R5F565NCHGFB#30 operates at a maximum frequency of 120 MHz using the 32-bit RXv2 CPU core with Harvard architecture, 5-stage pipeline, and variable-length instructions. It achieves 240 DMIPS performance and includes a single-precision IEEE-754 floating-point unit, two multiply-and-accumulate units, and a 32-bit multiplier with one-cycle execution for optimal real-time control efficiency.
Does the R5F565NCHGFB#30 support secure firmware updates and cryptographic acceleration?
Yes, the R5F565NCHGFB#30 integrates Trusted Secure IP (TSIP) for hardware-accelerated AES encryption/decryption (128/192/256-bit keys), secure key storage, and secure boot verification. Combined with dual-bank flash memory, this enables authenticated, fail-safe firmware updates without interrupting application execution - essential for remote IoT edge nodes.
What display and graphics capabilities does the R5F565NCHGFB#30 provide?
The R5F565NCHGFB#30 includes a dedicated Graphic-LCD Controller (GLCDC) supporting three overlay planes (background + two graphics layers), 32-/16-bpp pixel formats, and CLUT-based color mapping. It also features a 2D Drawing Engine (DRW2D) for hardware-accelerated vector drawing, bit blitting, rotation, and scaling - eliminating need for external GPU or frame buffer RAM in HMI designs.
How many analog-to-digital and digital-to-analog converter channels does the R5F565NCHGFB#30 have?
The R5F565NCHGFB#30 integrates two independent 12-bit A/D converter units: S12AD unit 0 with 8 channels and S12AD unit 1 with 21 channels - totaling 29 analog inputs. It also includes two 12-bit D/A converter channels (R12DA) with selectable buffered/unbuffered output, supporting precise analog output control in measurement and actuation systems.
What communication interfaces are integrated into the R5F565NCHGFB#30?
The R5F565NCHGFB#30 integrates Ethernet MAC (10/100 Mbps MII/RMII), USB 2.0 Full-Speed host/function/OTG, dual CAN 2.0B (32 mailboxes per channel), 13 serial channels (SCIg/h/i), 3 RSPI, 1 QSPI, 3 I2C, SD host/slave, MMCIF, and parallel camera interface (PDC). This comprehensive set supports complex multi-protocol gateway and edge node architectures.
R5F565NCHGFB#30 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 144-LQFP
- Series:
- RX65N
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RXv2
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, QSPI, SCI, SPI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 111
- Program Memory Size:
- 1.5MB (1.5M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 640K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F565NCHGFB#30 FAQ
1.How can I place an order for R5F565NCHGFB#30 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F565NCHGFB#30 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F565NCHGFB#30 reliable?
The price and inventory of R5F565NCHGFB#30 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F565NCHGFB#30 is usually 5 days.
3.What payment methods are accepted for R5F565NCHGFB#30?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F565NCHGFB#30 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F565NCHGFB#30?
R5F565NCHGFB#30 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F565NCHGFB#30 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F565NCHGFB#30?
For technical support, including R5F565NCHGFB#30 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F565NCHGFB#30 requirements.
6.How does Aetrix verify that R5F565NCHGFB#30 is sourced from the original manufacturer or authorized distributors?
All R5F565NCHGFB#30 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F565NCHGFB#30 meets industry standards.
7.What is the process for return or replacement of R5F565NCHGFB#30?
All R5F565NCHGFB#30 units undergo pre-shipment inspection (PSI). If there is an issue with R5F565NCHGFB#30, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F565NCHGFB#30 part is unused and in its original packaging.
Return procedure for R5F565NCHGFB#30:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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