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Renesas R5F565NEDGLC#20

Part No.:
R5F565NEDGLC#20
Manufacturer:
Renesas
Category:
Microcontrollers
Package:
177-TFLGA
Datasheet:
AetrixR5F565NEDGLC#20.pdf
Description:
IC MCU 32BIT 2MB FLASH 177TFLGA
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:319

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Product details

Overview

R5F565NEDGLC#20 from Renesas is a 120-MHz 32-bit RXv2 microcontroller with single-precision IEEE-754 FPU, 240 DMIPS performance, 2 MB on-chip code flash (dual-bank), 640 KB SRAM, and integrated Ethernet MAC, CAN, SD host/slave, QSPI, and GLCDC for industrial HMI and connected gateway applications.

For engineers reviewing the R5F565NEDGLC#20 datasheet, R5F565NEDGLC#20 pinout, R5F565NEDGLC#20 application, or R5F565NEDGLC#20 equivalent, key selection considerations include its 176-pin LFBGA package (PLQP0176KB-A), -40°C to +105°C operating range (G-version), dual-bank flash for safe firmware updates, hardware AES/TSIP encryption, and real-time clock with battery backup support.

Technical Context

The R5F565NEDGLC#20 implements the RXv2 CPU core with CISC Harvard architecture, 5-stage pipeline, and variable-length instructions enabling ultra-compact code. It integrates a dedicated 120-kHz IWDT oscillator, memory protection unit (MPU), and Trusted Memory (TM) for IEC60730-compliant safety-critical firmware execution.

Its peripheral subsystem includes an Ethernet MAC with RMII/MII support, two CAN channels (32 mailboxes each), three RSPI interfaces, one QSPI channel, and a full-featured graphic-LCD controller (GLCDC) with 2D drawing engine (DRW2D) - all synchronized to independent clock domains (PCLKA up to 120 MHz, PCLKB up to 60 MHz).

Key Specifications

Parameter Value and Actual Design Meaning
CPU Core RXv2 32-bit, 120 MHz max, 240 DMIPS, IEEE-754 single-precision FPU
Memory 2 MB dual-bank code flash (no-wait ≤50 MHz), 640 KB SRAM (no-wait), 32 KB data flash (100k erase cycles)
Package PLQP0176KB-A: 176-pin LFBGA, 24 × 24 mm, 0.5-mm pitch, –40°C to +105°C
Peripherals Ethernet MAC (10/100 Mbps), 2× CAN (ISO11898-1), SDHI/SDSI/MMCIF, QSPI, GLCDC + DRW2D, 12-bit S12AD (29 ch), 12-bit R12DA (2 ch)
Security & Safety AES-128/192/256, TSIP, MPU (8 regions), CRC calculator (8/32-bit), register write protection, IEC60730 self-test functions
Power & Clock 2.7–3.6 V supply, 0.19 mA/MHz typical active current, 4 low-power modes, external crystal or internal PLL (8–24 MHz), 240-kHz HOCO/LOCO

Pinout & Package

Package: PLQP0176KB-A - 176-pin Low-Profile Fine-Pitch Ball Grid Array, 24 mm × 24 mm, 0.5 mm pitch, RoHS-compliant, lead-free, moisture sensitivity level 3.

Pin/Terminal Circuit Role Design Meaning
VCC / AVCC0 / AVCC1 Core & analog power supply Separate 2.7–3.6 V domains for digital logic and ADC/DAC reference stability
VBATT Battery backup supply Enables RTC operation during main power loss; connects to coin-cell or supercap
XTAL / EXTAL Main crystal oscillator input/output Supports 8–24 MHz external crystal for precise system timing and Ethernet clock derivation
MD0 / MD1 Mode setting pins Determine boot mode (SCI/USB/FINE) and single-chip vs. extended mode at reset release
RES# Active-low reset input Hardware reset assertion; internally pulled up; compatible with open-drain reset supervisors
ETH_MDC / ETH_MDIO PHY management interface IEEE 802.3-compliant MDIO bus for configuring external Ethernet PHY registers
ETXD0–3 / ETX_EN / ETX_CLK / ERXD0–3 / ERX_DV / ERX_CLK Ethernet physical layer interface RMII-compliant 2-wire or MII-compliant 14-wire connection to external PHY

Key Features

Feature Design Value
Dual-bank flash architecture Enables background programming and seamless firmware update without halting execution or losing real-time responsiveness
Trusted Secure IP (TSIP) Hardware-accelerated AES and secure key storage prevent firmware cloning and unauthorized decryption of encrypted assets
Graphic-LCD controller (GLCDC) Direct drive of RGB/TFT panels up to WXGA resolution with triple-plane overlay and alpha blending for rich HMI visuals
2D drawing engine (DRW2D) Offloads CPU for vector graphics, bit blitting, rotation, and texture mapping - critical for smooth UI animation in resource-constrained systems
IEC60730 safety support Integrated oscillation-stop detection, CRC calculator, IWDT windowing, A/D self-diagnostic, and register write protection meet Class B requirements

Applications

Industrial Gateway Smart Energy Meter

Use Scenario: Edge node aggregating Modbus RTU, CAN bus, and pulse inputs from field devices, then forwarding data via Ethernet/WAN to cloud SCADA.

IC Role / Device Role / Timing Role: Central processing unit with deterministic real-time scheduling, Ethernet MAC for TCP/IP stack offload, and dual CAN for legacy protocol bridging.

Use Value: Dual-bank flash enables zero-downtime firmware upgrades over-the-air; TSIP secures firmware integrity and prevents tampering of metering algorithms.

Use Scenario: Revenue-grade electricity meter with tariff switching, tamper detection, and remote firmware updates via cellular backhaul.

IC Role / Device Role / Timing Role: Main controller executing metrology firmware, managing RTC calendar functions, and securing cryptographic keys for firmware signature verification.

Use Value: Integrated 12-bit A/D with self-diagnostic meets IEC62053 accuracy requirements; VBATT-backed RTC maintains billing time during power outages.

HMI Display Terminal Building Automation Controller

Use Scenario: Touch-enabled wall-mounted display for HVAC control, lighting scenes, and occupancy monitoring in commercial buildings.

IC Role / Device Role / Timing Role: Graphics processor driving TFT LCD via RGB interface, handling touch input via SPI, and running embedded GUI framework.

Use Value: GLCDC + DRW2D eliminates external graphics accelerator; 640 KB SRAM stores frame buffers and bitmap assets locally.

Use Scenario: DIN-rail mounted controller interfacing with BACnet MS/TP, KNX, and DALI devices while hosting web-based configuration portal.

IC Role / Device Role / Timing Role: Protocol gateway with multiple UARTs (SCIg/h/i), Ethernet for BACnet/IP, and AES encryption for secure device commissioning.

Use Value: Hardware AES accelerates TLS handshake for HTTPS portal; 176-pin I/O supports isolated RS-485 transceivers and opto-coupled digital inputs.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-performance industrial MCU applications.

Alternative Part Technical Difference Application Difference Selection Advice
R5F565NEHGLC#20 Same RX65N Group silicon, identical peripherals and memory, but in 144-pin LFQFP (PLQP0144KA-B) package Lower I/O count (111 vs. 136), smaller footprint (20 × 20 mm), no SDRAM interface support Select when board space is constrained and full 176-pin I/O or external memory expansion is unnecessary
R5F566NEDGLC#20 Same package and pinout, but with 1.5 MB flash, 256 KB SRAM, and reduced peripheral set (no GLCDC/DRW2D, no SDHI/SDSI) Targeted at cost-sensitive industrial control without graphical display or SD card logging Choose when graphics, SD storage, or full 2 MB flash are not required - lowers BOM cost without layout change

Compared with R5F565NEDGLC#20, the R5F565NEHGLC#20 offers identical functionality in a smaller 144-pin package but sacrifices SDRAM support and 25 I/O pins, while the R5F566NEDGLC#20 retains pin compatibility but removes display and storage peripherals to reduce cost - making both viable alternatives depending on I/O, memory, and feature trade-offs.

Availability

R5F565NEDGLC#20 is available at Aetrix Electronics and suitable for industrial gateways, smart energy meters, HMI terminals, and building automation controllers requiring stable component supply, long lifecycle assurance, and automotive-grade temperature resilience.

Supply support for R5F565NEDGLC#20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and infrastructure markets.

The RX65N Group, including the R5F565NEDGLC#20, was designed for high-reliability industrial edge devices requiring real-time control, rich connectivity (Ethernet/CAN/SD), graphics capability, and functional safety compliance.

FAQ

What is the maximum operating frequency and performance rating of the R5F565NEDGLC#20?

The R5F565NEDGLC#20 operates at a maximum frequency of 120 MHz and delivers 240 DMIPS performance. Its RXv2 CPU core includes a single-precision IEEE-754 floating-point unit, 32-bit multiplier (1-cycle execution), and divider (2-cycle execution), enabling deterministic real-time computation for industrial control loops and signal processing tasks within the R5F565NEDGLC#20.

Does the R5F565NEDGLC#20 support secure firmware updates and cryptographic operations?

Yes, the R5F565NEDGLC#20 integrates hardware-accelerated AES-128/192/256 encryption and the Trusted Secure IP (TSIP) module for secure key storage and firmware authentication. Combined with dual-bank flash and Trusted Memory (TM) protection, it enables authenticated, encrypted, and atomic firmware updates - a core requirement for secure remote maintenance of devices using the R5F565NEDGLC#20.

What display interfaces and graphics capabilities does the R5F565NEDGLC#20 provide?

The R5F565NEDGLC#20 includes a full-featured Graphic-LCD Controller (GLCDC) supporting RGB/TFT panels up to WXGA resolution, with triple-plane overlay, alpha blending, and CLUT formats. It also integrates a 2D Drawing Engine (DRW2D) for hardware-accelerated vector graphics, bit blitting, rotation, and texture mapping - eliminating the need for external GPU in HMI applications built around the R5F565NEDGLC#20.

How does the R5F565NEDGLC#20 handle real-time clock and battery backup functionality?

The R5F565NEDGLC#20 features a dedicated Real-Time Clock (RTC) with calendar and binary counting modes, alarm and periodic interrupts, and time-capture capability. When connected to a backup power source (e.g., coin cell) on the VBATT pin, the RTC continues operation during main power loss - ensuring accurate timekeeping for billing, logging, and scheduling functions in applications relying on the R5F565NEDGLC#20.

What Ethernet and communication interfaces are integrated into the R5F565NEDGLC#20?

The R5F565NEDGLC#20 integrates a full IEEE 802.3-compliant Ethernet MAC supporting 10/100 Mbps in full/half-duplex modes, with MII/RMII PHY interface support. It also includes two ISO11898-1 CAN channels (32 mailboxes each), three RSPI interfaces, one QSPI channel, SD host/slave (SDHI/SDSI), MMCIF, and up to 13 SCI channels - making it ideal for protocol-rich industrial networking applications centered on the R5F565NEDGLC#20.

R5F565NEDGLC#20 Specifications

Product attributes
Attribute value
Manufacturer:
Renesas
Package/Case:
177-TFLGA
Series:
RX65N
Packaging:
Tray
Product Status:
Active
Programmable:
-
Core Processor:
RXv2
Core Size:
32-Bit
Speed:
120MHz
Connectivity:
CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, QSPI, SCI, SPI, UART/USART, USB
Peripherals:
DMA, LVD, POR, PWM, WDT
Number of I/O:
136
Program Memory Size:
2MB (2M x 8)
Program Memory Type:
FLASH
EEPROM Size:
32K x 8
RAM Size:
640K x 8
Voltage - Supply (Vcc/Vdd):
2.7V ~ 3.6V
Data Converters:
A/D 29x12b; D/A 2x12b
Oscillator Type:
External
Operating Temperature:
-40°C ~ 105°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:

R5F565NEDGLC#20 FAQ

1.How can I place an order for R5F565NEDGLC#20 through Aetrix?

Please submit a Request for Quotation (RFQ) for R5F565NEDGLC#20 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for R5F565NEDGLC#20 reliable?

The price and inventory of R5F565NEDGLC#20 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F565NEDGLC#20 is usually 5 days.

3.What payment methods are accepted for R5F565NEDGLC#20?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F565NEDGLC#20 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for R5F565NEDGLC#20?

R5F565NEDGLC#20 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your R5F565NEDGLC#20 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for R5F565NEDGLC#20?

For technical support, including R5F565NEDGLC#20 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F565NEDGLC#20 requirements.

6.How does Aetrix verify that R5F565NEDGLC#20 is sourced from the original manufacturer or authorized distributors?

All R5F565NEDGLC#20 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F565NEDGLC#20 meets industry standards.

7.What is the process for return or replacement of R5F565NEDGLC#20?

All R5F565NEDGLC#20 units undergo pre-shipment inspection (PSI). If there is an issue with R5F565NEDGLC#20, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The R5F565NEDGLC#20 part is unused and in its original packaging.

Return procedure for R5F565NEDGLC#20:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

R5F565NEDGLC#20 Tags

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