Renesas R5F565NEDGLK#20
- Part No.:
- R5F565NEDGLK#20
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 145-TFLGA
- Datasheet:
-
R5F565NEDGLK#20.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 145TFLGA
- Quantity:
- Payment:

- Shipping:

Inventory:416
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Product details
Overview
R5F565NEDGLK#20 from Renesas is a 32-bit RXv2 microcontroller with 120 MHz operation, 240 DMIPS performance, on-chip FPU, 2 MB code flash, 640 KB SRAM, and integrated Ethernet MAC, CAN, SD host/slave, QSPI, GLCDC, and DRW2D - deployed in industrial HMIs, networked gateways, and secure IoT edge nodes.
For engineers reviewing the R5F565NEDGLK#20 datasheet, R5F565NEDGLK#20 pinout, R5F565NEDGLK#20 application, or R5F565NEDGLK#20 equivalent, key selection criteria include dual-bank flash for safe firmware updates, TSIP-based AES-128/192/256 encryption, 136 GPIOs with 5-V tolerance, RTC with battery backup, and IEC60730-compliant safety features including CRC, IWDT, and register write protection.
Technical Context
The R5F565NEDGLK#20 implements the RXv2 CPU core with Harvard architecture, 5-stage pipeline, and variable-length instructions enabling ultra-compact code. It integrates dual-bank flash supporting background programming and bank-swapping during execution - critical for fail-safe OTA updates in field-deployed systems.
Its clock system combines external crystal (8–24 MHz), internal HOCO (16/18/20 MHz), LOCO (240 kHz), and PLL to generate independent clocks: ICLK up to 120 MHz for CPU, PCLKA up to 120 MHz for high-speed peripherals (ETHERC, GLCDC, DRW2D), and PCLKB up to 60 MHz for timers and ADC - enabling precise timing isolation across subsystems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC with 5-stage pipeline, 240 DMIPS @ 120 MHz - enables real-time deterministic control with low-latency interrupt response. |
| Flash Memory | 2 MB dual-bank code flash with BGO support - allows concurrent read/execute and program/erase for seamless firmware updates without halting operation. |
| SRAM | 640 KB on-chip SRAM (256 KB main + 384 KB expansion) with zero-wait access at 120 MHz - supports large frame buffers for LCD graphics and network stack buffers. |
| Peripherals | Ethernet MAC (10/100 Mbps), CAN (2 channels, 32 mailboxes each), SDHI/SDSI/MMCIF, QSPI, GLCDC, DRW2D, PDC - enables full-featured embedded gateway functionality in single chip. |
| Security | Trusted Secure IP (TSIP) with AES-128/192/256, CRCA, IWDT with window function, MPU (8 regions), register write protection - meets IEC60730 Class B requirements. |
| Package | LFBGA-176 (PLQP0176KB-A, 24 × 24 mm, 0.5 mm pitch) with 136 GPIOs, 19 of which are 5-V tolerant - suitable for dense industrial PCB layouts with mixed-voltage interfaces. |
| Temp Range | –40°C to +105°C (G-version) - qualified for extended-temperature industrial and automotive under-hood applications. |
Pinout & Package
Package: PLQP0176KB-A, 176-pin LFBGA, 24 × 24 mm, 0.5 mm pitch, 136 general-purpose I/O pins (19 with 5-V tolerance), 8 dedicated power/ground pins, and 4 dedicated clock pins (EXTAL, XTAL, SUBCLK, LOCOIN).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, AVCC0, AVCC1 | Power supply inputs | Separate analog/digital domains enable noise-isolated ADC operation; AVCC1 powers S12AD unit 1 and R12DA. |
| VSS, AVSS0, AVSS1 | Ground returns | Dedicated analog ground pins reduce coupling noise into 12-bit ADC and DAC paths. |
| EXTAL / XTAL | Main crystal oscillator terminals | Support 8–24 MHz external crystal for precise system clock; used with PLL to generate 120 MHz ICLK. |
| SUBCLK | Sub-clock input | Connects to 32.768 kHz crystal for RTC calendar/timekeeping with battery backup via VBATT. |
| VBATT | Battery backup supply | Enables RTC operation during main power loss - critical for time-stamped logging and wake-on-event functions. |
| ETH_MDC / ETH_MDIO | MDIO management interface | Provides IEEE 802.3-compliant PHY configuration and status monitoring for integrated Ethernet controller. |
| ETXD0–ETXD3 / ERXD0–ERXD3 | Ethernet data bus | 8-bit RMII/MII data path supporting 10/100 Mbps full/half-duplex - eliminates need for external PHY in cost-sensitive designs. |
| SD0CMD / SD0CLK / SD0DAT0–3 | SD host interface signals | 1-bit or 4-bit SD bus supporting SD memory cards and SDIO peripherals up to 25 MB/s (high-speed mode). |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash with BGO | Enables live firmware update: one bank executes while the other is reprogrammed - no system downtime required. |
| TSIP hardware accelerator | Offloads AES-128/192/256 encryption/decryption from CPU, reducing latency and power in secure boot and TLS handshake. |
| GLCDC + DRW2D co-processing | Hardware-accelerated 2D rendering and LCD composition eliminate CPU load for GUI refresh, enabling smooth 60 Hz display updates. |
| IEC60730 safety suite | Includes oscillation-stop detection, CRC calculator (CRCA), IWDT with windowing, self-diagnostic A/D, and register lock - simplifies Class B certification. |
| Event Link Controller (ELC) | 83 internal event sources routed without CPU intervention - e.g., TPU timer overflow triggers ADC conversion, reducing jitter and ISR overhead. |
Applications
| Industrial HMI Panel | Secure Edge Gateway |
|---|---|
Use Scenario: Touch-enabled factory floor display with real-time sensor visualization, alarm logging, and remote diagnostics over Ethernet. IC Role / Device Role / Timing Role: Main application processor running FreeRTOS, driving 480×272 TFT via GLCDC, managing touch controller via SCIi, and handling Modbus TCP over Ethernet MAC. Use Value: On-chip DRW2D renders vector graphics at 60 fps; dual-bank flash enables silent firmware patching during runtime; TSIP secures OTA update payloads. | Use Scenario: Field-deployed protocol converter bridging CAN bus machinery to cloud via cellular/Wi-Fi using TLS-secured MQTT. IC Role / Device Role / Timing Role: Central protocol translator with CAN (2 ch), Ethernet (100 Mbps), SD card for local log storage, and AES-256 for TLS session keys. Use Value: Integrated CAN and Ethernet eliminate external transceivers; TSIP accelerates TLS handshake; 640 KB SRAM hosts dual network stacks and crypto buffers. |
| Smart Energy Meter | Medical Data Logger |
Use Scenario: DIN-rail mounted meter with pulse counting, tamper detection, RTC timestamping, and secure firmware updates via SD card. IC Role / Device Role / Timing Role: System controller executing IEC62056 compliance logic, sampling metrology ADC via ELC-triggered S12AD, and managing secure boot with TSIP. Use Value: RTC with VBATT backup maintains accurate billing timestamps during mains outage; dual-bank flash ensures certified firmware updates meet regulatory rollback requirements. | Use Scenario: Portable patient monitor recording ECG, SpO₂, and temperature with local display, USB export, and encrypted SD storage. IC Role / Device Role / Timing Role: Real-time acquisition controller with 12-bit S12AD (unit 1, 21 ch), R12DA for analog output calibration, and GLCDC driving OLED display. Use Value: 12-bit ADC with self-diagnostic and disconnection detection ensures signal integrity per IEC60601; AES-256 encrypts PHI before SD write. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F565NEHGLK#20 | Same RX65N Group, identical 2 MB flash and 640 KB SRAM, but in 144-pin LFQFP (PLQP0144KA-B) package - 111 GPIOs, 18 with 5-V tolerance. | Lower pin count and QFP packaging simplify prototyping and manual assembly; reduced I/O count limits multi-peripheral expansion. | Select when board space permits larger QFP footprint and design prioritizes ease of soldering over maximum peripheral density. |
| R5F566NEDGLK#20 | RX66N Group successor: same 176-pin LFBGA, 2 MB flash, but upgraded to RXv3 core (160 MHz, 320 DMIPS), enhanced TSIP-Lite, and added CAN FD support. | Enables higher-performance real-time control and future-proof CAN FD migration; requires toolchain and software adaptation. | Select for new designs requiring >120 MHz deterministic throughput or CAN FD interoperability with next-gen vehicle networks. |
Compared with R5F565NEDGLK#20, the R5F565NEHGLK#20 offers identical functionality in a more manufacturable QFP package but sacrifices 25 GPIOs and 5-V-tolerant pins, while the R5F566NEDGLK#20 delivers measurable performance and protocol upgrades at the cost of software migration effort and higher BOM cost.
Availability
R5F565NEDGLK#20 is available at Aetrix Electronics and suitable for industrial HMIs, secure edge gateways, and smart energy meters requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for R5F565NEDGLK#20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a Japanese semiconductor manufacturer specializing in microcontrollers, analog, and power solutions for industrial, automotive, and IoT markets.
The RX65N Group, including R5F565NEDGLK#20, was designed for high-integration industrial applications demanding real-time performance, functional safety, graphics capability, and secure connectivity - targeting HMIs, gateways, and metering systems.
FAQ
What is the maximum operating frequency and DMIPS rating of the R5F565NEDGLK#20?
The R5F565NEDGLK#20 operates at a maximum frequency of 120 MHz and delivers 240 DMIPS performance. This is achieved by the RXv2 CPU core with 5-stage pipeline and optimized instruction set. The R5F565NEDGLK#20 sustains this performance with zero-wait-state access to 640 KB SRAM and efficient cache-hit behavior in its 2 MB dual-bank flash - making it suitable for real-time industrial control loops and protocol stacks.
Does the R5F565NEDGLK#20 support secure boot and cryptographic acceleration?
Yes, the R5F565NEDGLK#20 includes Trusted Secure IP (TSIP) hardware that accelerates AES-128/192/256 encryption and decryption, along with a CRC calculator (CRCA) supporting multiple polynomials. It also provides register write protection, memory protection unit (MPU), and IEC60730-compliant safety features like oscillation-stop detection and self-diagnostic A/D - all essential for implementing secure boot and runtime integrity verification in the R5F565NEDGLK#20.
What display interfaces does the R5F565NEDGLK#20 integrate for HMI applications?
The R5F565NEDGLK#20 integrates a Graphic-LCD Controller (GLCDC) supporting up to 3 overlay planes and a 2D Drawing Engine (DRW2D) for hardware-accelerated vector graphics, bit blitting, and rotation. It supports common LCD data formats (32/16 bpp, CLUT), and connects directly to parallel RGB or CPU-interface displays. These capabilities eliminate external GPU requirements and enable responsive GUIs in resource-constrained HMIs built around the R5F565NEDGLK#20.
How many CAN channels and mailboxes does the R5F565NEDGLK#20 provide?
The R5F565NEDGLK#20 integrates two CAN modules compliant with ISO11898-1, each supporting 32 message mailboxes - totaling 64 configurable receive/transmit buffers. This enables robust multi-node communication in industrial automation networks, allowing simultaneous handling of high-priority control messages and lower-priority diagnostics traffic without CPU polling overhead in the R5F565NEDGLK#20.
What is the operating temperature range and package type of the R5F565NEDGLK#20?
The R5F565NEDGLK#20 is rated for –40°C to +105°C (G-version) and uses a 176-pin LFBGA package (PLQP0176KB-A, 24 × 24 mm, 0.5 mm pitch). This extended temperature grade and fine-pitch BGA make the R5F565NEDGLK#20 suitable for harsh industrial environments and high-density PCB layouts where thermal reliability and peripheral integration are critical.
R5F565NEDGLK#20 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 145-TFLGA
- Series:
- RX65N
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, LINbus, MMC/SD, QSPI, SCI, SPI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 111
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 640K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 29x12b; D/A 2x12b
- Oscillator Type:
- External
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F565NEDGLK#20 FAQ
1.How can I place an order for R5F565NEDGLK#20 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F565NEDGLK#20 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F565NEDGLK#20 reliable?
The price and inventory of R5F565NEDGLK#20 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F565NEDGLK#20 is usually 5 days.
3.What payment methods are accepted for R5F565NEDGLK#20?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F565NEDGLK#20 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F565NEDGLK#20?
R5F565NEDGLK#20 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F565NEDGLK#20 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F565NEDGLK#20?
For technical support, including R5F565NEDGLK#20 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F565NEDGLK#20 requirements.
6.How does Aetrix verify that R5F565NEDGLK#20 is sourced from the original manufacturer or authorized distributors?
All R5F565NEDGLK#20 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F565NEDGLK#20 meets industry standards.
7.What is the process for return or replacement of R5F565NEDGLK#20?
All R5F565NEDGLK#20 units undergo pre-shipment inspection (PSI). If there is an issue with R5F565NEDGLK#20, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F565NEDGLK#20 part is unused and in its original packaging.
Return procedure for R5F565NEDGLK#20:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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