Renesas R5F566TKCGFP#30
- Part No.:
- R5F566TKCGFP#30
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F566TKCGFP#30.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:270
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F566TKCGFP#30 from Renesas is a 32-bit RXv3 microcontroller optimized for motor control and industrial real-time applications, operating at up to 160 MHz with 928 CoreMark performance, 1 MB on-chip code flash, 128 KB SRAM (no wait states), and integrated 3-phase/5-phase complementary PWM generation for inverter drive systems.
For engineers reviewing the R5F566TKCGFP#30 datasheet, R5F566TKCGFP#30 pinout, R5F566TKCGFP#30 application, or R5F566TKCGFP#30 equivalent, key selection considerations include its 144-pin LFQFP package, 160-MHz GPTW timer with 195-ps HRPWM resolution, dual 12-bit ADC units supporting simultaneous sampling across 30 channels, CAN 2.0B compliance, and IEC60730 safety features including CAC, CRCA, and register write protection.
Technical Context
The R5F566TKCGFP#30 implements the RXv3 CPU core with single-cycle instruction execution, IEEE 754-compliant FPU, and configurable endian support. Its clock system integrates PLL, high-speed on-chip oscillator (16–20 MHz), and independent IWDT-dedicated 120-kHz oscillator - enabling precise timing control for motor commutation and safety-critical monitoring.
Peripheral architecture centers on event-driven operation via ELC, allowing autonomous inter-module triggering without CPU intervention. Critical motor-control peripherals - including 10-channel 32-bit GPTW, 9-channel 16-bit MTU3d, 4-channel HRPWM, and three 12-bit S12ADH ADC units - are synchronized to PCLKC (up to 160 MHz) for deterministic timing and sub-microsecond waveform edge placement.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv3 32-bit, 160 MHz max, 928 CoreMark - enables real-time motor control loop execution within <1 µs at full speed. |
| Memory | 1 MB code flash (no wait cycles ≤120 MHz), 128 KB SRAM (no wait states), 32 KB data flash (100k erase/write cycles) - supports robust firmware updates and runtime parameter storage. |
| PWM Capability | 10-channel GPTW + 4-channel HRPWM (195 ps min resolution) - delivers precise dead-time control and phase-aligned waveforms for 3-phase/5-phase inverters. |
| Analog Subsystem | 3 × 12-bit S12ADH ADC (30 total channels, simultaneous sampling across 7 channels), 6-channel CMPC, 2-channel 12-bit D/A - enables closed-loop current/voltage sensing with hardware-accelerated diagnostics. |
| Communication | CAN 2.0B (32 mailboxes), USB 2.0 FS host/function/OTG, 7× SCI, 1× RIIC (400 kbps), 1× RSPI (30 Mbps) - supports multi-protocol industrial connectivity and firmware download over USB/CAN. |
| Safety & Security | IEC60730-compliant features: CAC clock accuracy monitor, CRCA CRC calculator, DOC RAM test assist, TSIP-Lite AES-128/256, MPU, TM, and register write protection - meets Class B functional safety requirements. |
| Package & Environment | 144-pin LFQFP (20 × 20 mm, 0.5 mm pitch), –40°C to +105°C (G-grade), 2.7–5.5 V supply - suitable for high-temperature motor drive and industrial PLC environments. |
Pinout & Package
Package: PLQP0144KA-B - 144-pin Low-profile Quad Flat Package, 20 × 20 mm body, 0.5 mm pitch, exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, VSS | Power supply and ground | 11 dedicated VCC/VSS pairs ensure stable core/peripheral rail decoupling; supports 2.7–5.5 V operation with 5-V-tolerant I/O on 4 pins. |
| XTAL/EXTAL | Main clock oscillator interface | Accepts 8–24 MHz crystal/resonator for PLL reference; enables high-accuracy system timing and oscillation-stop detection per IEC60730. |
| MTIOC0A–MTIOC9A | MTU3d timer I/O | Dedicated 3-phase PWM output pins with automatic dead-time insertion and fault-triggered output disable via POE3B. |
| GTIOCA0–GTIOCB3 | GPTW waveform I/O | 10-channel complementary PWM outputs with HRPWM fine-tuning capability; supports synchronous start/stop across all channels. |
| ADTRG0–ADTRG2 | A/D conversion trigger inputs | Hardware-synchronized sampling triggers from MTU3/GPTW/ELC - eliminates software jitter in current-sensing loops. |
| TXD0/RXD0 | SCI0 serial interface | Asynchronous UART interface for debug, configuration, or host communication; supports baud-rate generation via TMR or internal clock. |
| TXD1/RXD1 | SCI1 serial interface | Dedicated LIN-capable SCIh channel compliant with ISO 17987; supports automotive body control and sensor networks. |
| CAN_TX/CAN_RX | CAN transceiver interface | Differential bus interface compliant with ISO 11898-1; supports 32 mailbox filtering and error frame handling in hardware. |
| USB_VBUS/USB_DP/USB_DM | USB 2.0 Full-Speed interface | Integrated transceiver with 2 KB on-chip buffer; supports self-powered/bus-powered modes and OTG role switching without external components. |
| SWJ_CLK/SWJ_DI/SWJ_DO | JTAG debugging interface | Standard 5-pin JTAG port for full-speed programming, real-time trace, and non-intrusive breakpoint debugging. |
Key Features
| Feature | Design Value |
|---|---|
| Event Link Controller (ELC) | 188 internal event signals enable autonomous peripheral chaining - e.g., GPTW overflow triggers ADC conversion without CPU wake-up, reducing latency by >5 µs. |
| Simultaneous Sampling ADC | Three S12ADH units allow concurrent sampling of up to 7 analog channels - critical for vector-controlled PMSM/BLDC motor current reconstruction. |
| High-Resolution PWM (HRPWM) | 195 ps minimum timing resolution on GPTW0–GPTW3 outputs - enables <1 ns dead-time accuracy for SiC/GaN inverter gate drivers. |
| Trusted Secure IP Lite (TSIP-Lite) | AES-128/256 encryption engine with true random number generator and key protection - secures firmware updates and prevents unauthorized cloning. |
| IEC60730 Safety Support | Hardware-accelerated self-test functions: CAC clock monitoring, CRCA memory integrity check, DOC RAM test assist, and oscillation-stop detection - reduces Class B certification effort. |
Applications
| Industrial Motor Drives | Automotive Body Control Modules |
|---|---|
|
Use Scenario: Field-oriented control (FOC) of 3-phase PMSM motors in HVAC compressors and industrial pumps. IC Role / Device Role / Timing Role: Real-time motor control MCU executing current/voltage PI loops, space-vector PWM generation, and fault protection at 20 kHz switching frequency. Use Value: Integrated 10-channel GPTW + HRPWM + simultaneous 7-channel ADC eliminates external timing ICs and reduces BOM cost by $1.20+ per unit. |
Use Scenario: Central body controller managing door locks, lighting, window lift, and seat position in 12 V automotive platforms. IC Role / Device Role / Timing Role: System-on-chip with CAN 2.0B, LIN-compliant SCIh, and 5-V-tolerant I/O - interfaces directly with sensors, actuators, and gateway ECUs. Use Value: On-chip 1 MB flash and 128 KB SRAM support AUTOSAR-compliant software partitioning and OTA update staging without external memory. |
| Smart Power Inverters | Industrial PLC I/O Modules |
|
Use Scenario: Grid-tied solar microinverters requiring high-efficiency MPPT and anti-islanding detection. IC Role / Device Role / Timing Role: Dual-role controller performing high-frequency PWM generation (160 MHz), isolation barrier communication, and grid synchronization via PLL-based zero-crossing detection. Use Value: Hardware CRC (CRCA), clock accuracy monitor (CAC), and independent watchdog (IWDT) meet UL 1741 SB and IEEE 1547-2018 safety mandates. |
Use Scenario: DIN-rail mounted digital I/O expansion module with analog input conditioning and CAN fieldbus interface. IC Role / Device Role / Timing Role: Deterministic real-time processor with ELC-linked timers and ADCs - guarantees <100 µs I/O scan cycle time under full load. Use Value: 110 GPIOs with 5-V tolerance, open-drain outputs, and programmable drive strength simplify interface to legacy 24 V industrial sensors and actuators. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar motor control MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F566TKEDFP#30 | Same RX66T Group die, identical 144-pin LFQFP package, but with 512 KB code flash and 64 KB SRAM instead of 1 MB/128 KB. | Targeted at cost-sensitive motor drives where firmware size and RAM footprint are constrained; lacks capacity for complex motion profiles or dual-core RTOS. | Select when BOM cost reduction is prioritized over future firmware scalability and advanced control algorithms. |
| R5F566TDDFP#30 | Same package and flash/SRAM configuration, but rated for –40°C to +85°C (D-grade) vs. +105°C (G-grade) of R5F566TKCGFP#30. | Suitable for ambient-temperature industrial enclosures but not under-hood automotive or high-heat motor drive cabinets. | Choose only if thermal environment is confirmed ≤85°C; otherwise, R5F566TKCGFP#30 ensures reliability in extended temperature operation. |
Compared with R5F566TKEDFP#30 and R5F566TDDFP#30, the R5F566TKCGFP#30 provides maximum memory headroom and extended temperature resilience - essential for safety-certified motor drives requiring long-term firmware maintainability and thermal margin.
Availability
R5F566TKCGFP#30 is available at Aetrix Electronics and suitable for industrial motor drives, automotive body controllers, smart power inverters, and PLC I/O modules requiring stable component supply across multi-year production lifecycles.
Supply support for R5F566TKCGFP#30 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for automotive, industrial, and IoT markets.
The RX66T Group - to which R5F566TKCGFP#30 belongs - was designed specifically for high-performance motor control and real-time industrial automation, integrating precision PWM, simultaneous ADC, and functional safety accelerators in a single chip.
FAQ
What is the maximum operating frequency and CoreMark score of the R5F566TKCGFP#30?
The R5F566TKCGFP#30 operates at a maximum frequency of 160 MHz and achieves 928 CoreMark performance. This benchmark reflects its RXv3 CPU core efficiency, including single-cycle instruction execution, 32-bit multiplier/divider, and barrel shifter - enabling deterministic real-time response in motor control loops. The R5F566TKCGFP#30 sustains this performance with no wait states on 128 KB SRAM and optimized flash access via ROM cache.
Does the R5F566TKCGFP#30 support IEC60730 Class B compliance out of the box?
Yes, the R5F566TKCGFP#30 includes hardware features required for IEC60730 Class B certification: clock frequency accuracy measurement circuit (CAC), CRC calculator (CRCA), data operation circuit (DOC) for RAM testing, oscillation-stop detection, independent watchdog timer (IWDT), and register write protection. These are implemented in silicon and documented in Renesas' Functional Safety Manual for RX66T, enabling certified implementations without external components. The R5F566TKCGFP#30 itself is not pre-certified, but provides the foundational hardware capabilities.
What PWM resolution and channel count does the R5F566TKCGFP#30 offer for motor control?
The R5F566TKCGFP#30 delivers 10 channels of 32-bit GPTW timers plus 4 dedicated HRPWM channels with minimum 195 ps timing resolution at 160 MHz - enabling precise dead-time control for SiC/GaN inverters. It supports single-phase (10 outputs), 3-phase (3 outputs), and 5-phase (2 outputs) complementary PWM modes, with automatic dead-time insertion and fault-triggered output disable via POE3B. This makes the R5F566TKCGFP#30 suitable for high-efficiency PMSM, BLDC, and induction motor drives.
How many analog input channels does the R5F566TKCGFP#30 support, and what ADC architecture is used?
The R5F566TKCGFP#30 integrates three 12-bit S12ADH ADC units totaling 30 input channels: Unit 0 (8 channels), Unit 1 (8 channels), and Unit 2 (14 channels). Units 0 and 1 each include three sample-and-hold circuits for simultaneous sampling across up to 7 channels - critical for vector-controlled motor current sensing. Unit 2 supports temperature sensor input and offers pseudo-differential amplification via integrated PGA. The R5F566TKCGFP#30 achieves 0.9 µs minimum conversion time at 60 MHz ADCLK.
What package type and pin count does the R5F566TKCGFP#30 use, and is it RoHS compliant?
The R5F566TKCGFP#30 uses a 144-pin Low-profile Quad Flat Package (LFQFP), designated PLQP0144KA-B, with 20 × 20 mm body size and 0.5 mm pitch. It includes an exposed thermal pad for enhanced heat dissipation in motor drive applications. The device is RoHS compliant and halogen-free, meeting JEDEC J-STD-020 moisture sensitivity level 3 (MSL3) requirements. All markings and packaging for the R5F566TKCGFP#30 conform to Renesas' environmental compliance documentation.
R5F566TKCGFP#30 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv3
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, EBI/EMI, I2C, LINbus, MMC/SD, SCI, SPI, SSI, UART/USART, USB
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 69
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 128K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- A/D 22x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F566TKCGFP#30 FAQ
1.How can I place an order for R5F566TKCGFP#30 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F566TKCGFP#30 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F566TKCGFP#30 reliable?
The price and inventory of R5F566TKCGFP#30 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F566TKCGFP#30 is usually 5 days.
3.What payment methods are accepted for R5F566TKCGFP#30?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F566TKCGFP#30 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F566TKCGFP#30?
R5F566TKCGFP#30 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F566TKCGFP#30 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F566TKCGFP#30?
For technical support, including R5F566TKCGFP#30 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F566TKCGFP#30 requirements.
6.How does Aetrix verify that R5F566TKCGFP#30 is sourced from the original manufacturer or authorized distributors?
All R5F566TKCGFP#30 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F566TKCGFP#30 meets industry standards.
7.What is the process for return or replacement of R5F566TKCGFP#30?
All R5F566TKCGFP#30 units undergo pre-shipment inspection (PSI). If there is an issue with R5F566TKCGFP#30, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F566TKCGFP#30 part is unused and in its original packaging.
Return procedure for R5F566TKCGFP#30:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F566TKCGFP#30 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

