Renesas R5F56719HDBP#20
- Part No.:
- R5F56719HDBP#20
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-TFBGA
- Datasheet:
-
R5F56719HDBP#20.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 64TFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:490
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Product details
Overview
R5F56719HDBP#20 from Renesas is a 32-bit RXv3 microcontroller operating at up to 120 MHz, featuring double-precision IEEE-754 FPU, 2 MB on-chip code flash with dual-bank support, 384 KB SRAM, and integrated CAN, USB 2.0 FS, SD host interface, QSPIX, and capacitive touch sensing - deployed in industrial HMI and smart metering systems requiring secure, low-power, real-time control.
For engineers reviewing the R5F56719HDBP#20 datasheet, R5F56719HDBP#20 pinout, R5F56719HDBP#20 application, or R5F56719HDBP#20 equivalent, key selection criteria include its 145-pin TFLGA (0.65-mm pitch) package, IEC60730-compliant safety features (TSIP, MPU, self-diagnostic A/D), RTC with battery backup, and 12-bit dual-unit ADC supporting 20-channel analog acquisition with disconnection detection.
Technical Context
The R5F56719HDBP#20 implements the RXv3 CPU core with 113 instructions, 16 general-purpose 32-bit registers, and hardware-accelerated 32×32→64-bit multiply and 32/32→32 divide. Its clock system supports external crystal (8–24 MHz), sub-clock (32.768 kHz), and internal oscillators (LOCO/HOCO/IWDT-dedicated), with independent domain clocks (ICLK up to 120 MHz, PCLKA/B/C/D up to 120/60/60/60 MHz).
Peripheral integration includes two CAN channels (32 mailboxes each), three RIIC/RIICHS interfaces (up to 3.4 Mbps), 13 SCI channels (with LIN/Manchester/HBS), QSPIX for serial flash execution, SDHI compliant with SD Physical Layer Spec v3.01, and CTSU supporting 17-key self-capacitance or 64-key mutual-capacitance touch sensing - all coordinated via Event Link Controller (ELC) for CPU-offload operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv3 32-bit, 120 MHz max - enables deterministic real-time execution of complex control algorithms and floating-point math without external coprocessor. |
| Memory | 2 MB code flash (dual-bank), 8 KB data flash (100k write cycles), 384 KB SRAM (no wait states), 4 KB standby RAM - supports firmware updates in background and persistent state retention during deep sleep. |
| Analog Peripherals | Dual 12-bit S12AD units (8 + 12 channels), 0.48 µs conversion time, self-diagnostic voltage generation, analog input disconnection detection - ensures reliable sensor monitoring in safety-critical applications. |
| Security & Safety | Trusted Secure IP (TSIP) with AES128/192/256, RSA, ECC, TRNG, SHA256; MPU (8 regions); IEC60730 compliance features including oscillator-stop detection and A/D self-test - meets functional safety requirements for Class B appliances. |
| Package & Temp | TFLGA-145 (9 × 9 mm, 0.65-mm pitch), –40°C to +85°C (D-version) - suitable for compact industrial PCBs with thermal constraints and high I/O density (111 GPIO, 20 5-V tolerant pins). |
| Communication | 2× CAN (ISO11898-1), 1× USB 2.0 FS host/function/OTG, 1× SDHI (25 MB/s), 1× QSPIX, 3× I2C (3.4 Mbps), 13× SCI variants - enables multi-protocol connectivity for gateway and edge-node designs. |
| Timers & Control | MTU3a (9-channel), TPUa (6-channel), CMT/CMTW, IWDTa (windowed), RTC with battery backup and time capture - delivers precise motor control, PWM generation, and time-stamped event logging. |
Pinout & Package
Package: TFLGA-145 (PTLG0145JC-A), 9 × 9 mm, 0.65-mm pitch, 145-terminal land grid array with exposed thermal pad. Pin mapping conforms to Renesas RX671 Group standard pin assignment for this package variant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Core & analog power supply | 2.7–3.6 V single-supply operation; separate analog domains enable noise-sensitive ADC performance. |
| VBATT | Backup power input | Supplies RTC and backup registers during main power loss - enables uninterrupted timekeeping and state retention. |
| XTAL / EXTAL | Main clock crystal connection | Supports 8–24 MHz external crystal for high-accuracy system timing and USB clock derivation. |
| RTCOUT / RTCIN | Sub-clock oscillator interface | Connects 32.768 kHz crystal for battery-backed RTC operation with ±3 ppm accuracy. |
| TXD0 / RXD0 | SCI0 asynchronous UART | Dedicated debug/programming interface in boot mode; supports baud rates up to 15 Mbps with programmable sampling timing. |
| USB_VBUS / USB_DP / USB_DM | USB 2.0 full-speed transceiver | Integrated PHY eliminates external transceiver; supports host, device, and OTG roles with 2 KB on-chip buffer. |
| SD0_CLK / SD0_CMD / SD0_DAT0–3 | SD host interface signals | Direct 4-bit SD bus interface compliant with SD Physical Layer Spec v3.01 - enables local storage and firmware update via SD card. |
| QSPIX_IO0–3 / QSPIX_CLK / QSPIX_CS | Quad-SPI memory interface | Executes code directly from external serial flash (XIP), reducing boot time and external memory footprint. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash architecture | Enables seamless firmware updates by switching active bank during runtime - no system interruption or external memory required. |
| Capacitive touch sensing unit (CTSU) | Supports 17-key self-cap or 64-key mutual-cap matrix with built-in noise cancellation - eliminates need for external touch controller in HMI designs. |
| Event Link Controller (ELC) | Routes 99 internal peripheral events (e.g., timer overflow, ADC completion) directly to other peripherals - reduces CPU overhead and interrupt latency. |
| IEC60730-compliant safety suite | Includes CRC accelerator, IWDT windowing, oscillator stop detection, A/D self-test, and register write protection - simplifies Class B certification effort. |
| Low-power modes | Four modes including deep software standby with 4 KB RAM retention and RTC active on VBATT - extends battery life in portable industrial devices. |
Applications
| Industrial HMI Panel | Smart Energy Meter |
|---|---|
|
Use Scenario: Touch-enabled front-panel interface for PLC controllers with real-time status display and parameter configuration. IC Role / Device Role / Timing Role: Main application processor executing GUI logic, managing capacitive touch inputs, driving SPI LCD, and communicating via CAN/USB to field devices. Use Value: Integrated CTSU and 120 MHz RXv3 core eliminate external touch controller and enable responsive 60 Hz UI rendering with <10 ms touch response latency. |
Use Scenario: Residential electricity meter with tamper detection, energy accumulation, and remote data upload via PLC or RF module. IC Role / Device Role / Timing Role: System-on-chip managing metrology ADC interface, RTC-based billing intervals, secure firmware updates, and encrypted communication stack. Use Value: TSIP crypto engine and IEC60730 safety features satisfy EN62053-21 and DLMS/COSEM security mandates without adding discrete security ICs. |
| Home Automation Gateway | Motor Drive Controller |
|
Use Scenario: Multi-protocol hub connecting Zigbee, BLE, and wired sensors to cloud via Ethernet/Wi-Fi using external MAC/PHY. IC Role / Device Role / Timing Role: Protocol translation engine handling USB HID, SD card logging, CAN bus diagnostics, and QSPIX-booted OTA update image storage. Use Value: Dual CAN channels and SDHI allow simultaneous fieldbus diagnostics and local firmware rollback - critical for zero-downtime field deployments. |
Use Scenario: Brushless DC motor controller for HVAC blowers with field-oriented control (FOC), current sensing, and thermal protection. IC Role / Device Role / Timing Role: Real-time motion controller generating complementary PWM (with dead-time insertion), sampling dual-shunt currents via S12AD, and executing FOC loop at 20 kHz. Use Value: MTU3a's complementary PWM mode with automatic dead-time compensation and POE3a short-circuit protection ensure safe inverter gate driving without external logic. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F56718HDBP#20 | Same RX671 Group, identical package and pinout, but with 1.5 MB flash and 256 KB SRAM - 500 KB less code memory and 128 KB less RAM. | Suitable for cost-sensitive designs where firmware size <1.5 MB and RAM usage <256 KB; lacks capacity for large OTA images or complex GUI assets. | Select when application firmware fits within 1.5 MB and system-level RAM budget permits reduction - maintains identical peripheral set and migration path. |
| R5F566TEBDFP#30 | RX66T Group part in 144-pin LQFP; 160 MHz CPU, 1 MB flash, 256 KB RAM, enhanced MTU3b with 3-phase PWM, but no USB, SDHI, or TSIP. | Targeted at motor control only - lacks connectivity (USB/SD/QSPIX) and security (TSIP) needed for gateway or metering use cases. | Choose only for pure motor control applications requiring higher PWM resolution and faster CPU; not a drop-in replacement due to different package, missing peripherals, and no security engine. |
Compared with R5F56719HDBP#20, the R5F56718HDBP#20 offers identical peripheral functionality and pin compatibility at lower memory cost, while the R5F566TEBDFP#30 trades connectivity and security for higher PWM precision and CPU speed - making it unsuitable for applications requiring USB, SD, or cryptographic operations.
Availability
R5F56719HDBP#20 is available at Aetrix Electronics and suitable for industrial HMI, smart metering, home automation gateways, and motor drive controllers requiring stable component supply across long-lifecycle production programs.
Supply support for R5F56719HDBP#20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RX671 Group, including R5F56719HDBP#20, is designed for high-integrity industrial applications demanding real-time performance, functional safety, and rich connectivity - targeting HMI, metering, and gateway systems needing secure, low-power, and feature-rich MCUs.
FAQ
What is the maximum operating frequency and CPU architecture of the R5F56719HDBP#20?
The R5F56719HDBP#20 operates at a maximum frequency of 120 MHz using the 32-bit RXv3 CPU core. It supports double-precision IEEE-754 floating-point arithmetic, 113 instructions including DSP extensions, and a collective register bank save function. This architecture delivers 707 CoreMark performance and enables deterministic real-time execution for industrial control tasks within the R5F56719HDBP#20.
Does the R5F56719HDBP#20 support secure firmware updates and cryptographic operations?
Yes, the R5F56719HDBP#20 integrates Trusted Secure IP (TSIP) supporting AES128/192/256, RSA, ECC, SHA256, MD5, and a true random number generator (TRNG). It also provides dual-bank flash for atomic firmware updates and MPU-based memory protection - enabling secure boot, encrypted OTA updates, and tamper-resistant key storage in the R5F56719HDBP#20.
What package type and pin count does the R5F56719HDBP#20 use?
The R5F56719HDBP#20 uses a 145-pin TFLGA package (PTLG0145JC-A), measuring 9 × 9 mm with 0.65-mm pitch and an exposed thermal pad. It provides 111 general-purpose I/O pins, 20 of which are 5-V tolerant, and supports industrial temperature range (–40°C to +85°C). This package is confirmed in the R01DS0373EJ0120 datasheet for the R5F56719HDBP#20.
Can the R5F56719HDBP#20 execute code directly from external serial flash memory?
Yes, the R5F56719HDBP#20 includes a Quad-SPI memory interface (QSPIX) that supports extended SPI, dual-SPI, and quad-SPI protocols. It enables eXecute-In-Place (XIP) from external serial flash, with selectable address width (8–32 bits) and direct instruction fetch - reducing reliance on internal flash and simplifying firmware scalability in the R5F56719HDBP#20.
What safety certifications and diagnostic features does the R5F56719HDBP#20 support?
The R5F56719HDBP#20 includes features aligned with IEC60730 Class B requirements: oscillation-stoppage detection, CRC accelerator (CRCA), windowed independent watchdog timer (IWDTa), self-diagnostic A/D converter test, and register write protection. These capabilities are documented in the R01DS0373EJ0120 datasheet and enable simplified functional safety certification for the R5F56719HDBP#20.
R5F56719HDBP#20 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-TFBGA
- Series:
- RX671
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- I2C, LINbus, QSPI, SCI, SPI, USB
- Peripherals:
- Capacitive Touch, DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 43
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 384K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 10x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F56719HDBP#20 FAQ
1.How can I place an order for R5F56719HDBP#20 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F56719HDBP#20 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F56719HDBP#20 reliable?
The price and inventory of R5F56719HDBP#20 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F56719HDBP#20 is usually 5 days.
3.What payment methods are accepted for R5F56719HDBP#20?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F56719HDBP#20 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F56719HDBP#20?
R5F56719HDBP#20 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F56719HDBP#20 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F56719HDBP#20?
For technical support, including R5F56719HDBP#20 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F56719HDBP#20 requirements.
6.How does Aetrix verify that R5F56719HDBP#20 is sourced from the original manufacturer or authorized distributors?
All R5F56719HDBP#20 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F56719HDBP#20 meets industry standards.
7.What is the process for return or replacement of R5F56719HDBP#20?
All R5F56719HDBP#20 units undergo pre-shipment inspection (PSI). If there is an issue with R5F56719HDBP#20, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F56719HDBP#20 part is unused and in its original packaging.
Return procedure for R5F56719HDBP#20:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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