Renesas R5F5671CDDFP#10
- Part No.:
- R5F5671CDDFP#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F5671CDDFP#10.pdf
- Description:
- IC MCU 32BIT 1.5MB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F5671CDDFP#10 from Renesas is a 32-bit RXv3 microcontroller operating at up to 120 MHz, featuring double-precision IEEE-754 FPU, 1 MB on-chip code flash, 384 KB SRAM, and integrated CAN, USB 2.0 FS, SD host interface, and capacitive touch sensing - deployed in industrial HMI and smart metering systems requiring real-time control and secure firmware execution.
For engineers reviewing the R5F5671CDDFP#10 datasheet, R5F5671CDDFP#10 pinout, R5F5671CDDFP#10 application, or R5F5671CDDFP#10 equivalent, key selection criteria include its 144-pin LFQFP package, dual-bank flash for safe firmware updates, TSIP-based AES256/SHA256 encryption, and IEC60730-compliant self-test features for functional safety certification.
Technical Context
The R5F5671CDDFP#10 implements the RXv3 CPU core with 16 general-purpose 32-bit registers, double-precision FPU (16×64-bit data registers), and collective register bank save for fast context switching. It supports little-endian instruction/data layout and includes a 32×32→64-bit multiplier and 32/32→32-bit divider.
Its clock system integrates PLL, sub-clock oscillator (32.768 kHz), and dedicated 120-kHz IWDT oscillator. Peripheral clocks are independently configurable: ICLK up to 120 MHz (CPU/QSPIX), PCLKA up to 120 MHz (MTU/RSPI), PCLKB up to 60 MHz (most peripherals), and ADCLK up to 60 MHz (S12AD units).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv3 32-bit, 120 MHz max - enables deterministic real-time response and 707 CoreMark performance. |
| Flash Memory | 1 MB code flash with dual-bank structure - allows background programming and seamless firmware update without halting execution. |
| SRAM | 384 KB on-chip SRAM, zero-wait-state at 120 MHz - supports large real-time buffers and complex algorithm stacks. |
| A/D Converter | Two 12-bit S12AD units (8 + 12 channels), 0.48 µs conversion time - delivers high-speed analog acquisition for sensor fusion and power monitoring. |
| Security | Trusted Secure IP (TSIP) with AES128/192/256, SHA256, TRNG, and key protection - meets IEC60730 Class B and secure boot requirements. |
| Package | PLQP0144KA-B, 144-pin LFQFP, 20 × 20 mm, 0.50-mm pitch - provides 113 GPIOs with 5-V tolerance and open-drain capability. |
| Operating Temp | –40°C to +85°C (D-version) - qualified for industrial ambient environments without derating. |
Pinout & Package
Package: PLQP0144KA-B, 144-pin Low-profile Quad Flat Package (LFQFP), 20 × 20 mm body, 0.50-mm lead pitch, exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Core & analog power supply | 2.7–3.6 V single-supply operation; separate analog domains ensure ADC accuracy and noise immunity. |
| VBATT | Backup power input | Enables RTC and backup registers during main power loss - critical for time-stamped event logging. |
| XTAL / EXTAL | Main crystal oscillator terminals | Supports 8–24 MHz external resonator for precise system timing and USB clock derivation. |
| RES# | Active-low reset input | Hardware reset assertion; compatible with standard push-button or supervisor IC reset signals. |
| USB_DP / USB_DM | USB 2.0 Full-Speed differential pair | Integrated transceiver eliminates external PHY - reduces BOM cost and PCB area for embedded USB device/host. |
| TXD0 / RXD0 | SCI channel 0 serial interface | Asynchronous UART mode with programmable baud rate - used for debug console and field firmware updates. |
| CTX00–CTX16 | Capacitive touch sense inputs | Supports up to 17 self-capacitance keys - enables robust, low-power touch HMI without external controller. |
| CAN0_TX / CAN0_RX | CAN channel 0 differential interface | ISO 11898-1 compliant; 32 mailbox FIFO - handles multi-node industrial bus communication with hardware filtering. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash memory | Enables over-the-air (OTA) firmware updates with zero downtime - application code executes from Bank A while Bank B is reprogrammed. |
| IEC60730-compliant safety functions | Oscillation-stop detection, CRC-accelerated self-test, A/D converter diagnostics, and register write protection - simplifies Class B certification effort. |
| Event Link Controller (ELC) | 99 internal event signals routed without CPU intervention - e.g., TPU timer overflow triggers ADC conversion, reducing latency and ISR overhead. |
| SD host interface (SDHI) | Supports 4-bit SD bus at 25 MB/s (high-speed mode) - enables local data logging to removable media in metering and data acquisition systems. |
| Trusted Secure IP (TSIP) | Hardware-accelerated AES256, SHA256, and true random number generation - secures firmware signing, encrypted storage, and secure key provisioning. |
Applications
| Industrial HMI Panel | Smart Electricity Meter |
|---|---|
|
Use Scenario: Touch-enabled front-panel display with real-time energy metrics, tariff switching, and tamper alerts. IC Role / Device Role / Timing Role: Main application MCU handling GUI rendering, capacitive touch decoding, CAN/RS485 comms, and RTC-backed logging. Use Value: Integrated CTSU supports 17-key overlay with noise immunity; dual-bank flash enables remote firmware patching without service visit. |
Use Scenario: Revenue-grade meter with pulse counting, harmonic analysis, and secure firmware updates via PLC or RF link. IC Role / Device Role / Timing Role: System controller managing metrology ADC interface, SDHI-based event log storage, and TSIP-secured OTA updates. Use Value: 12-bit S12AD unit 1 acquires voltage/current waveforms at 2 MSPS equivalent; SHA256 verifies firmware signature before execution. |
| Building Automation Gateway | Medical Diagnostic Sensor Hub |
|
Use Scenario: Protocol translator bridging BACnet MS/TP, Modbus RTU, and CANopen networks in HVAC controllers. IC Role / Device Role / Timing Role: Dual-CAN + multiple SCI/RSPI interfaces coordinate protocol conversion with deterministic timing via ELC-triggered DMA transfers. Use Value: 32-mailbox CAN per channel handles concurrent node polling; PCLKA-synchronized MTU timers generate precise baud-rate clocks for legacy fieldbus. |
Use Scenario: Portable diagnostic device aggregating ECG, temperature, and SpO₂ sensors with encrypted cloud upload. IC Role / Device Role / Timing Role: Real-time sensor fusion MCU with TSIP-encrypted data packaging, USB CDC for PC sync, and standby RAM retention during sleep. Use Value: On-die temperature sensor (±1°C) calibrates analog front-end; 4 KB standby RAM preserves session state across deep software standby. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F5670EDDFP#10 | Same RX671 Group, 2 MB flash, 144-pin LFQFP - adds 1 MB code flash and 128 KB extra SRAM. | Better suited for applications requiring larger OTA image storage or complex RTOS workloads. | Select when firmware size exceeds 1 MB or additional buffer space is needed for network stack or audio processing. |
| R5F566TEADFP#30 | RX66T Group, 160 MHz, 1 MB flash, 256 KB SRAM, no TSIP or CTSU - optimized for motor control with advanced PWM timers. | Lacks encryption and touch sensing but offers higher PWM resolution and three-phase inverter gate drive support. | Prefer for servo drives or inverters where real-time PWM timing dominates over security or HMI features. |
Compared with R5F5671CDDFP#10, R5F5670EDDFP#10 extends flash/SRAM for larger applications without changing footprint or peripheral set, while R5F566TEADFP#30 trades security and touch for enhanced motor control peripherals - making each optimal for distinct subsystem roles in industrial systems.
Availability
R5F5671CDDFP#10 is available at Aetrix Electronics and suitable for industrial HMI, smart metering, building automation gateways, and medical sensor hubs requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F5671CDDFP#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for automotive, industrial, and IoT markets.
The RX671 Group targets industrial and consumer applications demanding high performance, functional safety, and security - designed to replace legacy 32-bit MCUs with integrated USB, CAN, SD, and cryptographic acceleration.
FAQ
What is the maximum operating frequency and CoreMark score of the R5F5671CDDFP#10?
The R5F5671CDDFP#10 operates at a maximum frequency of 120 MHz and achieves 707 CoreMark points under benchmark conditions. This performance stems from the RXv3 CPU core's efficient pipeline, double-precision FPU, and zero-wait-state access to 384 KB SRAM - enabling real-time deterministic execution in demanding industrial control tasks.
Does the R5F5671CDDFP#10 support secure firmware updates?
Yes, the R5F5671CDDFP#10 supports secure firmware updates via its Trusted Secure IP (TSIP) module, which provides hardware-accelerated AES256 decryption and SHA256 signature verification. Combined with dual-bank flash memory, this enables authenticated, atomic firmware swaps - ensuring integrity and rollback protection during over-the-air updates.
What package type and pin count does the R5F5671CDDFP#10 use?
The R5F5671CDDFP#10 uses the PLQP0144KA-B package: a 144-pin Low-profile Quad Flat Package (LFQFP) with 20 × 20 mm body size and 0.50-mm lead pitch. It provides 113 general-purpose I/O pins, including 20 with 5-V tolerance and open-drain capability - matching industrial interface voltage levels.
Can the R5F5671CDDFP#10 operate in low-power modes with RTC and backup registers active?
Yes, the R5F5671CDDFP#10 supports deep software standby mode with VBATT-powered retention of the sub-clock oscillator, RTC, and backup registers. In this state, current consumption drops below 1 µA while maintaining accurate timekeeping and tamper-detection readiness - ideal for battery-backed metering and alarm systems.
Which communication interfaces are integrated into the R5F5671CDDFP#10?
The R5F5671CDDFP#10 integrates USB 2.0 Full-Speed (host/function/OTG), two CAN 2.0B channels, three I²C interfaces (including one RIICHS at 3.4 Mbps), up to 13 SCI channels, two RSCI with Manchester encoding, QSPIX for serial flash, SD host interface, and RSPI/RSPIA for SPI peripherals - covering all major industrial and embedded connectivity needs in a single chip.
R5F5671CDDFP#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX671
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- CANbus, I2C, LINbus, QSPI, SCI, SPI, USB
- Peripherals:
- Capacitive Touch, DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 80
- Program Memory Size:
- 1.5MB (1.5M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 384K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 16x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F5671CDDFP#10 FAQ
1.How can I place an order for R5F5671CDDFP#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F5671CDDFP#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F5671CDDFP#10 reliable?
The price and inventory of R5F5671CDDFP#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F5671CDDFP#10 is usually 5 days.
3.What payment methods are accepted for R5F5671CDDFP#10?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F5671CDDFP#10 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F5671CDDFP#10?
R5F5671CDDFP#10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F5671CDDFP#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F5671CDDFP#10?
For technical support, including R5F5671CDDFP#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F5671CDDFP#10 requirements.
6.How does Aetrix verify that R5F5671CDDFP#10 is sourced from the original manufacturer or authorized distributors?
All R5F5671CDDFP#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F5671CDDFP#10 meets industry standards.
7.What is the process for return or replacement of R5F5671CDDFP#10?
All R5F5671CDDFP#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F5671CDDFP#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F5671CDDFP#10 part is unused and in its original packaging.
Return procedure for R5F5671CDDFP#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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