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Renesas R5F5671CDDLK#20
- Part No.:
- R5F5671CDDLK#20
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 145-TFLGA
- Datasheet:
-
R5F5671CDDLK#20.pdf
- Description:
- IC MCU 32BIT 1.5MB FLSH 145TFLGA
- Quantity:
- Payment:
- Shipping:
Inventory:4,848
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Product details
Overview
R5F5671CDDLK#20 from Renesas is a 32-bit RXv3 microcontroller operating at up to 120 MHz, featuring double-precision IEEE-754 FPU, 2 MB on-chip code flash with dual-bank support, 384 KB SRAM, and integrated CAN, USB 2.0 FS, SD host interface, QSPIX, and capacitive touch sensing - deployed in industrial HMI and smart metering systems requiring secure, low-power, real-time control.
For engineers reviewing the R5F5671CDDLK#20 datasheet, R5F5671CDDLK#20 pinout, R5F5671CDDLK#20 application, or R5F5671CDDLK#20 equivalent, key selection criteria include its 145-pin TFLGA (0.65-mm pitch) package, IEC60730-compliant safety features (TSIP, CRC, IWDT, self-diagnostic A/D), and 120-MHz deterministic real-time performance with MPU and dual-bank flash for safe firmware updates.
Technical Context
The R5F5671CDDLK#20 implements the RXv3 CPU core with 113 instructions, including DSP and floating-point extensions, and supports little- or big-endian data arrangement. Its clock system integrates PLL, sub-clock oscillator (32.768 kHz), and dedicated 120-kHz IWDT oscillator - enabling independent timing domains for ICLK (up to 120 MHz), PCLKA/B/C/D (up to 120/60/60/60 MHz), and FCLK/BCLK (up to 60 MHz).
Peripheral subsystems are tightly coupled via the Event Link Controller (ELC), allowing hardware-triggered timer starts, A/D conversions, and DMA transfers without CPU intervention. The device includes two 12-bit A/D units (8+12 channels), CTSU supporting 17 self-capacitance keys or 64 mutual-capacitance keys, and TSIP encryption engine with AES128/192/256, RSA, ECC, SHA256, and TRNG - all verified per IEC60730 Class B requirements.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv3 32-bit, 120 MHz max, 707 CoreMark, double-precision FPU, 16 register banks |
| Memory | 2 MB code flash (dual-bank, BGO programming), 8 KB data flash (100k cycles), 384 KB SRAM, 4 KB standby RAM |
| Package & Pins | PTLG0145JC-A 145-pin TFLGA, 9 × 9 mm, 0.65-mm pitch, 111 GPIO with 5-V tolerance |
| Peripherals | CAN (2 ch, 32 mailboxes/ch), USB 2.0 FS host/function/OTG, SDHI (25 MB/s), QSPIX, 13× SCI, 3× RSPId, RIIC/RIICHS (3.4 Mbps) |
| Analog & Safety | Two 12-bit S12AD units (8+12 ch), CTSU (17 self/64 mutual keys), TSIP crypto, MPU, IWDT, LVD, self-diagnostic A/D |
| Operating Range | –40°C to +85°C (D-version), single 2.7–3.6 V supply, four low-power modes including deep software standby |
Pinout & Package
PTLG0145JC-A is a 145-pin thin fine-pitch land grid array (TFLGA) package measuring 9 × 9 mm with 0.65-mm pitch, designed for high-density PCB layouts and thermal efficiency in industrial enclosures. Pin functions align with Renesas' standardized RX671 Group pin mapping for signal integrity and EMI resilience.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Power supply inputs | Separate analog/digital rails enable noise isolation for ADC and high-speed logic |
| VBATT | Backup power input | Supplies RTC and backup registers during main power loss (battery-backed operation) |
| XTAL / EXTAL | Main crystal oscillator terminals | Supports 8–24 MHz external resonator for precise system clock generation |
| RES# | Active-low reset input | Hardware reset assertion; internal POR/LVD also available for fail-safe startup |
| USB_DP / USB_DM | USB 2.0 full-speed differential pair | Integrated transceiver eliminates external PHY; supports host, function, and OTG roles |
| SD0_CMD / SD0_CLK / SD0_DAT[0:3] | SD host interface signals | Direct connection to SD memory/SDIO cards; supports 1- or 4-bit bus mode at 25 MB/s |
| QSPIX_IO0–IO3 | Quad-SPI memory interface pins | Enables XIP (execute-in-place) from serial flash; supports extended/dual/quad protocols |
| CTSU_Sx (x=0–16) | Capacitive touch sensing inputs | Single-pin self-capacitance or matrix mutual-capacitance configuration up to 64 keys |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash architecture | Enables seamless firmware updates: one bank executes while the other is reprogrammed via BGO |
| Trusted Secure IP (TSIP) | Hardware-accelerated AES/RSA/ECC/SHA256 with key protection and TRNG - certified for IEC60730 Class B |
| Event Link Controller (ELC) | Hardware interconnect between 99 internal events eliminates CPU polling overhead for timer/A/D/DMA triggers |
| IEC60730 safety suite | Oscillation-stop detection, CRC calculation unit, IWDT windowing, A/D self-test, and register write protection |
| Flexible clock domain partitioning | Independent ICLK (120 MHz), PCLKA/B/C/D (120/60/60/60 MHz), FCLK/BCLK (60 MHz) allow optimized peripheral timing |
Applications
| Industrial HMI Panels | Smart Electricity Meters |
|---|---|
Use Scenario: Touch-enabled operator interface with real-time energy display, tariff switching, and remote firmware update capability. IC Role / Device Role / Timing Role: Main application MCU handling GUI rendering, capacitive touch decoding, CAN/USB communication, and secure OTA updates. Use Value: CTSU supports 17-key self-capacitance panel; dual-bank flash enables zero-downtime field updates; TSIP secures firmware signing keys. | Use Scenario: Revenue-grade meter with metrology IC interface, tamper detection, and DLMS/COSEM protocol stack over PLC or RF. IC Role / Device Role / Timing Role: System controller managing metrology data aggregation, secure storage, communication stacks (CAN, USB, RS485 via SCI), and RTC-critical billing timestamps. Use Value: Dual 12-bit A/D units acquire metrology sensor data; backup RAM preserves billing counters during brownouts; IWDT with windowing ensures fail-safe reset behavior. |
| Building Automation Controllers | Medical Diagnostic Devices |
Use Scenario: HVAC controller integrating temperature/humidity sensors, valve actuation, BACnet/IP over Ethernet (via external PHY), and local HMI. IC Role / Device Role / Timing Role: Real-time control MCU executing PID loops, managing CAN bus for zone sensors, and hosting web server for configuration. Use Value: MTU3a timers deliver precise PWM for motor control; 111 GPIO support discrete I/O expansion; SDHI stores log files and firmware images. | Use Scenario: Portable ultrasound or patient monitor requiring low-power operation, analog front-end interfacing, and encrypted data export. IC Role / Device Role / Timing Role: Central processor handling A/D sampling of analog biosignals, image processing acceleration via FPU, and HIPAA-compliant data encryption. Use Value: Double-precision FPU accelerates FFT-based signal analysis; TSIP performs AES256 encryption of stored waveforms; 384 KB SRAM buffers multi-frame acquisitions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F5671EDDLK#20 | Same RX671 Group, 2 MB flash, but 145-pin TFLGA (0.50-mm pitch) package - smaller footprint, tighter layout constraints | Preferred where board space is critical and 0.50-mm pitch assembly is supported | Select when footprint reduction outweighs 0.65-mm pitch's assembly robustness and thermal performance |
| R5F566TEBDFP#30 | RX66T Group part: 160 MHz CPU, 1 MB flash, no TSIP or CTSU, but enhanced MTU3 for motor control (3-phase inverter PWM) | Better suited for servo drives and inverters; lacks security/touch features of R5F5671CDDLK#20 | Choose for high-performance motor control without security or HMI requirements |
Compared with R5F5671EDDLK#20, the R5F5671CDDLK#20 offers superior thermal dissipation and easier assembly due to its 0.65-mm pitch, while R5F566TEBDFP#30 trades security and touch capability for higher CPU speed and motor-specific peripherals - making R5F5671CDDLK#20 optimal for secure, touch-enabled industrial edge nodes.
Availability
R5F5671CDDLK#20 is available at Aetrix Electronics and suitable for industrial HMI, smart metering, building automation, and medical diagnostic devices requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F5671CDDLK#20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RX671 Group is designed for secure, real-time industrial edge applications demanding functional safety (IEC60730), cryptographic acceleration, capacitive touch, and rich connectivity - targeting HMI, metering, and automation controllers.
FAQ
What is the maximum operating frequency and CoreMark score of the R5F5671CDDLK#20?
The R5F5671CDDLK#20 operates at a maximum frequency of 120 MHz and achieves 707 CoreMark points under benchmark conditions. This performance stems from the RXv3 CPU core's efficient pipeline, double-precision FPU, and zero-wait-state access to 384 KB SRAM - enabling deterministic real-time execution in industrial control loops and HMI rendering tasks. The R5F5671CDDLK#20 sustains this speed across its full voltage range (2.7–3.6 V) and temperature range (–40°C to +85°C).
Does the R5F5671CDDLK#20 support secure firmware updates and cryptographic operations?
Yes, the R5F5671CDDLK#20 integrates Trusted Secure IP (TSIP) with hardware-accelerated AES128/192/256, RSA, ECC, SHA256, and a true-random number generator (TRNG). It supports secure boot, firmware signature verification, and key protection against illicit copying. Combined with dual-bank flash and background programming (BGO), the R5F5671CDDLK#20 enables authenticated, zero-downtime field updates - meeting IEC60730 Class B safety requirements for industrial deployments.
What package type and pin count does the R5F5671CDDLK#20 use?
The R5F5671CDDLK#20 uses the PTLG0145JC-A package: a 145-pin thin fine-pitch land grid array (TFLGA) with 9 × 9 mm body size and 0.65-mm pitch. This package provides 111 general-purpose I/O pins with 5-V tolerance, pull-up resistors, and open-drain capability - optimized for industrial PCB reliability, thermal management, and EMI resilience. The R5F5671CDDLK#20's pinout is fully compatible with other RX671 Group variants in the same package family.
How does the R5F5671CDDLK#20 handle analog-to-digital conversion and temperature sensing?
The R5F5671CDDLK#20 integrates two independent 12-bit A/D converter units: S12AD0 (8 channels) and S12AD1 (12 channels), each supporting 8-/10-/12-bit resolution and conversion times as fast as 0.42 µs. It also includes an on-die temperature sensor whose output is digitized by S12AD1, delivering ±1°C relative precision. Both units feature self-diagnostic modes, analog input disconnection detection, and ELC-triggered sampling - ensuring reliable metrology in smart meters and environmental monitoring systems using the R5F5671CDDLK#20.
Can the R5F5671CDDLK#20 directly interface with SD cards and serial flash memory?
Yes, the R5F5671CDDLK#20 includes a dedicated SD host interface (SDHI) supporting 1- and 4-bit SD buses at up to 25 MB/s (high-speed mode), compliant with SD Physical Layer Spec v3.01. It also features a Quad-SPI memory interface (QSPIX) that supports extended, dual, and quad-SPI protocols for XIP (execute-in-place) from serial flash. These interfaces eliminate external glue logic and reduce BOM cost in data-logging, firmware storage, and boot-from-flash applications using the R5F5671CDDLK#20.
R5F5671CDDLK#20 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 145-TFLGA
- Series:
- RX671
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- CANbus, I2C, LINbus, QSPI, SCI, SPI, USB
- Peripherals:
- Capacitive Touch, DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 113
- Program Memory Size:
- 1.5MB (1.5M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 384K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 20x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F5671CDDLK#20 FAQ
1.How can I place an order for R5F5671CDDLK#20 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F5671CDDLK#20 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F5671CDDLK#20 reliable?
The price and inventory of R5F5671CDDLK#20 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F5671CDDLK#20 is usually 5 days.
3.What payment methods are accepted for R5F5671CDDLK#20?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F5671CDDLK#20 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F5671CDDLK#20?
R5F5671CDDLK#20 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F5671CDDLK#20 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F5671CDDLK#20?
For technical support, including R5F5671CDDLK#20 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F5671CDDLK#20 requirements.
6.How does Aetrix verify that R5F5671CDDLK#20 is sourced from the original manufacturer or authorized distributors?
All R5F5671CDDLK#20 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F5671CDDLK#20 meets industry standards.
7.What is the process for return or replacement of R5F5671CDDLK#20?
All R5F5671CDDLK#20 units undergo pre-shipment inspection (PSI). If there is an issue with R5F5671CDDLK#20, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F5671CDDLK#20 part is unused and in its original packaging.
Return procedure for R5F5671CDDLK#20:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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