Renesas R5F5671CHDBP#20
- Part No.:
- R5F5671CHDBP#20
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-TFBGA
- Datasheet:
-
R5F5671CHDBP#20.pdf
- Description:
- IC MCU 32BIT 1.5MB FLASH 64TFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:490
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Product details
Overview
R5F5671CHDBP#20 from Renesas is a 32-bit RXv3 microcontroller operating at up to 120 MHz, featuring double-precision IEEE-754 FPU, 1 MB on-chip code flash, 384 KB SRAM, and integrated CAN, USB 2.0 FS, SD host, QSPIX, and capacitive touch sensing-designed for industrial HMI, smart metering, and secure IoT edge nodes.
For engineers reviewing the R5F5671CHDBP#20 datasheet, R5F5671CHDBP#20 pinout, R5F5671CHDBP#20 application, or R5F5671CHDBP#20 equivalent, key selection considerations include its 144-pin LFQFP package (PLQP0144KA-B), dual-bank flash for safe firmware updates, TSIP-based AES256/SHA256 encryption, IEC60730 safety support, and 12-bit A/D with self-diagnostic capability.
Technical Context
The R5F5671CHDBP#20 implements the RXv3 CPU core with 113 instructions, 16 general-purpose 32-bit registers, and hardware-accelerated DSP operations-including 32×32→64-bit multiply and 32/32→32-bit divide. Its memory subsystem integrates 1 MB code flash with ROM cache (8 KB), enabling zero-wait access at ≤60 MHz and one-wait access at 120 MHz.
Peripheral timing is decoupled across five clock domains: ICLK (up to 120 MHz for CPU/QSPIX), PCLKA (up to 120 MHz for MTU/RSPI/RIICHS), PCLKB (up to 60 MHz for most peripherals), PCLKC/PCLKD (up to 60 MHz for S12AD units), and FCLK/BCLK (up to 60 MHz). The ELC enables direct inter-module event linking without CPU intervention-critical for deterministic real-time control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv3 32-bit, 120 MHz max, 707 CoreMark, double-precision FPU, MPU support |
| Memory | 1 MB code flash (dual-bank), 8 KB data flash (100k write cycles), 384 KB SRAM (no wait states) |
| Package | PLQP0144KA-B: 144-pin LFQFP, 20 × 20 mm, 0.50-mm pitch, 113 I/O pins (20 × 5-V tolerant) |
| Peripherals | 2× CAN (32 mailboxes/channel), 1× USB 2.0 FS host/function/OTG, 1× SDHI (25 MB/s), 1× QSPIX, 13× SCI, 3× RSPId, 1× RIICHS (3.4 Mbps) |
| Security & Safety | Trusted Secure IP (TSIP) with AES128/192/256, SHA256, TRNG, CRC, and IEC60730-compliant self-test functions |
| Analog | Two 12-bit S12AD units (8 + 12 channels), 0.48 µs conversion time, self-diagnostic, analog input disconnection detection |
| Timers | MTU3a (9-channel), TPUa (6-channel), CMTW (2× 32-bit), IWDTa (14-bit, dedicated 120-kHz oscillator) |
Pinout & Package
Package: PLQP0144KA-B - 144-pin Low-profile Quad Flat Package, 20 × 20 mm body, 0.50-mm lead pitch, exposed thermal pad, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC0 / AVCC1 | Power supply inputs | Core/analog power rails (2.7–3.6 V); separate AVCC domains enable noise-isolated ADC operation |
| VBATT | Backup power input | Supplies RTC, backup registers, and sub-clock oscillator during main power loss |
| XTAL / EXTAL | Main crystal oscillator terminals | Supports 8–24 MHz external crystal; enables precise system clock and USB timing |
| RTCIN / RTCOUT | Sub-clock oscillator terminals | Connects 32.768 kHz crystal for battery-backed RTC and low-power wake-up timing |
| USB_DP / USB_DM | USB 2.0 full-speed differential pair | Integrated transceiver eliminates external PHY; supports host/function/OTG without pull-up resistors |
| SD0_CMD / SD0_CLK / SD0_DAT0–3 | SD host interface signals | 1- or 4-bit SD bus supporting SD memory and SDIO cards per Physical Layer Spec v3.01 |
| QSPIX_IO0–3 / QSPIX_CLK / QSPIX_CS | Quad-SPI memory interface | Enables XIP (execute-in-place) from serial flash using quad-SPI protocol for fast boot and code overlay |
| CTSU_TX0–16 | Capacitive touch sensing electrodes | Supports up to 17 self-capacitance keys or 64 mutual-capacitance keys in matrix configuration |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank flash architecture | Enables background programming and seamless bank switching for fail-safe OTA firmware updates |
| Trusted Secure IP (TSIP) | Hardware-accelerated AES256/SHA256/TRNG with key protection prevents firmware cloning and ensures secure boot integrity |
| IEC60730 Class B compliance support | Includes oscillation-stop detection, CRC-A, IWDTa windowing, A/D self-test, and register write protection for functional safety certification |
| Event Link Controller (ELC) | 99 internal event signals routed without CPU overhead-e.g., timer overflow directly triggers ADC conversion or GPIO toggle |
| Flexible clock domain partitioning | Independent ICLK, PCLKA–D, FCLK, and BCLK allow optimized power/performance trade-offs per peripheral subsystem |
Applications
| Industrial HMI Panel | Smart Electricity Meter |
|---|---|
Use Scenario: Touch-enabled front-panel display with real-time energy monitoring, tariff switching, and tamper alerts. IC Role / Device Role / Timing Role: Main application MCU handling capacitive touch sensing (CTSU), RS485/CAN communication, secure firmware updates, and RTC-based billing intervals. Use Value: Integrated CTSU eliminates external touch controller; TSIP secures tariff tables and firmware; dual-bank flash enables field-upgradable metering algorithms without service interruption. | Use Scenario: DIN-rail mounted meter with anti-tampering features, load profiling, and remote firmware validation via DLMS/COSEM over PLC or RF. IC Role / Device Role / Timing Role: Security-critical metering controller executing IEC62056-compliant protocols, performing cryptographic signing of consumption logs, and managing secure key storage. Use Value: TSIP accelerates AES-GCM authentication of DLMS packets; 12-bit S12AD with self-diagnostic meets IEC62053 accuracy requirements; backup RAM preserves critical logs during brownout. |
| Secure IoT Gateway | Motor Control Edge Node |
Use Scenario: Field-deployed gateway aggregating sensor data from Modbus RTU, CANopen, and BLE devices before TLS-encrypted upload to cloud. IC Role / Device Role / Timing Role: Protocol translation hub with USB host (for BLE dongles), CAN, RSPI, and secure TLS offload via TSIP crypto engine. Use Value: Hardware SHA256 accelerates certificate verification; QSPIX fetches encrypted firmware images; USB host supports plug-and-play BLE adapters without external USB PHY. | Use Scenario: Compact inverter drive controlling PMSM motors in HVAC or pump systems with field-oriented control (FOC) and safety shutdown. IC Role / Device Role / Timing Role: Real-time motor controller running FOC algorithm on RXv3 core, generating PWM via MTU3a complementary outputs, and sampling current/voltage via S12AD. Use Value: MTU3a's dead-time compensation and synchronous PWM update ensure clean gate drive; 120-MHz CPU delivers <1 µs FOC loop latency; IWDTa with windowing detects control software hangs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit industrial MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F5671EHDBP#20 | Same RX671 Group, 2 MB flash (vs. 1 MB), identical pinout and peripheral set | Required where larger firmware image size or dual-application partitioning is needed | Select when >1 MB code space is required; otherwise R5F5671CHDBP#20 offers optimal cost/performance balance |
| R5F566TEHDFP#30 | RX66T Group, 160 MHz, 1 MB flash, focused on motor control (3× MTU3, 3× 12-bit ADC, encoder interfaces) | Better suited for high-performance servo drives requiring triple simultaneous PWM generation and encoder capture | Choose R5F566TEHDFP#30 only if advanced motor control features outweigh R5F5671CHDBP#20's security and connectivity advantages |
Compared with R5F5671EHDBP#20, the R5F5671CHDBP#20 trades flash capacity for lower unit cost while retaining identical security, connectivity, and real-time capabilities; versus R5F566TEHDFP#30, it prioritizes broad peripheral integration and certified security over raw motor-control throughput.
Availability
R5F5671CHDBP#20 is available at Aetrix Electronics and suitable for industrial HMI, smart metering, secure IoT gateways, and motor control edge nodes requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for R5F5671CHDBP#20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader headquartered in Tokyo, Japan, specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and enterprise applications.
The RX671 Group targets secure, connected industrial edge devices-combining high-performance RXv3 execution, hardware security (TSIP), and rich connectivity (USB, SDHI, CAN, QSPIX) in a single chip for certified, field-upgradable systems.
FAQ
What is the maximum operating frequency and CoreMark score of the R5F5671CHDBP#20?
The R5F5671CHDBP#20 operates at a maximum frequency of 120 MHz and achieves 707 CoreMark under benchmark conditions. This performance stems from the RXv3 CPU core's efficient instruction pipeline, double-precision FPU, and zero-wait-state access to 384 KB SRAM. The R5F5671CHDBP#20 maintains this speed across its full voltage range (2.7–3.6 V) and industrial temperature range (–40°C to +85°C).
Does the R5F5671CHDBP#20 support secure firmware updates and cryptographic operations?
Yes, the R5F5671CHDBP#20 integrates Trusted Secure IP (TSIP) supporting AES128/192/256, SHA256, TRNG, and RSA acceleration. Its dual-bank flash enables background programming and atomic bank switching-allowing validated firmware images to be written while the system runs from the active bank. The R5F5671CHDBP#20 also provides register write protection and IEC60730-compliant self-tests for secure boot and runtime integrity.
What package type and pin count does the R5F5671CHDBP#20 use?
The R5F5671CHDBP#20 uses the PLQP0144KA-B package: a 144-pin Low-profile Quad Flat Package measuring 20 × 20 mm with 0.50-mm pitch. It provides 113 general-purpose I/O pins, including 20 that are 5-V tolerant, plus dedicated pins for USB, SD host, QSPIX, CAN, and capacitive touch sensing. This package is pin-compatible with other RX671 Group variants in the same footprint.
Can the R5F5671CHDBP#20 interface directly with SD memory cards and serial flash?
Yes, the R5F5671CHDBP#20 includes a full-featured SD host interface (SDHI) supporting 1- and 4-bit SD buses at up to 25 MB/s (high-speed mode), compliant with SD Physical Layer Spec v3.01. It also integrates QSPIX-a dedicated Quad-SPI memory interface enabling execute-in-place (XIP) from serial NOR flash using extended/dual/quad-SPI protocols. Both interfaces require no external level shifters or glue logic.
What safety and reliability features does the R5F5671CHDBP#20 offer for industrial applications?
The R5F5671CHDBP#20 includes multiple IEC60730 Class B compliance features: oscillation-stop detection, CRC-A for memory checking, independent watchdog timer (IWDTa) with configurable windowing, A/D converter self-diagnostic, and register write protection. It also supports battery-backed RTC and standby RAM, four low-power modes (including deep software standby), and voltage-monitoring reset circuits with programmable thresholds-ensuring robust operation in harsh industrial environments.
R5F5671CHDBP#20 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-TFBGA
- Series:
- RX671
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- I2C, LINbus, QSPI, SCI, SPI, USB
- Peripherals:
- Capacitive Touch, DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 43
- Program Memory Size:
- 1.5MB (1.5M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 384K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 3.6V
- Data Converters:
- A/D 10x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F5671CHDBP#20 FAQ
1.How can I place an order for R5F5671CHDBP#20 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F5671CHDBP#20 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F5671CHDBP#20 reliable?
The price and inventory of R5F5671CHDBP#20 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F5671CHDBP#20 is usually 5 days.
3.What payment methods are accepted for R5F5671CHDBP#20?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F5671CHDBP#20 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F5671CHDBP#20?
R5F5671CHDBP#20 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F5671CHDBP#20 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F5671CHDBP#20?
For technical support, including R5F5671CHDBP#20 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F5671CHDBP#20 requirements.
6.How does Aetrix verify that R5F5671CHDBP#20 is sourced from the original manufacturer or authorized distributors?
All R5F5671CHDBP#20 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F5671CHDBP#20 meets industry standards.
7.What is the process for return or replacement of R5F5671CHDBP#20?
All R5F5671CHDBP#20 units undergo pre-shipment inspection (PSI). If there is an issue with R5F5671CHDBP#20, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F5671CHDBP#20 part is unused and in its original packaging.
Return procedure for R5F5671CHDBP#20:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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